151 lines
4.7 KiB
C
Executable File
151 lines
4.7 KiB
C
Executable File
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __MMIO_H__
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#define __MMIO_H__
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#include <stdint.h>
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#include "types.h"
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#ifndef ARCH_ARM
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#define __raw_readb(a) (*(volatile unsigned char *)(a))
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#define __raw_readw(a) (*(volatile unsigned short *)(a))
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#define __raw_readl(a) (*(volatile unsigned int *)(a))
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#define __raw_readq(a) (*(volatile unsigned long long *)(a))
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#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
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#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
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#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
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#define __raw_writeq(v,a) (*(volatile unsigned long long *)(a) = (v))
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/*
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* I/O memory access primitives. Reads are ordered relative to any
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* following Normal memory access. Writes are ordered relative to any prior
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* Normal memory access. The memory barriers here are necessary as RISC-V
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* doesn't define any ordering between the memory space and the I/O space.
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*/
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#define __io_br() do {} while (0)
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#define __io_ar(v) __asm__ __volatile__ ("fence i,r" : : : "memory")
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#define __io_bw() __asm__ __volatile__ ("fence w,o" : : : "memory")
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//#define __io_aw() mmiowb_set_pending()
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#define __io_aw() do {} while (0)
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#define readb(c) ({ u8 __v; __io_br(); __v = __raw_readb(c); __io_ar(__v); __v; })
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#define readw(c) ({ u16 __v; __io_br(); __v = __raw_readw(c); __io_ar(__v); __v; })
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#define readl(c) ({ u32 __v; __io_br(); __v = __raw_readl(c); __io_ar(__v); __v; })
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#define writeb(v, c) ({ __io_bw(); __raw_writeb((v), (c)); __io_aw(); })
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#define writew(v, c) ({ __io_bw(); __raw_writew((v), (c)); __io_aw(); })
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#define writel(v, c) ({ __io_bw(); __raw_writel((v), (c)); __io_aw(); })
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#ifdef CONFIG_64BIT
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#define readq(c) ({ u64 __v; __io_br(); __v = __raw_readq(c); __io_ar(__v); __v; })
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#define writeq(v, c) ({ __io_bw(); __raw_writeq((v), (c)); __io_aw(); })
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#endif // CONFIG_64BIT
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#else
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#define __raw_readb(a) (*(volatile unsigned char *)(a))
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#define __raw_readw(a) (*(volatile unsigned short *)(a))
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#define __raw_readl(a) (*(volatile unsigned int *)(a))
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#define __raw_readq(a) (*(volatile unsigned long long *)(a))
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#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
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#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
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#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
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#define __raw_writeq(v,a) (*(volatile unsigned long long *)(a) = (v))
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#define readb(a) __raw_readb(a)
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#define readw(a) __raw_readw(a)
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#define readl(a) __raw_readl(a)
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#define readq(a) __raw_readq(a)
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#define writeb(v, a) __raw_writeb(v,a)
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#define writew(v, a) __raw_writew(v,a)
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#define writel(v, a) __raw_writel(v,a)
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#define writeq(v, a) __raw_writeq(v,a)
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#define cpu_write8(a, v) writeb(a, v)
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#define cpu_write16(a, v) writew(a, v)
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#define cpu_write32(a, v) writel(a, v)
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#endif /* ARCH_ARM */
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#define mmio_wr32 mmio_write_32
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#define mmio_rd32 mmio_read_32
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static inline void mmio_write_8(uintptr_t addr, uint8_t value)
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{
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writeb(value, (void *) addr);
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}
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static inline uint8_t mmio_read_8(uintptr_t addr)
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{
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return readb((void *) addr);
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}
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static inline void mmio_write_16(uintptr_t addr, uint16_t value)
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{
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writew(value, (void *) addr);
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}
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static inline uint16_t mmio_read_16(uintptr_t addr)
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{
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return readw((void *) addr);
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}
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static inline void mmio_write_32(uintptr_t addr, uint32_t value)
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{
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writel(value, (void *) addr);
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}
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static inline uint32_t mmio_read_32(uintptr_t addr)
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{
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return readl((void *) addr);
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}
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static inline void mmio_write_64(uintptr_t addr, uint64_t value)
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{
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writeq(value, (void *) addr);
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}
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static inline uint64_t mmio_read_64(uintptr_t addr)
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{
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return readq((void *) addr);
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}
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static inline void mmio_clrbits_32(uintptr_t addr, uint32_t clear)
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{
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writel(readl((void *) addr) & ~clear , (void *) addr);
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}
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static inline void mmio_setbits_32(uintptr_t addr, uint32_t set)
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{
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writel(readl((void *) addr) | set , (void *) addr);
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}
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static inline void mmio_clrsetbits_32(uintptr_t addr, uint32_t clear,
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uint32_t set)
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{
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writel((readl((void *) addr) & ~clear) | set , (void *) addr);
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}
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/* from Linux usage */
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#define ioremap(a, l) (a)
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#define _reg_read(addr) mmio_read_32((addr))
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#define _reg_write(addr, data) mmio_write_32((addr), (data))
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#define _reg_write_mask(addr, mask, data) mmio_clrsetbits_32(addr, mask, data)
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#define ioread8 readb
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#define ioread16 readw
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#define ioread32 readl
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#define ioread64 readq
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#define iowrite8 writeb
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#define iowrite16 writew
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#define iowrite32 writel
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#define iowrite64 writeq
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#endif /* __MMIO_H__ */
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