#! armcc -E /* ** ################################################################### ** Processors: LPC54114J256BD64_cm4 ** LPC54114J256UK49_cm4 ** ** Compiler: Keil ARM C/C++ Compiler ** Reference manual: LPC5411x User manual Rev. 1.0 16 February 2016 ** Version: rev. 1.0, 2016-04-29 ** Build: b160526 ** ** Abstract: ** Linker file for the Keil ARM C/C++ Compiler ** ** The Clear BSD License ** Copyright 2016 Freescale Semiconductor, Inc. ** Copyright 2016-2017 NXP ** All rights reserved. ** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted (subject to the limitations in the disclaimer below) provided ** that the following conditions are met: ** ** 1. Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** ** 2. Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** ** 3. Neither the name of the copyright holder nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** ** NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ** ** http: www.nxp.com ** mail: support@nxp.com ** ** ################################################################### */ #define m_interrupts_start 0x20000000 #define m_interrupts_size 0x000000E0 #define m_text_start 0x200000E0 #define m_text_size 0x0001FF20 #define m_data_start 0x20020000 #define m_data_size 0x00008000 #define m_stack_start 0x04000000 #define m_stack_size 0x00008000 /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else #define Stack_Size 0x0400 #endif #if (defined(__heap_size__)) #define Heap_Size __heap_size__ #else #define Heap_Size 0x0400 #endif LR_m_text m_text_start m_text_size { ; load region size_region ER_m_text m_text_start m_text_size { ; load address = execution address * (InRoot$$Sections) .ANY (+RO) } RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data .ANY (+RW +ZI) } ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up } ARM_LIB_STACK m_stack_start+m_stack_size EMPTY -Stack_Size { ; Stack region growing down } } LR_m_interrupts m_interrupts_start m_interrupts_size { VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) } } LR_m_interrupts_ram m_interrupts_start m_interrupts_size { VECTOR_RAM m_interrupts_start m_interrupts_size { ; load address = execution address .ANY (.m_interrupts_ram) } }