/* * Copyright (c) 2006-2023, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018-11-06 balanceTWK first version */ #include #include #include #include #include #ifdef BSP_USING_SRAM #include "drv_sram.h" #endif /** * @brief This function is executed in case of error occurrence. * @param None * @retval None */ void Error_Handler(void) { /* USER CODE BEGIN Error_Handler */ /* User can add his own implementation to report the HAL error return state */ while (1) { } /* USER CODE END Error_Handler */ } /** System Clock Configuration */ void SystemClock_Config(void) { SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); NVIC_SetPriority(SysTick_IRQn, 0); } /** * This is the timer interrupt service routine. * */ void SysTick_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); rt_tick_increase(); /* leave interrupt */ rt_interrupt_leave(); } /** * This function will initial N32 board. */ void rt_hw_board_init() { /* NVIC Configuration */ #define NVIC_VTOR_MASK 0x3FFFFF80 #ifdef VECT_TAB_RAM /* Set the Vector Table base location at 0x10000000 */ SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); #else /* VECT_TAB_FLASH */ /* Set the Vector Table base location at 0x08000000 */ SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); #endif SystemClock_Config(); #ifdef RT_USING_PIN int n32_hw_pin_init(void); n32_hw_pin_init(); n32_msp_jtag_init(RT_NULL); #endif #ifdef RT_USING_SERIAL int rt_hw_usart_init(void); rt_hw_usart_init(); #endif #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); #endif #if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE) rt_console_set_device(RT_CONSOLE_DEVICE_NAME); #endif #ifdef BSP_USING_SRAM rt_system_heap_init((void *)EXT_SRAM_BEGIN, (void *)EXT_SRAM_END); #else rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); #endif }