When building bsp/cvitek/c906_little, compiler warns:
```
board/board.c: In function 'rt_hw_board_init':
board/board.c:26:5: warning: implicit declaration of
function 'rt_hw_tick_init'; did you mean 'rt_hw_stack_init'?
[-Wimplicit-function-declaration]
26 | rt_hw_tick_init();
| ^~~~~~~~~~~~~~~
| rt_hw_stack_init
board/board.c:29:5: warning: implicit declaration of
function 'rt_hw_uart_init'; did you mean 'rt_hw_board_init'?
[-Wimplicit-function-declaration]
29 | rt_hw_uart_init();
| ^~~~~~~~~~~~~~~
| rt_hw_board_init
```
To remove these build warnings, include header files
which declare these functions.
Plus, remove the decalartion of `tick_isr()`, this
function does not exist.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Based on the patch "bsp: cvitek: use rttpkgtool
to replace cvitek_bootloader", continue cleanup useless files.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Originally, for riscv big and little cores under bsp/cvitek,
after generating rtthread.bin, the cvitek_bootloader tool
would be used to package it and generate fip.bin and boot.sd
files that can be burned into sdcard. However, the
cvitek_bootloader tool repository is relatively large, and
it compiles and generates firmware such as fsbl, opensbi and
uboot from the source code level. And when using it, it
needs to be downloaded to the bsp/cvitek directory, which
will introduce pollution to source files in the RTT repository
under the original working path.
The new solution uses rttpkgtool, which is similar to
cvitek_bootloader, but it uses prebuilt firmware, so it is
very small and does not introduce pollution to the source file.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
build warning: passing argument 1 of 'inv_icache_range' makes integer
from pointer without a cast [-Wint-conversion]
Analyze: The passed parameter type is void*, which is a pointer type,
but the required type is uintptr_t, which is an integer type. Therefore,
there will be a 'makes integer from pointer without a cast' warning.
Solution: casting the void* pointer to uintptr_t, ensure that the
function receives the correct type.
Signed-off-by: zdtyuiop4444 <ign7798540@gmail.com>
For bsp/cvitek, duo256m, the operation process is
slightly different when building images for riscv
and arm64.
To improve the user experience, unify the building
process and steps of the two as follows:
- Enter c906_little and execute `scons`
- Enter cv18xx_riscv/cv18xx_aarch64 and execute `scons`
That's all. Finally, we can get `fip.bin` and
`boot.sd` under `bsp/cvitek/output/milkv-duo256m`.
Update the README.md accordingly.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Duo's CPU combination is more complicated:
| BSP | B/L core| ISA | UART |
| ------------- | ------- |---------------- |-------|
| cv18xx_risc-v | Big | RISC-V C906 | UART0 |
| c906-little | Littel | RISC-V C906 | UART1 |
| cv18xx_aarch64| Big | ARM Cortex A53 | UART0 |
Printing ISA and big and small core information
during the boot process helps developers/testers
determine the CPU and serial port corresponding to
the current console.
In addition, the RTT logo printing has already
distinguished whether it is smart, so the bsp
printing no longer distinguishes.
Updated README to sync with this change.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
By default, the small core enables D-Cache without ensuring cache
coherence. Therefore, when using shared memory, inconsistencies can
occur in the data read by the small core and the big core.
Solution: Migrate cache-related functions from the official
duo-buildroot-sdk library to implement cache-related operations in
rthw.h. This allows you to either disable D-Cache or call the
flush_dcache_range function before reading and after writing for
synchronization.
It is recommended to use the flush_dcache_range function, as disabling
D-Cache can have a significant performance impact.
Signed-off-by: zdtyuiop4444 <ign7798540@gmail.com>
description: In the bsp/cvitek/c906_little/board/interrupt.c, There is an issue with
setting the PLIC_PRIORITY[n].
analysis: PLIC_PRIORITY[n] each register corresponds to the priority of
a hardware interrupt number.
Solution: Each register is 4 bytes.
Multiply the total number of IRQs by 4 instead of dividing by 4.
Signed-off-by: Liu Gui <kenneth.liu@sophgo.com>
RISCV_S_MODE configuration only affects the code in
libcpu/risc-v/virt64, and the only bsp using this
libcpu is qemu-virt64-riscv.
Considering s-mode is the default mode RT-Thread
running on virt64 machine, it seems unnecessary to
make RISCV_S_MODE a Kconfig option.
Solution: Remove RISCV_S_MODE from Kconfig and define
it as a macro in the code in libcpu/risc-v/virt64.
Plus, due to this macro is only related to virt64, rename
RISCV_S_MODE to RISCV_VIRT64_S_MODE.
Update the .config/rtconfig.h in this patch.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Confirmed with milkv, only the sd card version is sold
by default for duo in the market. The spi pins are
provided through stamp holes, so that users can solder
the corresponding components on their baseboard during
secondary development.
In order to simplify maintenance work, the mainline
will only support the sd-card version and no longer
support spinor/spinand.
Updated config files the same in this patch.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
duo is a real hardware, no need for virtio.
Disable RT_USING_VIRTIO and update configuration to latest.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Move the combine.sh to under cv18xx_aarch64, so we can
run this script the same as scons and no need to change
cwd.
Rename the folder boot to prebuild just becuase all the
files under boot are prebuild binaries.
Move the prebuilt fip.bin to under prebuild/milkv-duo256m
because it's only for 256.
Update combine.sh accordingly and output fip.bin to the output
folder where we create fip.bin/boot.sd as other bsp.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
For ARM, RT-smart and RT-standard both enable mmc (see
rt_hw_board_init() in bsp/cvitek/cv18xx_aarch64/board/board.c,
rt_hw_mmu_setup is called both for smart or standard).
So ioremap is must to do for ARM.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
There is problem in the Kconfig of qemu-virt64-riscv.
RT_USING_VIRTIO is already defined in components/drivers/virtio/Kconfig,
so it should not be defined again in the BSP kconfig.
The solution is to rename RT_USING_VIRTIO to BSP_USING_VIRTIO.
Also, refer to the configuration method for virtio device drivers in
bsp/qemu-virt64-aarch64/drivers/Kconfig to rewrite the configuration
of BSP_USING_VIRTIO_xxx.
Updated default .config/rtconfig.h at the same time.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
- `dbg_log` is a “NOT RECOMMENDED API”, convert the calling of this
API to LOG_x and remove this API.
- `dbg_here`/`dbg_enter`/`dbg_exit`: no one use these APIs, remove
them directly.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Now lwext4 is ready, and qemu-virt64-riscv smart can boot with rootfs.
Updated README to introduce this.
This patch also replace qemu-nographic.sh with run.sh, which has a more
simple name and more robust to launch rootfs image binary.
TBD: qemu-nographic.bat is not touched, hope some guys from Windows can
give a hand.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Now lwext4 package has supported ext4. Add description in README
to introduce how to create rootfs of type ext4.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
