When building bsp/cvitek/c906_little, compiler reports:
```
.../rt-thread/libcpu/risc-v/rv64/trap.c:
In function 'handle_trap':
.../rt-thread/libcpu/risc-v/rv64/trap.c:106:13:
warning: implicit declaration of function 'rt_hw_tick_isr';
did you mean 'rt_hw_stack_init'? [-Wimplicit-function-declaration]
106 | rt_hw_tick_isr();
| ^~~~~~~~~~~~~~
| rt_hw_stack_init
.../rt-thread/libcpu/risc-v/rv64/trap.c:110:13:
warning: implicit declaration of function 'rt_hw_irq_isr';
did you mean 'rt_hw_soft_irq_isr'? [-Wimplicit-function-declaration]
110 | rt_hw_irq_isr();
| ^~~~~~~~~~~~~
| rt_hw_soft_irq_isr
```
rt_hw_tick_isr()/rt_hw_irq_isr() are implemented by bsp, but
libcpu/risc-v/rv64 doesn't declare them, so compiler warns.
There are three BSPs using 'rv64' (libcpu/risc-v/rv64):
- `bsp/cvitek/c906_little/rtconfig.py`
- `bsp/juicevm/rtconfig.py`
- `bsp/k210/rtconfig.py`
`handle_trap` in `libcpu/risc-v/rv64` is defined as weak.
BSP can use this function directly or define and overload
it by itself.
If bsp use this function directly, bsp need to pay
attention to the fact that three functions will be called
in this function:
- `rt_hw_soft_irq_isr`
- `rt_hw_tick_isr`
- `rt_hw_irq_isr`
In `libcpu/risc-v/rv64`, `rt_hw_soft_irq_isr` has a weak
definition, while the other two do not. This means that
if the bsp does not overload `handle_trap`, bsp must
define `rt_hw_tick_isr` and `rt_hw_irq_isr` itself.
This is also the practice of `bsp/cvitek/c906_little`.
There is also a similar bsp `bsp/k210`, and the form of
`bsp/juicevm` implements `handle_trap` by itself.
It seems that `rt_hw_tick_isr` and `rt_hw_irq_isr` are
not required to be implemented by all BSPs using
`libcpu/risc-v/rv64`. The premise for BSP to implement
them is that it does not overload `handle_trap`. So
declaring `rt_hw_tick_isr` and `rt_hw_irq_isr` with
extern in `libcpu/risc-v/rv64` is not proper.
In addition, the `rt_hw_tick_isr/rt_hw_irq_isr` are only
used by `libcpu/risc-v/rv64`, so it is not worth putting
the declaration in `./include/rthw.h`.
Sum up, the best solution is to add weak definition to
`rt_hw_tick_isr/rt_hw_irq_isr` as existing `rt_hw_soft_irq_isr`.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
When building bsp/cvitek/c906_little, compiler warns:
```
.../rt-thread/libcpu/risc-v/common/trap_common.c:
In function 'rt_hw_interrupt_install':
.../rt-thread/libcpu/risc-v/common/trap_common.c:50:11:
warning: unused variable 'user_param' [-Wunused-variable]
50 | void *user_param = param;
| ^~~~~~~~~~
.../rt-thread/libcpu/risc-v/common/trap_common.c:
In function 'rt_rv32_system_irq_handler':
.../rt-thread/libcpu/risc-v/common/trap_common.c:77:25:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
77 | s_stack_frame = (rt_hw_stack_frame_t *)mscratch;
| ^
```
Fixed these warnings as per indication from gcc.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
When building bsp/cvitek/c906_little, compiler warns:
```
board/board.c: In function 'rt_hw_board_init':
board/board.c:26:5: warning: implicit declaration of
function 'rt_hw_tick_init'; did you mean 'rt_hw_stack_init'?
[-Wimplicit-function-declaration]
26 | rt_hw_tick_init();
| ^~~~~~~~~~~~~~~
| rt_hw_stack_init
board/board.c:29:5: warning: implicit declaration of
function 'rt_hw_uart_init'; did you mean 'rt_hw_board_init'?
[-Wimplicit-function-declaration]
29 | rt_hw_uart_init();
| ^~~~~~~~~~~~~~~
| rt_hw_board_init
```
To remove these build warnings, include header files
which declare these functions.
Plus, remove the decalartion of `tick_isr()`, this
function does not exist.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Accroding to #9947 and #9424, adding doxygen comment for function in .c files and data structure, macro in .h file is a solution.For this pr, I encountered problem following situations.
- rt_clk_unprepare function return value type is different from rt_clk_ops so I change type of rt_clk_unprepare and its dependencies.
- clk_get function may be similar as rt_clk_unprepare but I'm not sure so not modify.
- clk_release implements may be incomplete, so I just marked in comment.
Signed-off-by: 1078249029 <1078249029@qq.com>
* doxygen: adjust documentation directory structure
- Rename documentation/doxygen to documentation/0.doxygen and cleanup
some unused files.
- Add/rename folders for each sub sections, such as
1.introduction/...... Each sub section will be created as a subpage.
- Generate initial Doxyfile, this Doxyfile will be used to unify
doxygen generated API documents and those markdown files under
documentation folder. This patch just add the default Doxyfile
generated by running "doxygen -g". It is used as baseline to add
more features/configurations.
- Rename documentation/README.md to documentation/INDEX.md, and
use it as mainpage.
- Move 0.doxygen/readme.md to documentation/README.md.
* doxygen: update configurations
These configurations are from old documentation/doxygen/Doxyfile.
Try best to compatible exixting design.
* doxygen: add run script
Add a script to automatic some operations.
Updated the README.md.
---------
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Co-authored-by: Supper Thomas <78900636@qq.com>
Based on the patch "bsp: cvitek: use rttpkgtool
to replace cvitek_bootloader", continue cleanup useless files.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Originally, for riscv big and little cores under bsp/cvitek,
after generating rtthread.bin, the cvitek_bootloader tool
would be used to package it and generate fip.bin and boot.sd
files that can be burned into sdcard. However, the
cvitek_bootloader tool repository is relatively large, and
it compiles and generates firmware such as fsbl, opensbi and
uboot from the source code level. And when using it, it
needs to be downloaded to the bsp/cvitek directory, which
will introduce pollution to source files in the RTT repository
under the original working path.
The new solution uses rttpkgtool, which is similar to
cvitek_bootloader, but it uses prebuilt firmware, so it is
very small and does not introduce pollution to the source file.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
build warning: passing argument 1 of 'inv_icache_range' makes integer
from pointer without a cast [-Wint-conversion]
Analyze: The passed parameter type is void*, which is a pointer type,
but the required type is uintptr_t, which is an integer type. Therefore,
there will be a 'makes integer from pointer without a cast' warning.
Solution: casting the void* pointer to uintptr_t, ensure that the
function receives the correct type.
Signed-off-by: zdtyuiop4444 <ign7798540@gmail.com>
For bsp/cvitek, duo256m, the operation process is
slightly different when building images for riscv
and arm64.
To improve the user experience, unify the building
process and steps of the two as follows:
- Enter c906_little and execute `scons`
- Enter cv18xx_riscv/cv18xx_aarch64 and execute `scons`
That's all. Finally, we can get `fip.bin` and
`boot.sd` under `bsp/cvitek/output/milkv-duo256m`.
Update the README.md accordingly.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Duo's CPU combination is more complicated:
| BSP | B/L core| ISA | UART |
| ------------- | ------- |---------------- |-------|
| cv18xx_risc-v | Big | RISC-V C906 | UART0 |
| c906-little | Littel | RISC-V C906 | UART1 |
| cv18xx_aarch64| Big | ARM Cortex A53 | UART0 |
Printing ISA and big and small core information
during the boot process helps developers/testers
determine the CPU and serial port corresponding to
the current console.
In addition, the RTT logo printing has already
distinguished whether it is smart, so the bsp
printing no longer distinguishes.
Updated README to sync with this change.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
By default, the small core enables D-Cache without ensuring cache
coherence. Therefore, when using shared memory, inconsistencies can
occur in the data read by the small core and the big core.
Solution: Migrate cache-related functions from the official
duo-buildroot-sdk library to implement cache-related operations in
rthw.h. This allows you to either disable D-Cache or call the
flush_dcache_range function before reading and after writing for
synchronization.
It is recommended to use the flush_dcache_range function, as disabling
D-Cache can have a significant performance impact.
Signed-off-by: zdtyuiop4444 <ign7798540@gmail.com>
description: In the bsp/cvitek/c906_little/board/interrupt.c, There is an issue with
setting the PLIC_PRIORITY[n].
analysis: PLIC_PRIORITY[n] each register corresponds to the priority of
a hardware interrupt number.
Solution: Each register is 4 bytes.
Multiply the total number of IRQs by 4 instead of dividing by 4.
Signed-off-by: Liu Gui <kenneth.liu@sophgo.com>
RISCV_S_MODE configuration only affects the code in
libcpu/risc-v/virt64, and the only bsp using this
libcpu is qemu-virt64-riscv.
Considering s-mode is the default mode RT-Thread
running on virt64 machine, it seems unnecessary to
make RISCV_S_MODE a Kconfig option.
Solution: Remove RISCV_S_MODE from Kconfig and define
it as a macro in the code in libcpu/risc-v/virt64.
Plus, due to this macro is only related to virt64, rename
RISCV_S_MODE to RISCV_VIRT64_S_MODE.
Update the .config/rtconfig.h in this patch.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Confirmed with milkv, only the sd card version is sold
by default for duo in the market. The spi pins are
provided through stamp holes, so that users can solder
the corresponding components on their baseboard during
secondary development.
In order to simplify maintenance work, the mainline
will only support the sd-card version and no longer
support spinor/spinand.
Updated config files the same in this patch.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
