libs/rt-thread-official
libs
/
rt-thread-official
mirror of https://github.com/RT-Thread/rt-thread.git
4
0
Fork 0
Code Issues Releases Wiki Activity
14,542 Commits 14 Branches 40 Tags 1.3 GiB
Commit Graph

21 Commits

Author SHA1 Message Date
Shell 7450ef6c4d
[rt-smart] kernel virtual memory management layer (#6809) 
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
 2023-01-08 21:08:55 -05:00
guo 68ca9f07a6
[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740) 
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.
 2022-12-16 18:38:28 +08:00
guozhanxin e2bdd8a184 [libcpu] fix cpp11 error 2022-12-14 11:04:00 +08:00
guo ecf2d82159
sync branch rt-smart. (#6641) 
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
 2022-12-03 12:07:44 +08:00
xiaoguang_ma 16f6157b1e [bsp] faster startup for cortex-a 
If the application defines dozens of global variables,
the speed of clearing the bss segment will be slower.

Because icache can be enabled before the mmu enabled.
Therefore, in order to speed up the process of clearing the BSS segment,
enable icache needs to be put ahead.
 2022-11-25 18:04:35 +09:00
zhouji 60c96fbc12 [update] Removed C++ global constructor initialization, this method is not used in GCC4.7 and later versions. 2022-04-20 17:32:02 +08:00
Meco Man 563e49890c [asm] 解决tab和空格混用的问题 2022-01-20 20:57:35 +08:00
fenghuijie 0015af02e4 调整代码，以支持cpu usage 2021-07-05 18:33:22 +08:00
fenghuijie e933c1f610 调整异常处理代码结构，以支持backtrace功能 2021-07-05 14:43:33 +08:00
wanghaijing a6060a41df Adjust the stack_top to bss 2021-07-03 10:25:30 +08:00
zhouji 42ce237dc9 [update] 整理cortex-a aarch32启动代码 
1. 去除start_gcc.s中set_secondary_cpu_boot_address代码，这部分提取到qemu-vexpress-a9 bsp中。
2. 移动cpu.c中rt_hw_cpu_id函数到cp15_gcc.s，使用汇编实现，采用wake属性，方便bsp根据cpu特性获取CPU ID（多cpu集群中，不同厂家使用组合不一样）.
3. 整理start_gcc.s 适应多核启动，原来的代码只考虑到双核的情况。
 2021-05-14 15:30:31 +08:00
bigmagic 92ab0fd593 fix startup code address relative jump 2020-06-04 00:03:07 +08:00
bigmagic 38f400d50a add raspi4 32bit mode bsp 2020-05-25 17:30:05 +08:00
aozima 525d353403 fixed linker script and stack align issues. 2019-10-22 09:47:41 +08:00
shaojinchun 043611b98a add cortex-a fpu support 2019-05-29 08:40:41 +08:00
shaojinchun 6cdfb2ac92 fix signal code 2019-05-11 09:34:26 +08:00
shaojinchun 1e7bd3d8a1 修改lwp支持中arm cortex-a的swi入口函数处理 2019-04-27 13:54:51 +08:00
qz721 b10039f396 Disable the data alignment check. 2019-04-01 14:21:59 +08:00
qz721 2eb1bef773 Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code. 2019-03-25 20:03:49 +08:00
Bernard Xiong 7c425408b4 [license] Change the license of libarm to Apache. 2018-10-15 01:35:07 +08:00
Bernard Xiong f6170a6e5b [BSP] add i.MX 6UL BSP 2017-11-01 13:30:17 +08:00