Commit Graph

7 Commits

Author SHA1 Message Date
Shell 1d678e5596
[smart] fixup: mmap support (#8154)
Signed-off-by: Shell <smokewood@qq.com>
2023-10-20 13:28:20 +08:00
geniusgogo ecd29fda60
Sync dfs lwp (#8123) 2023-10-17 13:07:59 +08:00
Shell 2394e75265
[libcpu/risc-v] support noncached normal memory (#7051)
* [libcpu/risc-v] support noncached normal memory

* [mm] check before dereference in _fetch_page

* [mm] add comments on ioremap

* [ioremap] report more info on failed
2023-03-16 10:26:55 +08:00
chenhy0106 9db73a47c4
为c906添加asid支持 (#6870)
* [rt-smart] asid for c906
2023-01-28 13:08:40 -05:00
Shell f0dadcb3c3
[rt-smart] porting c906 and D1s to mm (#6848)
* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error
2023-01-16 08:24:03 +08:00
Shell 7450ef6c4d
[rt-smart] kernel virtual memory management layer (#6809)
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
2023-01-08 21:08:55 -05:00
guo ecf2d82159
sync branch rt-smart. (#6641)
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00