0d193254f8
Merge pull request #845 from caogos/master
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[BSP] Add FPU option for loongson1c.
2017-09-14 17:06:11 +08:00
574e22bdbd
在配置文件“rtconfig.h”中增加硬浮点FPU的配置项，
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浮点经常会用到，所以默认使用硬浮点。
2017-09-13 15:21:09 +08:00
cb247e913f
update libcpu: cortex-m0 fault handlers always enable.
2017-09-01 10:22:55 +08:00
2ac493698b
[BSP] cleanup for hifive1 bsp.
2017-08-26 11:02:39 +08:00
b9ebd183ae
Merge pull request #827 from caogos/master
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[BSP] Add EMAC driver in loongson1C (ported by chinesebear, https://github.com/chinesebear/rtt-net )
2017-08-25 11:07:34 +08:00
9bbc4e5e6b
update cortex-m libcpu: fixed compile error.
2017-08-23 16:13:51 +08:00
838c63f365
添加龙芯1C片内网卡的驱动（原创作者是chinesebear， https://github.com/chinesebear/rtt-net）
2017-08-23 15:46:51 +08:00
9b7303e511
update libcpu: ensure fault enable.
2017-08-18 11:12:58 +08:00
4626b19ead
Merge pull request #784 from zhangjun1996/master
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[BSP] add bsp for sifive(risc-v e310).
2017-08-10 16:51:59 +08:00
7129d77bee
增加龙芯1c硬浮点的支持（可以使用硬浮点了）
2017-08-10 15:35:03 +08:00
72cfe9dd68
modify： drivers/cpuusage.c
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modify： ../../libcpu/risc-v/e310/stack.c
rmove unused macro definition
modify： ../../src/idle.c
Return to the original version
2017-07-31 12:05:45 +08:00
0cd49e7c4a
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
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add new bsp for risc-v
2017-07-31 11:27:46 +08:00
e9f1bdf2da
new file： ../../libcpu/risc-v/e310/trap.c
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add file that forget to submit before
auto change timer mtimercmp register on the base of RT_TICK_PER_SECOND in rtconfig.h
no flashing led
new file： ../../src/idle.c
recover old file
2017-07-31 11:12:28 +08:00
a5305c05df
fix bug in context_gcc.s and start_gcc.s:
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save mie into stack
msh running normaly
2017-07-31 10:59:59 +08:00
b032dff161
fix bug in rt_hw_context_switch_interrupt_do
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save sp to old thread
clear rt_thread_switch_interrupt_flag
always enable interrupt after rt_hw_context_switch
judeg the type of interrupt in trap_entry, then call handler(Machine timer interrupt of Machine external interrupt)
2017-07-30 19:46:28 +08:00
2d56a27c20
修改： ../../libcpu/risc-v/e310/context_gcc.S
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enable interrupt after return form rt_hw_context_switch
2017-07-30 15:34:32 +08:00
3c51848d33
fix trap_entry
2017-07-29 15:37:20 +08:00
b80f83f360
modified: ../../libcpu/risc-v/e310/context_gcc.S
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fix open timer intrrupt
2017-07-26 16:27:54 +08:00
98a6896cfa
remove "csrrc a5, mstatus, MSTATUS_MIE" in rt_hw_interrupt_enable();
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it will lead to interrupt again in interrupt
2017-07-26 16:07:01 +08:00
358612c8a2
支持GPIO中断（外部中断）
2017-07-20 17:35:03 +08:00
d1bb7c61f4
将支持的中断个数从32个扩展到160个，至此可以支持所有中断
2017-07-20 17:05:59 +08:00
f39164203e
修正龙芯1c的中断号
2017-07-18 17:04:32 +08:00
b334347a24
deleted: rtthread.s /*just for debug*/
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modified: ../../libcpu/risc-v/e310/context_gcc.S
change ret to mret and switch to new task with mepc
2017-07-17 16:55:33 +08:00
e01455155a
add context_gcc.s
2017-07-17 15:44:00 +08:00
a74a2a25a8
Add libcpu/arm/am335x/context_iar.S file
2017-02-06 21:57:15 +08:00
b96f07e477
flush cache after exception code install
2016-06-15 08:09:56 -07:00
4e95fdff4a
[BSP] Update VFP code in armv6.
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committed by FH.
2016-05-20 14:20:34 +08:00
923594c7ab
[BSP] Enable VFP.
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committed by FH.
2016-05-20 12:24:51 +08:00
255f8b7c34
[BSP] Add BSP for Ingenic X1000 CPU
2016-04-24 19:34:41 +08:00
86216ceecc
start exception by chinesebear
2016-04-19 22:08:23 +08:00
43f68131ce
[BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.
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FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
2016-04-18 13:52:39 +08:00
3983f39f34
Add iar compiler support for am335x.
2015-11-11 23:44:05 +08:00
3faca6d5df
[BSP] update stm32f7-disco
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code cleanup.
2015-09-24 16:03:09 +08:00
a0de58a008
[BSP] fix x86 bsp compiling issue
2015-09-15 11:50:29 +00:00
2021f5a276
Add the license.
2015-09-04 21:58:08 +08:00
b71cb4c09d
Add dm365 porting.
2015-09-04 12:30:20 +08:00
af8a91457e
[bsp]add the stm32f74x bsp.
2015-08-07 13:30:13 +08:00
4ad1b35537
chinesebear add bsp & libcpu
2015-07-09 07:38:07 +08:00
9fe3cbf76f
Align thread stack to 8 byte.
2015-06-05 19:14:08 +08:00
314379cc77
implement __user_initial_stackheap
2015-06-04 12:23:24 +08:00
be76b10be6
Align stack address to 8 byte.
2015-06-04 11:59:18 +08:00
1fa5711712
fixed assembly warnings.
2015-05-22 16:48:01 +08:00
73df162d3f
fixed assembly warnings.
2015-05-13 11:57:34 +08:00
4222677933
[libcpu][am335x] Fix the booting failure when enabling MMU
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Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:
----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...
----------------------------------------------------------------
This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.
2015-05-11 10:36:11 +08:00
a13132b302
[libcpu][arm926] Optimize irq trap code.
2015-05-04 16:13:43 +08:00
49fa5c44d7
[libcpu][arm926] Optimize code
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1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
2015-04-22 11:19:50 +08:00
175e357ace
[libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread.
2015-04-16 14:13:43 +08:00
cf3d639fcb
[libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files.
2015-04-16 10:35:12 +08:00
6aa242645f
1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function.
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2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain.
3. [bsp][sam9260] Move link strips in to folder link_scripts.
4. [libcpu][arm926] Add copy right to source file and format code.
2015-04-15 16:13:30 +08:00
39452b67b0
1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP
2015-04-14 21:56:34 +08:00
Bernard Xiong
勤为本
aozima
zhangjun
zchong-cht
kontais
chinesebear
weety
nongxiaoming
chinesebear
Adrian Huang
ardafu