e8bbbe6788
cortex-r4: wrap asm functions with .asmfunc/.endasmfunc
2013-06-05 23:21:06 +08:00
228a6be077
cortex-r4: add __rt_ffs
2013-06-05 23:20:39 +08:00
e74befca44
move libcpu/arm/rm48x50/ to libcpu/arm/cortex-r4
2013-05-31 21:06:26 +08:00
24fc6e6ebb
rm48x50: VFP lazy stacking
...
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.
Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
2013-05-31 20:58:08 +08:00
8bbfd45ce3
rm48x50: change STMFD/LDMFD to STMDB/LDMIA
...
VFP instructions only have IA(Increment After)/DB(Decrement Before)
mode. To keep consistency, just change STM/LDM to DB/IA accordingly.
2013-05-31 18:38:42 +08:00
ec1203bfab
rm48x50: turn on VFP support
...
This support Common VFPv2 sub-architecture.
2013-05-31 18:32:21 +08:00
83ea4dd628
rm48x50: small cleanup on context_ccs.asm
2013-05-30 17:37:50 +08:00
810311b624
rm48x50: fix bug in rt_hw_interrupt_{mask,unmask}
2013-05-29 23:36:32 +08:00
f08df08897
rm48x50: optimize a BEQ
...
Use condition flag in the ORR. This could eliminate a BEQ.
2013-05-26 23:37:56 +08:00
19fe6251e7
rm48x50: optimize context_switch_interrupt_to by reuse registers
...
When saving thread registers in context_switch_interrupt_to, we don't
change them, just move them. So there is no need to always r0-r3 from
stack to the real r0-r3. So just use the intermediate registers and
eliminate 2 MOV.
2013-05-26 22:37:49 +08:00
3d0647efb3
rm48x50: optimize context_switch_interrupt_do
...
Substitude STMFD, MOV, ADD with STMFD, SUB. It reduce one instruction.
Tested on board and it works like a charm.
2013-05-26 17:22:36 +08:00
b39d038cf0
rm48x50: utilize CPS instruction and remove some useless code
2013-05-26 16:55:39 +08:00
f51bce3fed
add rm48x50 bsp and libcpu
...
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
2013-05-24 22:55:13 +08:00
db548a1b37
fixed compiling error related to the RT_USING_INTERRUPT_INFO in mini4020
2013-04-10 00:49:18 +08:00
d9d39a8d21
Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication.
2013-04-08 21:57:24 +08:00
0594734d8d
clean up code
2013-04-02 20:33:56 +08:00
03aa76155e
fixed context thread issue when using armcc compile
2013-04-02 20:27:08 +08:00
fb9ea5eada
enable at91sam9260 mmu, update SDIO and EMAC drivers
2013-04-02 20:24:51 +08:00
92d4c1939b
fixed at91sam9260 context thread issue, avoid idle thread stack overflow
2013-04-02 20:23:11 +08:00
edef109d76
fix interrupt compiling issue in PPC
2013-03-31 22:58:36 -04:00
c1b600644f
Merge pull request #56 from aozima/aozima
...
Modify the interrupt interface implementations.
2013-03-31 04:14:40 -07:00
2ccb3c7589
update LPC2478: Modify the interrupt interface implementations.
2013-03-31 18:25:51 +08:00
710a0fc4a5
fix issue when print interrupt info
2013-03-31 18:24:51 +08:00
1549b7db90
update LPC214X: Modify the interrupt interface implementations.
2013-03-31 17:58:26 +08:00
eab20a9975
update AT91SAM7X: Modify the interrupt interface implementations.
2013-03-31 17:43:09 +08:00
83ce430902
update loongson 1B dev: Modify the interrupt interface implementations.
2013-03-31 17:32:25 +08:00
93e04a1366
update loongson dev3210: Modify the interrupt interface implementations.
2013-03-31 17:32:20 +08:00
6058efbd9b
update Jz47xx: Modify the interrupt interface implementations.
2013-03-31 17:32:16 +08:00
29a3ae4368
update sep4020: Modify the interrupt interface implementations.
2013-03-31 17:32:04 +08:00
fbc1b05dd8
update mini2440: Modify the interrupt interface implementations.
2013-03-31 17:30:30 +08:00
608074deaf
update to interrupt description
2013-03-30 08:15:27 +08:00
8e6a534fa3
fix compiling issue in Jz47XX
2013-03-26 09:08:25 +08:00
bb72be94b2
code cleanup for interrupt description
2013-03-26 08:52:33 +08:00
5639c5daed
implement __rt_ffs for armv5
2013-03-24 16:03:23 +08:00
1abaa0492d
implement __rt_ffs in kernel service library
2013-03-23 11:27:29 +08:00
7917cf09e7
remain the old handler to keep forward compatibility
2013-03-19 11:25:46 +08:00
9678ee67e9
Modified the interrupt function comments
2013-03-19 11:25:33 +08:00
b21028474b
Modify the interrupt interface implementations, changes in the part of the parameter definition.
2013-03-19 11:25:12 +08:00
be59c9287f
fixed cache initial bug.
2013-03-08 11:23:40 +08:00
9ccdf4172e
basic mingw support for simulator: kernel and finsh
2013-02-26 16:03:08 +08:00
d80888a194
port stm32f0x to gcc.
2013-02-20 22:03:31 +08:00
b8aaa6e730
clean code in cpu_port.c, add some comments
2013-01-16 18:49:07 +08:00
b8bd5c8309
fix bug in cpu_port.c(can work very well)
2013-01-15 23:59:14 +08:00
395178ebfa
rewrite cpu_port.c (but still has bug)
2013-01-15 21:38:54 +08:00
07da6caafd
surport finsh
2013-01-14 22:38:54 +08:00
8f70786c30
add finsh, but still cannot work, only can be built with gcc
2013-01-14 16:50:40 +08:00
7b42f926a0
re-write the rt_hw_interrupt_enable/disable
2013-01-14 14:14:40 +08:00
5685a395be
add some comments and clean code in cpu_port.c
2013-01-14 01:23:08 +08:00
7b58dd92fa
add libcpu/sim/posix/cpu_port.c
2013-01-13 22:58:45 +08:00
72782e9203
convert end of line
2013-01-08 05:05:02 -08:00
Grissiom
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weety
Bernard Xiong
aozima
prife
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