* [DM/FEATURE] Support NVME
1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
Drivers can manage their own IDs without having to concern
themselves with the register/unregister in system
Link: https://github.com/RT-Thread/rt-thread/issues/9534
Signed-off-by: GuEe-GUI <2991707448@qq.com>
This patch introduces `rt_smp_call_request` API to handle queued
requests across cores with user provided data buffer, which provides a
way to request IPI through a non-blocking pattern.
It also resolved several issues in the old implementation:
- Multiple requests from different cores can not be queued in the work
object of the target core.
- Data racing on `rt_smp_work` of same core. If multiple requests came
in turns, or if the call is used by the target cpu, while a new
request is coming, the value will be overwrite.
- Memory vulnerability. The rt_smp_event is allocated on stack, though
the caller may not wait until the call is done.
- API naming problem. Actually we don't provide a way to issue an IPI to
ANY core in mask. What the API do is aligned to MANY pattern.
- FUNC_IPI registering to PIC.
Changes:
- Declared and configured the new `RT_SMP_CALL_IPI` to support
functional IPIs for task requests across cores.
- Replaced the single `rt_smp_work` array with `call_req_cores` to
manage per-core call requests safely.
- Added `_call_req_take` and `_call_req_release` functions for atomic
handling of request lifetimes, preventing data race conditions.
- Replaced single event handling with a queue-based approach
(`call_queue`) for efficient multi-request processing per core.
- Introduced `rt_smp_call_ipi_handler` to process queued requests,
reducing IPI contention by only sending new requests when needed.
- Implemented `_smp_call_remote_request` to handle remote requests
with specific flags, enabling more flexible core-to-core task
signaling.
- Refined `rt_smp_call_req_init` to initialize and track requests
with atomic usage flags, mitigating potential memory vulnerabilities.
Signed-off-by: Shell <smokewood@qq.com>
These changes introduce the rt_interrupt_context family, providing a
mechanism for managing nested interrupts. The context management
ensures proper storage and retrieval of interrupt states, improving
reliability in nested interrupt scenarios by enabling context tracking
across different interrupt levels. This enhancement is essential for
platforms where nested interrupt handling is crucial, such as in real-
time or multi-threaded applications.
Changes:
- Defined rt_interrupt_context structure with context and node fields
in `rtdef.h` to support nested interrupts.
- Added rt_slist_pop function in `rtservice.h` for simplified node
removal in singly linked lists.
- Declared rt_interrupt_context_push, rt_interrupt_context_pop, and
rt_interrupt_context_get functions in `rtthread.h` to manage the
interrupt/exception stack.
- Modified AArch64 CPU support in `cpuport.h` to include
rt_hw_show_register for debugging registers.
- Refactored `_rt_hw_trap_irq` in `trap.c` for context-aware IRQ
handling, with stack push/pop logic to handle nested contexts.
- Implemented interrupt context push, pop, and retrieval logic in
`irq.c` to manage context at the CPU level.
Signed-off-by: Shell <smokewood@qq.com>
When RT_USING_DEBUG is disabled, variables used only in RT_ASSERT
statements become unused, triggering -Wunused-but-set-variable compiler
warnings. These variables are essential for runtime assertions in debug
builds but appear unused in release builds.
Example:
- Variables used in RT_ASSERT(var != RT_NULL) checks
- Affects multiple drivers and components using RT_ASSERT
This is a general cleanup to improve code compilation without affecting
functionality.
Those definitions are presented in rtdef.h until PR #9461 moved them to
kerrno.h, which introduced unknown definition error for project building
Changes:
- Added includes of kerrno.h
Signed-off-by: Shell <smokewood@qq.com>
* [smart] add CPU usage tracing config
This patch introduces following features:
- Added CPU usage tracing functionality, enabled by default, for
applications like 'top'
- update time as smart independent
Signed-off-by: Shell <smokewood@qq.com>
* fixup: add ump idle thread
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Signed-off-by: Shell <smokewood@qq.com>
* [Feature] Power domain for device
1.Support device power on/off.
2.Support attach/detach device.
3.Support power domain driver api.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [DM/platform] Enhanced platform bus
1.Add power domain for device.
2.Support `remove` and `shutdown` bus interface.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
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Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [libcpu] arm64: Add hardware thread_self support
This patch introduces hardware-based thread self-identification
for the AArch64 architecture. It optimizes thread management by
using hardware registers to store and access the current thread's
pointer, reducing overhead and improving overall performance.
Changes include:
- Added `ARCH_USING_HW_THREAD_SELF` configuration option.
- Modified `rtdef.h`, `rtsched.h` to conditionally include
`critical_switch_flag` based on the new config.
- Updated context management in `context_gcc.S`, `cpuport.h`
to support hardware-based thread self.
- Enhanced `scheduler_mp.c` and `thread.c` to leverage the new
hardware thread self feature.
These modifications ensure better scheduling and thread handling,
particularly in multi-core environments, by minimizing the
software overhead associated with thread management.
Signed-off-by: Shell <smokewood@qq.com>
* fixup: address suggestion
* fixup: rt_current_thread as global
* scheduler: add cpu object for UP scheduler
Also, maintain the rt_current_thread in cpu object on UP scheduler.
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Signed-off-by: Shell <smokewood@qq.com>
In this patch, a hook list has been introduced to address the concerns
regarding coupling issues arising from modifications to the serial code
for integrating TTY logic.
Signed-off-by: Shell <smokewood@qq.com>
This option is for RT-Thread Nano version.
If select this option, it will not compile components/libc
folder and only use tool chain internal libc. Normally, the
tool chain internal is only cover ISO standard (e.g. armcc),
but some tool chains' internal libc will cover more than
ISO standard (e.g. newlib).