This patch introduces `rt_smp_call_request` API to handle queued
requests across cores with user provided data buffer, which provides a
way to request IPI through a non-blocking pattern.
It also resolved several issues in the old implementation:
- Multiple requests from different cores can not be queued in the work
object of the target core.
- Data racing on `rt_smp_work` of same core. If multiple requests came
in turns, or if the call is used by the target cpu, while a new
request is coming, the value will be overwrite.
- Memory vulnerability. The rt_smp_event is allocated on stack, though
the caller may not wait until the call is done.
- API naming problem. Actually we don't provide a way to issue an IPI to
ANY core in mask. What the API do is aligned to MANY pattern.
- FUNC_IPI registering to PIC.
Changes:
- Declared and configured the new `RT_SMP_CALL_IPI` to support
functional IPIs for task requests across cores.
- Replaced the single `rt_smp_work` array with `call_req_cores` to
manage per-core call requests safely.
- Added `_call_req_take` and `_call_req_release` functions for atomic
handling of request lifetimes, preventing data race conditions.
- Replaced single event handling with a queue-based approach
(`call_queue`) for efficient multi-request processing per core.
- Introduced `rt_smp_call_ipi_handler` to process queued requests,
reducing IPI contention by only sending new requests when needed.
- Implemented `_smp_call_remote_request` to handle remote requests
with specific flags, enabling more flexible core-to-core task
signaling.
- Refined `rt_smp_call_req_init` to initialize and track requests
with atomic usage flags, mitigating potential memory vulnerabilities.
Signed-off-by: Shell <smokewood@qq.com>
Fix some code style and init for V2M, ITS.
V2M is the PCI MSI/MSI-X for GICv2.
ITS is the PCI MSI/MSI-X for GICv3/v4.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
PIC may free because some wrongs in debug.
We should remove in PIC list or there are
some undefined behavior will happen.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* support period time
* enable multiple ktimer
* mv set delay_cnt to hrtimer_start
* add ktime debug info
* change current_irq_begin to local var
* fix bug: setting current timer and setting timeout in driver aren't atomicly
* create->init
* refactoring ktime
* [DM/feature] Implement PIC irq state { get; set }
There are some common state for irq:
1. Pending: IRQ was triggered, but software not ACK.
2. Active: IRQ was ACK, but not EOI.
3. Masked: IRQ was masked or umasked.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [DM/pic] Support IRQ state { get; set } for ARM GICv2/v3
Signed-off-by: GuEe-GUI <2991707448@qq.com>
---------
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [PIC] Make affinity helper interface
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [PIC/GIC] Fixup GIC affinity init
GICv2 is not support if current CPU is not startup,
but RT-Thread SMP is startup after the devices init
in the `main` thread.
This patch fixup the cpumask to init once and check
the init status in affinity interface.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
---------
Signed-off-by: GuEe-GUI <2991707448@qq.com>
We support OFW API to replace fdt old API, and add
IRQ, IO, Platform-Bus, CPUs ... OFW node contorl.
To support work with Device Tree or ACPI in drivers
that use IRQ, we make a programmable interrupt
controller driver's model.
Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
Shell
GuEe-GUI
zms123456
GUI
zhao maosheng
ErikChanHub
wusongjie