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418 Commits

Author SHA1 Message Date
RTsien 9382a7105f add CM_PER_UARTx_CLKCTRL 2014-01-11 15:14:36 +08:00
Grissiom 0c9b9ced31 cortex-r4: use byte to allocate the stack 
Unit of "byte" is more intuitive than "long".
 2013-11-17 12:49:08 +08:00
Grissiom a8520ed383 cortex-r4: let svc mode reuse the stack of IRQ on startup 
As the svc stack is the stack of threads, there is no need to allocate a
separate stack for the startup. Reuse the IRQ stack should be OK.

Tested on rm48 board.
 2013-11-17 12:49:07 +08:00
Bright Pan 06987e72e5 Fix hardfault bug for gcc port 
for 2013-02-20 aozima commmit "port for gcc", but the commit is
not tested,and the kernel is breakdown in context_gcc.S, the file
is a copy from cortex-m3,but not port for cortex-m0, so i complete
this port for aozima, test it in stm32f0discovery board ,
and it works fine.
 2013-11-04 16:10:11 +08:00
Grissiom 377c6e6cc9 cortex-r4: dump register on traps 
We could not handle any traps except IRQ/FIQ.
 2013-10-20 23:46:50 +08:00
Grissiom e1e563e85c cortex-r4: remove RM48x50.h and add armv7.h 2013-10-20 21:10:26 +08:00
Grissiom 81ab083ae5 rm48: move some asm file to libcpu 2013-10-20 18:51:46 +08:00
Grissiom 9568669109 rm48x50: add GCC support 2013-10-20 18:51:45 +08:00
Bernard Xiong 7bdb082c91 Delete SConscript 2013-09-22 06:59:52 +08:00
bernard 9d09cd9f23 Import beaglebone porting 2013-09-20 21:20:51 +08:00
Grissiom 3ebc766521 sim/posix: move rt_hw_context_switch_interrupt after it's definition 
This fix a compile error in Clang.
 2013-09-04 00:05:03 +08:00
Bernard Xiong e301d14979 Merge pull request #132 from MrVan/sep6200 
SEP6200 Support
 2013-07-29 22:35:31 -07:00
weety 37ac4855da Embedded GPLv2 license. 2013-07-21 20:01:24 +08:00
weety 36c4604a36 fix compiling error 2013-07-21 19:39:21 +08:00
weety 42f9840653 commit again 2013-07-21 17:32:55 +08:00
weety 3bdbf640b7 update at91sam9260 project directory structure. 2013-07-21 17:19:30 +08:00
weety 885301bb14 update AT91SAM9260 usart driver， using serial driver component. 2013-07-21 15:01:42 +08:00
Peng Fan 82bc21ff7b Cleanup and add licencse 2013-07-17 18:42:19 +08:00
Peng Fan 73beced22a SEP6200 Support 2013-07-17 13:37:31 +08:00
aozima ce4f0329db enhancement hard fault exception handler. 2013-07-09 22:02:12 +08:00
aozima 5120f54a29 fix spelling error. 2013-06-24 22:57:27 +08:00
aozima 34d59ccb0f update libcpu/arm/cortex-m4: support lazy stack optimized. 2013-06-23 18:10:46 +08:00
aozima b045f93b47 fixed bug: correct cortex-m SCB->VTOR address. 2013-06-23 18:08:16 +08:00
aozima 93b9b28297 format code by Astyle. 2013-06-23 18:07:10 +08:00
aozima a2ff85c03f update libcpu/arm/cortex-m0: restore MSP. 2013-06-22 18:59:51 +08:00
aozima 4d421cad73 update libcpu/arm/cortex-m3: restore MSP. 2013-06-22 18:59:50 +08:00
aozima f9e673354a update libcpu/arm/cortex-m4: restore MSP. 2013-06-22 18:59:49 +08:00
Bernard Xiong 3071e35c54 Merge pull request #109 from grissiom/rm48x50 
Rm48x50
 2013-06-19 01:29:12 -07:00
visitor83 c986754c49 Signed-off-by: visitor83 <wolflouiswang@gmail.com> 
format the s3c24x0 serial.c and mini2440 rtconfig.py
 2013-06-18 12:51:55 +08:00
visitor83 c56fa7c907 ident format 
Signed-off-by: visitor83 <root@wolflouis.(none)>
 2013-06-16 10:00:34 +08:00
Grissiom 009239ceed rm48x50: rt_interrupt_nest should be `volatile rt_uint8_t` 2013-06-12 23:56:10 +08:00
Grissiom 9b949c28b7 rm48x50: add cache_{enable, disable} 2013-06-12 21:03:04 +08:00
Grissiom e8bbbe6788 cortex-r4: wrap asm functions with .asmfunc/.endasmfunc 2013-06-05 23:21:06 +08:00
Grissiom 228a6be077 cortex-r4: add __rt_ffs 2013-06-05 23:20:39 +08:00
Grissiom e74befca44 move libcpu/arm/rm48x50/ to libcpu/arm/cortex-r4 2013-05-31 21:06:26 +08:00
Grissiom 24fc6e6ebb rm48x50: VFP lazy stacking 
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.

Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
 2013-05-31 20:58:08 +08:00
Grissiom 8bbfd45ce3 rm48x50: change STMFD/LDMFD to STMDB/LDMIA 
VFP instructions only have IA(Increment After)/DB(Decrement Before)
mode. To keep consistency, just change STM/LDM to DB/IA accordingly.
 2013-05-31 18:38:42 +08:00
Grissiom ec1203bfab rm48x50: turn on VFP support 
This support Common VFPv2 sub-architecture.
 2013-05-31 18:32:21 +08:00
Grissiom 83ea4dd628 rm48x50: small cleanup on context_ccs.asm 2013-05-30 17:37:50 +08:00
Grissiom 810311b624 rm48x50: fix bug in rt_hw_interrupt_{mask,unmask} 2013-05-29 23:36:32 +08:00
Grissiom f08df08897 rm48x50: optimize a BEQ 
Use condition flag in the ORR. This could eliminate a BEQ.
 2013-05-26 23:37:56 +08:00
Grissiom 19fe6251e7 rm48x50: optimize context_switch_interrupt_to by reuse registers 
When saving thread registers in context_switch_interrupt_to, we don't
change them, just move them. So there is no need to always r0-r3 from
stack to the real r0-r3. So just use the intermediate registers and
eliminate 2 MOV.
 2013-05-26 22:37:49 +08:00
Grissiom 3d0647efb3 rm48x50: optimize context_switch_interrupt_do 
Substitude STMFD, MOV, ADD with STMFD, SUB. It reduce one instruction.
Tested on board and it works like a charm.
 2013-05-26 17:22:36 +08:00
Grissiom b39d038cf0 rm48x50: utilize CPS instruction and remove some useless code 2013-05-26 16:55:39 +08:00
Grissiom f51bce3fed add rm48x50 bsp and libcpu 
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:

    1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
    channel 5 in enabled and connected to IRQ.

    2, RTI driver is enabled and compare3 source is selected to counter1
    and the compare3 will generate tick in the period of 10ms. This
    value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.

In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
 2013-05-24 22:55:13 +08:00
yiyue.fang db548a1b37 fixed compiling error related to the RT_USING_INTERRUPT_INFO in mini4020 2013-04-10 00:49:18 +08:00
weety d9d39a8d21 Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication. 2013-04-08 21:57:24 +08:00
weety 0594734d8d clean up code 2013-04-02 20:33:56 +08:00
weety 03aa76155e fixed context thread issue when using armcc compile 2013-04-02 20:27:08 +08:00
weety fb9ea5eada enable at91sam9260 mmu, update SDIO and EMAC drivers 2013-04-02 20:24:51 +08:00
weety 92d4c1939b fixed at91sam9260 context thread issue, avoid idle thread stack overflow 2013-04-02 20:23:11 +08:00
Bernard Xiong edef109d76 fix interrupt compiling issue in PPC 2013-03-31 22:58:36 -04:00
Bernard Xiong c1b600644f Merge pull request #56 from aozima/aozima 
Modify the interrupt interface implementations.
 2013-03-31 04:14:40 -07:00
aozima 2ccb3c7589 update LPC2478: Modify the interrupt interface implementations. 2013-03-31 18:25:51 +08:00
weety 710a0fc4a5 fix issue when print interrupt info 2013-03-31 18:24:51 +08:00
aozima 1549b7db90 update LPC214X: Modify the interrupt interface implementations. 2013-03-31 17:58:26 +08:00
aozima eab20a9975 update AT91SAM7X: Modify the interrupt interface implementations. 2013-03-31 17:43:09 +08:00
aozima 83ce430902 update loongson 1B dev: Modify the interrupt interface implementations. 2013-03-31 17:32:25 +08:00
aozima 93e04a1366 update loongson dev3210: Modify the interrupt interface implementations. 2013-03-31 17:32:20 +08:00
aozima 6058efbd9b update Jz47xx: Modify the interrupt interface implementations. 2013-03-31 17:32:16 +08:00
aozima 29a3ae4368 update sep4020: Modify the interrupt interface implementations. 2013-03-31 17:32:04 +08:00
aozima fbc1b05dd8 update mini2440: Modify the interrupt interface implementations. 2013-03-31 17:30:30 +08:00
Bernard Xiong 608074deaf update to interrupt description 2013-03-30 08:15:27 +08:00
Bernard Xiong 8e6a534fa3 fix compiling issue in Jz47XX 2013-03-26 09:08:25 +08:00
Bernard Xiong bb72be94b2 code cleanup for interrupt description 2013-03-26 08:52:33 +08:00
weety 5639c5daed implement __rt_ffs for armv5 2013-03-24 16:03:23 +08:00
Bernard Xiong 1abaa0492d implement __rt_ffs in kernel service library 2013-03-23 11:27:29 +08:00
weety 7917cf09e7 remain the old handler to keep forward compatibility 2013-03-19 11:25:46 +08:00
weety 9678ee67e9 Modified the interrupt function comments 2013-03-19 11:25:33 +08:00
weety b21028474b Modify the interrupt interface implementations, changes in the part of the parameter definition. 2013-03-19 11:25:12 +08:00
aozima be59c9287f fixed cache initial bug. 2013-03-08 11:23:40 +08:00
prife 9ccdf4172e basic mingw support for simulator: kernel and finsh 2013-02-26 16:03:08 +08:00
aozima d80888a194 port stm32f0x to gcc. 2013-02-20 22:03:31 +08:00
prife b8aaa6e730 clean code in cpu_port.c, add some comments 2013-01-16 18:49:07 +08:00
prife b8bd5c8309 fix bug in cpu_port.c(can work very well) 2013-01-15 23:59:14 +08:00
prife 395178ebfa rewrite cpu_port.c (but still has bug) 2013-01-15 21:38:54 +08:00
prife 07da6caafd surport finsh 2013-01-14 22:38:54 +08:00
prife 8f70786c30 add finsh, but still cannot work, only can be built with gcc 2013-01-14 16:50:40 +08:00
prife 7b42f926a0 re-write the rt_hw_interrupt_enable/disable 2013-01-14 14:14:40 +08:00
prife 5685a395be add some comments and clean code in cpu_port.c 2013-01-14 01:23:08 +08:00
prife 7b58dd92fa add libcpu/sim/posix/cpu_port.c 2013-01-13 22:58:45 +08:00
Bernard Xiong 72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
Ubuntu ecd66612cf remove lpc122x because there is a common cortex-m0 porting. 2013-01-04 06:03:03 -08:00
bernard.xiong@gmail.com 68fadd9edc Add exception hook function. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2551 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-29 09:36:16 +00:00
bernard.xiong@gmail.com ac9c373d7f Add thread name to Win32Thread. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2541 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-29 03:28:31 +00:00
goprife@gmail.com 8df650d861 clean code in sim/win32/cpu_port.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2536 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-27 08:31:53 +00:00
dzzxzz@gmail.com 468ade5e98 fixed the coding style in libcpu/arm 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2518 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 06:59:14 +00:00
dzzxzz@gmail.com f6629a1e4c rename the file name using low case 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2514 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:50:42 +00:00
dzzxzz@gmail.com eab30ebbda fixed the fixed the gcc compiling error in ubuntu host OS 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2512 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:34:04 +00:00
wuyangyong 5be0c53dd8 stack addr align to 8byte. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2509 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-23 07:40:31 +00:00
dzzxzz@gmail.com 2955dbfcda add LPC4330 BSP based on NGX xplorer development board 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2487 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-17 08:21:29 +00:00
bernard.xiong 6ae9a5d95c revert wrongly commit. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2408 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 08:10:23 +00:00
bernard.xiong f78a50883b remove nuc1xx because there is a cortex-m0 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2407 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 07:59:28 +00:00
bernard.xiong ec0cb881d8 remove lpc1100 because there is a cortex-m0 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2406 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 07:56:40 +00:00
nongli1031@gmail.com 6fe2afed8c for rt-thread 1.1.0 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2372 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-26 03:36:13 +00:00
goprife@gmail.com 20352571e2 add libcpu/sim/win32 to support the win32 bsp (compiled by visual studio) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2359 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-21 04:46:24 +00:00
goprife@gmail.com 806ecbbb2b update libcpu/SConscript to support cl(c compiler of visual studio) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2358 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-21 04:42:49 +00:00
bernard.xiong 0c13711396 Add taihu bsp (PPC405) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2350 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-14 23:28:37 +00:00
wuyangyong 0057604ad2 update hdisr_gcc.S: push argument for ISR. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2341 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-10 16:39:49 +00:00
dzzxzz@gmail.com e0a5c0ae81 save texit address in to thread stack in m16c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2308 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-26 06:43:35 +00:00
dzzxzz@gmail.com c784dd2ed8 update V850 BSP, now supporting scons + IAR 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2306 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-25 04:18:24 +00:00
dzzxzz@gmail.com 6dcb1207b1 initialize register r31(LP) with texit in V850/cpuport.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2305 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-25 03:19:43 +00:00
wuyangyong 056228cce6 fixed bug: store r8 - r11. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2258 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-08-22 15:53:54 +00:00
iamyhw@gmail.com 4455768b92 fixed s3c2440a context thread bug,patch contributor 
:yuxun2k

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2192 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-06-28 14:04:20 +00:00
wuyangyong a9aa8d503e add libcpu/cortex-m0. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2142 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-31 17:41:58 +00:00
mok.jingxian@gmail.com 5684d15916 add bf533 bsp and cpu files. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2138 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-30 11:29:34 +00:00
dzzxzz@gmail.com 0ce3aa056d update CMSIS RTOS API in MB9BF506R 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2117 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-15 06:16:37 +00:00
wuyangyong 04a79d24cf fix extern list_thread return type by arda. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2104 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-29 02:11:40 +00:00
bernard.xiong@gmail.com 090553f768 delete PK40X256VLQ100 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2081 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-16 05:04:30 +00:00
dzzxzz@gmail.com a321f3da64 support GNUC cross compiler(GNUM16CM32Cv1101-ELF) for renesas M16C porting 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2047 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-14 07:04:27 +00:00
luohui2320@gmail.com 8d4938ae70 delete libcpu/arm/at91sam926x/rt_list.h 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2008 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-03-23 15:07:21 +00:00
wuyangyong 38ba67a867 update libcpu cortex-m4. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1967 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-18 17:46:08 +00:00
wuyangyong 68bee363ff update IA32 branch for new rt-thread platform. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1948 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-16 04:19:20 +00:00
wuyangyong 7906287cfe IAR not support VSTMFD and VLDMFD, use VSTMDB and VLDMIA. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1947 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-16 03:45:50 +00:00
dzzxzz@gmail.com 645260a1c9 fixed a compiling error while not defined RT_USING_FINSH 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1906 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-01-03 09:08:47 +00:00
wuyangyong aad32f8546 support context switch load/store FPU register. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1901 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 20:25:44 +00:00
wuyangyong 1097104c7f fixed stack align issues. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1900 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 20:21:46 +00:00
bernard.xiong@gmail.com 3df72cc21f update file header. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1891 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 04:08:12 +00:00
wuyangyong 701df33436 remove libcpu/arm/lm3s libcpu/arm/lpc176x , update bsp lm3s lpc176x. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1865 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-23 01:36:10 +00:00
dzzxzz d6892fb441 all FM3 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/fm3 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1861 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-22 00:46:34 +00:00
dzzxzz 8b64d24bd4 all STM32 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/stm32 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1858 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-21 09:44:52 +00:00
dzzxzz 9c8398a10b fixed scons + IAR compiling error for stm32f107 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1855 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-21 07:20:51 +00:00
wuyangyong 2622f51496 add thumb mode porting. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1854 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-20 16:06:20 +00:00
wuyangyong f1b07348c2 update libcpu lpc2478. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1852 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-20 09:03:46 +00:00
wuyangyong c808894735 update libcpu lpc2148. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1850 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-20 08:45:01 +00:00
nongli1031@gmail.com 212d828d3f change thread return address. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1848 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-19 01:46:19 +00:00
nongli1031@gmail.com da542ee0ca git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1847 bbd45198-f89e-11dd-88c7-29a3b14d5316 2011-12-18 05:36:26 +00:00
nongli1031@gmail.com c66c182894 git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1846 bbd45198-f89e-11dd-88c7-29a3b14d5316 2011-12-18 05:16:43 +00:00
nongli1031@gmail.com 90c43598fc delete microbalze.inc 
此行及以下内容将会被忽略--

D    microblaze/microbalze.inc


git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1845 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-18 05:16:01 +00:00
nongli1031@gmail.com ae73bd59bc modify format 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1844 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-18 05:13:10 +00:00
nongli1031@gmail.com 08f25161d9 porting for microblaze. nl1031 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1843 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-17 04:14:22 +00:00
bernard.xiong@gmail.com 462cfdc3e0 add fatal event handler in ARM7TDMI. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1819 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-11-29 10:17:51 +00:00
onelife.real ed9828226a *** EFM32 branch *** 
1. Move file, "start_gcc.S", from "libcpu/arm/cortex-m3/" to "bsp/efm32/" 
2. Upgrade EFM32 driver libraries (CMSIS and efm32lib) to version 2.2.2 
3. Upgrade EFM32 G2xx development kit drivers (EFM32_Gxxx_DK) to version 1.7.2 (from version 1.6.0) 
4. Modify the files ("drv_usart.c" and "drv_iic.c") according to the driver libraries upgrading 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1818 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-11-29 09:15:10 +00:00
bernard.xiong e7eaf16bf4 fixed object name copy bug; update AT91SAM7S64 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1787 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-11-08 04:06:12 +00:00
wuyangyong 8c54e1c47b update cortex-m3 libcpu 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1776 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-10-28 13:19:30 +00:00
wuyangyong 8e7398e010 update cortex-M4 libcpu 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1773 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-10-27 02:30:47 +00:00
bernard.xiong@gmail.com 3ac0b7b966 add STM32F40x porting (uncompleted) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1770 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-10-20 23:55:08 +00:00
wuyangyong 06e810dfe8 update lpc17xx libcpu 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1761 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-10-13 17:54:23 +00:00
dzzxzz e97c87d6a0 fixed a compile error while using scons+iar for m16c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1740 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-10-07 03:00:12 +00:00
dzzxzz 865c1d4df0 fix a spelling error 
rt_thread_switch_interrput_flag -> rt_thread_switch_interrupt_flag

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1712 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-19 04:40:50 +00:00
dzzxzz 46a823ed91 improve NEC V850 porting 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1705 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-09 10:08:52 +00:00
dzzxzz f7d1ca323b fixed a spelling error 
rt_thread_switch_interrput_flag -> rt_thread_switch_interrupt_flag

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1704 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-09 07:30:39 +00:00
wuyangyong 34d2f9de38 fix spelling errors 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1699 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-06 15:50:38 +00:00
wuyangyong 40ad880bdd merge all of C source code into cpuport.c. (PIC32) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1697 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-05 15:17:57 +00:00
wuyangyong ce9d476787 add exceptions.c for pic32 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1696 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-05 15:06:31 +00:00
wuyangyong 0a3eeb9f0a fix context bug(flag not clean) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1695 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-05 15:06:14 +00:00
dzzxzz 55a2684e56 improve the renesas M16C porting 
it can be worked in NORMAL or SIMPLE calling convention
and in all the optimize level(none, low, medium, high)

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1691 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-02 06:56:22 +00:00
dzzxzz e8a462b5c7 optimize porting for M16C 
void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to);

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1688 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-01 08:25:54 +00:00
dzzxzz 61d969f1b9 merge stack.c and interrupt.c into cpuport.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1687 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-01 08:05:21 +00:00
luohui2320@gmail.com da74af2347 AT91SAM9260 branch 
1. Support Keil MDK development environment
2. Modify EMAC driver according to the changes of lwIP API in reversion 1668 and 1669

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1681 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-08-23 14:48:10 +00:00