a25d3fd301
fix:fixed variable misuse
2023-04-17 23:45:10 -04:00
9e680e9f86
[bsp][ls1c] fix a misoperation
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attach #7291
2023-04-17 22:59:31 -04:00
501b22aabe
[HUST CSE] Fix many abnormal symbols in annotations and format code
2023-04-17 22:26:23 -04:00
5c1b071a0c
[HUST][CSE]mips/common/exception.c/rt_set_except_vector ( #7238 )
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* mips/common/exception.c/rt_set_except_vector
* Update exception.c
---------
Co-authored-by: Bernard Xiong <bernard.xiong@gmail.com>
2023-04-14 14:06:43 +08:00
68ca9f07a6
[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 ( #6740 )
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* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.
2022-12-16 18:38:28 +08:00
99bdf978d7
[rtdef] use lower-case to define attributes ( #6728 )
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* [rtdef] rename RT_WEAK attribute as rt_weak
* [rtdef] rename RT_USED attribute as rt_used
* [rtdef] rename RT_SECTION attribute as rt_section
* [rtdef] rename ALIGN attribute as rt_align
* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
2022-12-11 13:12:03 -05:00
ecf2d82159
sync branch rt-smart. ( #6641 )
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* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
f5b0bfd3f4
uniform code writing-disable interrupt
2022-04-20 14:22:43 +08:00
6bd22f3e6f
替换RTThread旧版文件头注释版权声明 ( #5774 )
2022-04-05 19:34:30 +08:00
ed9037e376
update libcpu/mips/gs232/gs232.h:
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更正了看门狗的寄存器地址
2022-02-22 09:48:12 +00:00
563e49890c
[asm] 解决tab和空格混用的问题
2022-01-20 20:57:35 +08:00
f191694b19
[ci][action.yml]CI加入龙芯ls2kdev
2021-09-22 08:24:45 -04:00
8da9f78d72
[libc] remove rtlibc
2021-09-11 11:07:51 +08:00
6c907c3a47
[libcpu] auto formatted
2021-03-27 17:51:56 +08:00
c17c727628
[libcpu]update GPL license to Apache-2.0
2021-03-24 15:58:47 +08:00
242530ae70
ls1b: fix the count of GPIO IRQ and improvement the IRQ of UARTS.
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from 1b manunal we know it have 64 GPIO IRQ and 12 UARTS
2021-01-31 22:33:58 +08:00
d874ab1109
mips:gs232:LS1C300 have 5 group INTC cells but LS1B have 4 group INTC cells
2021-01-31 21:56:30 +08:00
0af3666882
remove unused function declarations
2021-01-31 21:53:00 +08:00
eeaf1fcc50
resolve Conflicts
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bsp/nrf52832/board/Sconscript
bsp/nrf52832/startups/Sconscript
bsp/raspberry-pi/raspi4-32/driver/SConscript
2020-12-28 12:02:31 +08:00
ef62febf1f
[SConscript]update group name
2020-12-19 16:49:11 +08:00
ba83ddc3c4
[SConscript] change libcpu to LIBARCH,and correcte letter case
2020-11-30 15:52:43 +08:00
91261e25b9
[SConscript]rename group name
2020-11-20 13:38:11 +08:00
355f8dd95c
[libcpu][update]重启与关机函数：rt_hw_cpu_shutdown、rt_hw_cpu_reset，补充WEAK属性
2020-11-20 08:49:51 +08:00
a8928c881e
MIPS:fix the RT_EXCEPTION_MAX value
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from <see mips run> know that cp0_cause's ExcCode have 5 bit filed and
the max exception is 32.
2020-09-14 11:10:44 +08:00
a97b0a0d39
code format
2020-09-11 11:44:49 +08:00
c66314a8b6
fixed loongson bsp build on windows
2020-09-04 11:57:35 +08:00
1556ba8e7f
add ls2k mmu
2020-09-04 10:16:34 +08:00
bd95f3a94f
fix mips stackframe and exception
2020-09-04 10:16:34 +08:00
3d0bdf4bb6
MIPS:improvement FPU support
2020-08-25 11:52:07 +08:00
3ce53f9c79
MIPS:remove redundant #ifdef ARCH_MIPS64
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there exist redundant #ifdef ARCH_MIPS64 in asm.h, remove it
2020-08-24 09:35:10 +08:00
1ec681a551
fix ls2k libc and irq
2020-06-21 23:28:11 +08:00
f295149f20
MIPS: fix inline assembly for FPU
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Signed-off-by: duhuanpeng <548708880@qq.com>
2020-04-10 15:07:39 +08:00
ee61d78b18
MIPS: inline routine should be static here
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gcc will remove this "unused" routine and cause a linking error.
symbol not found when linking.
Signed-off-by: duhuanpeng <548708880@qq.com>
2020-04-10 15:07:34 +08:00
c27f13c6c9
[mips]fix a bug
2020-04-07 19:01:54 +08:00
dff04ffdc6
fix mips stackframe point
2020-04-07 14:49:20 +08:00
3c5329a9b7
mips repair constraint
2020-04-07 14:43:20 +08:00
c024e2e485
add ls2k bsp config
2020-04-07 14:39:20 +08:00
990f731b77
fix mips64 some bug
2020-04-07 14:39:12 +08:00
0f26ffa7a2
add ls2k bsp
2020-04-07 14:38:58 +08:00
9ef986929c
[libcpu] mips: Merge loongson_1 into gs232
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Previously Loongson 1B and Loongson 1C have their own libcpu
implemention, but they're almost identical. So we merge them
into gs232 and adapt to new common code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:42 +08:00
7c66501861
[libcpu] Refine MIPS common code
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MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.
The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:04 +08:00
a972fcc0b5
[BSP] move libcpu/mips/x1000 to bsp/x1000/cpu
2019-12-11 11:01:40 +08:00
ab818cda30
参照龙芯1c手册更正看门狗寄存器宏定义
2019-08-21 13:44:55 +08:00
d45efced1c
libcpu: MIPS: 更新版权信息/Update copyright information.
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更新版权信息。
Update copyright information.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:05:00 +08:00
d6b2f56f15
libcpu: MIPS: 清理代码/Clean up code.
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清理内容重复的头文件。
Clean up duplicate header files.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:00:34 +08:00
bd8f0d0423
[libcpu] Fix the build directory issue
2019-03-26 13:36:01 +00:00
e6d1537327
移除 SConscript.1 临时文件
2019-03-25 15:18:09 +08:00
3a3c6c51f8
[libcpu] remove cache.h from mips/common folder.
2019-01-07 21:16:05 +08:00
4c0aafb57f
[libcpu] Fix the SCoscript issue in cpu/MIPS.
2019-01-07 09:20:30 +08:00
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
zb1tree
7YZ7
d1zzy126
guo
Man, Jianting (Meco)
thewon86
clickcheck
Bernard Xiong
yangjie
michael
张世争
bigmagic
duhuanpeng
Jiaxun Yang
liufeilong
Zhou Yanjie
tangyuxin