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Author SHA1 Message Date
Bernard Xiong 459ddc3b06
Merge pull request #2523 from qz721/libcpu_cortex_a 
Add standard rt-thread cache interfaces for arm/cortex-a.
 2019-03-30 05:57:47 +08:00
qz721 fbd40fc5b8 Add standard rt-thread cache interfaces for arm/cortex-a. 
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
 2019-03-29 20:22:25 +08:00
ZYH fcb88f7034 [libcpu][k210]fix stack frame print 2019-03-28 17:05:52 +08:00
BernardXiong bd8f0d0423 [libcpu] Fix the build directory issue 2019-03-26 13:36:01 +00:00
Bernard Xiong 94e7f7316b
Merge pull request #2503 from qz721/libcpu_cortex_a 
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
 2019-03-25 21:58:48 +08:00
qz721 2eb1bef773 Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code. 2019-03-25 20:03:49 +08:00
tangyuxin e6d1537327 移除 SConscript.1 临时文件 2019-03-25 15:18:09 +08:00
ZYH c41bf3120f [libcpu][k210]add stack info printf 2019-03-21 15:10:55 +08:00
ZYH 3dd72f956b [libcpu][k210]add description of exception 2019-03-20 12:23:17 +08:00
shaojinchun 29264edde8 修改arm926中machine.c的协议声明 2019-03-14 17:54:21 +08:00
shaojinchun 159def753f arm926内容整理 2019-03-14 17:24:35 +08:00
Wayne Ren d8aa99a29c [bsp][synopsys] add the support of synopsys arc emsk 
* the initial support of synopsys designware arc processor
* the initial support of synospsy ARC EM Starter Kit
* the bsp code is based on embarc which is a common SDK for
all synopsys ARC-based boards
* use "scons --gdb" to debug emsk with em9d configuration
* for detailed board information, pls go embarc.org

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
 2019-01-25 10:29:34 +08:00
Bernard Xiong 3a3c6c51f8 [libcpu] remove cache.h from mips/common folder. 2019-01-07 21:16:05 +08:00
Bernard Xiong 4c0aafb57f [libcpu] Fix the SCoscript issue in cpu/MIPS. 2019-01-07 09:20:30 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
shaojinchun 86c76b0e8a add k210 SMP support 2018-12-28 09:41:18 +08:00
zhuhongbing fb693418ee add project support for at91sam9260, add support for at91sam9g45 2018-12-26 12:50:52 +08:00
Bernard Xiong 597d71cc03 [bsp][k210] Add get_free_heap_size function. 
* Add get_free_heap_size function;
* Increase shell stack for KPU module.
 2018-12-23 14:11:25 +08:00
Bernard Xiong 5e0f8cb3aa [libcpu] Add k210 BSP. 2018-12-18 21:01:03 +08:00
Bernard Xiong c72dc1a7e5
Merge pull request #2072 from yufanyufan77/master 
添加cpu复位函数
 2018-12-15 11:53:17 +08:00
Bernard Xiong 885d99ee9b
[libcpu][risc-v] fix rt_thread_switch_interrupt_flag issue. 2018-12-15 11:47:59 +08:00
Bernard Xiong fd347fdb90
[libcpu][risc-v] fix the rt_thread_switch_interrupt_flag issue 2018-12-15 11:47:10 +08:00
yufanyufan77 b40a8f816b 添加cpu复位函数 
RT_WEAK void rt_hw_cpu_reset(void)
 2018-12-14 08:58:40 +08:00
Bernard Xiong 08521ceaa5 [libcpu] Fix the E310 compiling issue. 2018-12-08 17:08:52 +08:00
Bernard Xiong c9576c3e53 [BSP] Add RV32M1_VEGA BSP. 2018-12-08 10:44:56 +08:00
Bernard Xiong 36b194aeb6 [BSP] Update Hifive1 BSP with unified RV porting. 2018-12-08 10:42:40 +08:00
Bernard Xiong 2a7d814f77 [libcpu] Add unified RISC-V libcpu porting. 2018-12-08 10:41:38 +08:00
liruncong cea021781e [libcpu/mips/ppc405]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:42 +08:00
liruncong c7a1c1c1db [libcpu/mips/sep6200]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:40 +08:00
liruncong 2502114e34 [libcpu/mips/xburst]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:38 +08:00
liruncong da9bc3d677 [libcpu/mips/x1000]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:35 +08:00
liruncong 33c6a9c795 [libcpu/mips/longson_1c]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:33 +08:00
liruncong 2ce284c4b3 [libcpu/mips/longson_1b]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:26 +08:00
liruncong bef3256db5 [libcpu/arm/ia32]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:05 +08:00
liruncong 849421709b [libcpu/arm/zynq7000]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:02 +08:00
liruncong 3e05f24608 [libcpu/arm/sep4020]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:42:54 +08:00
liruncong 46c5c8267a [libcpu/arm/s3c24x0]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:36:48 +08:00
liruncong 96691760dc [libcpu/arm/realview-a8-vmm]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:36:34 +08:00
liruncong 7be87217b5 [libcpu/arm/lpc24xx]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:36:18 +08:00
liruncong 5321f202c4 [libcpu/arm/lpc214x]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:35:58 +08:00
liruncong 8ce36092c5 [libcpu/arm/cortex-r4]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:35:43 +08:00
liruncong cbe07afabe [libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:35:34 +08:00
liruncong 8200137327 [libcpu/arm/AT9ASAM7X]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:35:17 +08:00
liruncong 2635cc1694 [libcpu/arm/am335x]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:35:02 +08:00
Bernard Xiong 9f477667ab
Merge pull request #1770 from xuzhuoyi/master 
添加对 TI C2000 DSP 的移植
 2018-11-24 20:35:50 +08:00
xuzhuoyi 6c081947b5 [bsp][tms320f28379d] Classify c28x into ti-dsp 2018-11-24 17:41:55 +08:00
Bernard Xiong 46dae3f35f
Merge branch 'master' into dev-4.0.x 2018-11-20 23:13:45 +08:00
xuzhuoyi 17301e463c [bsp][tms320f28379d] Add support of Kconfig 2018-11-18 12:06:52 +08:00
xuzhuoyi b7a76b5e52 [bsp][tms320f28379d] Change license to Apache-2.0 2018-11-16 20:30:56 +08:00
xuzhuoyi 37db67d94a Merge remote-tracking branch 'upstream/master' 
# Conflicts:
#	src/thread.c
 2018-11-16 20:09:46 +08:00
Bernard Xiong 00a655ac1c [Kernel] Add ARCH_CPU_STACK_GROWS_UPWARD option 2018-11-11 15:56:02 +08:00
Bernard Xiong 484afe9d2c [Kernel] Add 64bit CPU support. 2018-10-26 06:35:42 +08:00
Bernard Xiong bd731fe1f0 [license] Fix the bad license header for lpc24xx. 2018-10-16 09:18:53 +08:00
Bernard Xiong 7c425408b4 [license] Change the license of libarm to Apache. 2018-10-15 01:35:07 +08:00
Bernard Xiong 1253a1b445
Merge pull request #1812 from liruncong/am335x-mmu 
修正am335x中mmu问题
 2018-10-10 08:49:18 +08:00
Bernard Xiong 5c91f241bd
Merge pull request #1861 from jg1uaa/master 
avoid to conflicting types for 'uint32_t' error.
 2018-10-03 23:08:17 +08:00
SASANO Takayoshi 54f23a4293 avoid to conflicting types for 'uint32_t' error. 
already uint32_t is defined at components/libc/compilers/minilibc/stdint.h.

there is two ways to solve, using <stdint.h>/uint32_t pair or
<rtthread.h>/rt_uint32_t pair.

I choose former because this code belongs to C compiler, not RT-Thread system.
 2018-10-03 21:03:00 +09:00
Bernard Xiong d96027f156 [libcpu] Fix the FPU definition in M4/M7 for ARM Clang 2018-09-25 11:08:58 +08:00
Bernard Xiong ff08faf605 [Kernel] Adjust the copyright information 2018-09-25 11:06:07 +08:00
Bernard Xiong b98a0ba804 [Kernel] Add ARMCC 6.x support. 2018-09-23 12:08:44 +08:00
Bernard Xiong b9e7cf7fa3 [BSP] Enable memory pool for i.MXRT1050-EVK. 2018-09-22 22:22:18 +08:00
liruncong af1044955a 修正am335x中mmu问题 
1) mmu_disable_dcache/mmu_enable_dcache等, 应使用rt_cpu_xxx相关函数,否则会跑飞. armcc并没有提供rt_cpu_xxx对应汇编代码,先删除
2) mmu_setmtt抽取为函数mmu_setmtts,并增加RT_WEAK.mmu_setmtts此处作为示例函数.实际用户板子可在bsp中重新实现该函数.可在rt_components_board_init函数前调用rt_hw_mmu_init
 2018-09-15 11:37:14 +08:00
liruncong 6d16685011 rt_hw_backtrace中多余括号删除. armclang给出警告 2018-09-10 19:58:28 +08:00
xuzhuoyi 9d8e27e626 [bsp][tms320f28379d] Modify to C28x Compiler Register Conventions 2018-09-03 23:02:16 +08:00
xuzhuoyi 5fd1213e73 [bsp][tms320f28379d] __rt_ffs() problem caused by 16-bit int 2018-09-03 21:39:56 +08:00
xuzhuoyi 697a4495a6 [bsp][tms320f28379d] Add support for upward-growing stack 2018-09-03 00:03:06 +08:00
xuzhuoyi d85981a715 [BSP][tms320f28379d] Add port for tms320f28379d 2018-09-02 18:44:28 +08:00
hichard_ren@yeah.net b46e7f3172 add rt_hw_cpu_reset for cortex-m cpu 2018-08-01 11:57:56 +08:00
aozima d431f4b5f9 [libcpu][comtex-m7] enhancement hard fault exception handler. 2018-07-25 21:39:45 +08:00
aozima 6c39b2d54d [libcpu][comtex-m4] enhancement hard fault exception handler. 2018-07-25 21:39:44 +08:00
aozima a0fe71f78f fixed get sp in HardFault_Handler. close #1646 2018-07-25 21:39:43 +08:00
= 944b0f1c94 fix annotation error 2018-06-13 15:04:31 +08:00
liang yongxiang 7785dc5d01 [libcpu] add c-sky ck802 support 2018-06-11 09:43:39 +08:00
ArdaFu aa08164cb3 [libcpu] Sconscript: fix spell srror. 2018-06-04 14:23:54 +08:00
ArdaFu 099062de78 [tools][building] Add ASFLAGS in DefineGroup. 2018-06-04 14:18:31 +08:00
ArdaFu 7a1f8ee1c4 [libcpu][arm][arm926] Using C header file to define stack and heap size. 2018-06-04 13:34:45 +08:00
liang yongxiang 32c5b2515f [libcpu] add risc-v e310 porting 2018-05-31 14:53:26 +08:00
Bernard Xiong fe691c2ab3
Merge pull request #1484 from TanekLiang/riscv-update 
remove hifive1 bsp and risc-v/e310 porting
 2018-05-29 16:20:39 +08:00
liang yongxiang 46b9be6038 [libcpu] remove nds32 porting 2018-05-29 12:59:54 +08:00
liang yongxiang 5faae3350c [libcpu] remove libcpu/risc-v 2018-05-29 12:59:13 +08:00
zhuangwei123 330bdf6989 [bsp/ls1cdev]跟上一提交，漏提两个文件 2018-05-12 19:36:08 +08:00
zhuangwei123 9a7caed323 [bsp/ls1cdev]添加自引导特性，添加配置选项 
1、添加自引导特性，添加配置选项
2、修复cpuport.c的bug
3、修复ls1c_pin.c不能默认复用的bug
 2018-05-12 19:33:32 +08:00
aozima dd1041bb7f [libcpu]: fixed #1196 FPU FPCA issue. 2018-01-31 18:54:11 +08:00
Bernard Xiong d78f5eb674
Merge pull request #1124 from SummerGGift/add_arm_8-byte_alignment 
[libcpu]: add 8-byte alignment for arm architecture && optimize code …
 2017-12-21 17:07:34 +08:00
SummerGift fc7a5abc76 [libcpu]: add 8-byte alignment for arm architecture && optimize code format 2017-12-21 16:37:38 +08:00
Bernard Xiong cc75366fda
Merge pull request #1123 from SummerGGift/8-byte_alignment 
[libcpu]: add 8-byte alignment for armv6 architecture
 2017-12-21 15:36:21 +08:00
SummerGift 336207ad31 [libcpu]: add 8-byte alignment for armv6 architecture 2017-12-21 15:35:48 +08:00
SummerGift a4a85a28da [libcpu]:optimize code format 2017-12-21 15:14:23 +08:00
SummerGift e7b1786759 [libcpu]:optimize code format 2017-12-21 14:55:34 +08:00
SummerGift 15715692d2 [libcpu]: add 8-byte alignment for armv6 architecture 2017-12-21 10:13:47 +08:00
Bernard Xiong bb46058d8e [libcpu] Add ARCH_ARM_ARM9/11 type 2017-12-19 17:39:23 +08:00
SummerGift eb72d19179 [libcpu] add volatile for __asm. 2017-11-22 09:54:36 +08:00
SummerGift 2488624a18 [libcpu] add volatile for asm (" mcr ") or asm (" mrc ") instruct. 2017-11-22 09:54:27 +08:00
tangyuxin afc2256d01 [libcpu]Support x1000 CPU 2017-11-10 19:50:14 +08:00
Bernard Xiong f6170a6e5b [BSP] add i.MX 6UL BSP 2017-11-01 13:30:17 +08:00
bernard 756bfcc5e2 Update Kconfig. 
1. Add IPADDR/GWADDR etc;
2. Add Kconfig for libcpu.
 2017-10-31 09:54:23 +08:00
weety 6085f6826d [bsp][at91sam9260] Fix the problem of the finsh function failure by using component initialization. 2017-10-19 23:46:17 +08:00
bernard 5e3b3b19a6 [BSP] change the type of cmd. 
1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
 2017-10-16 13:23:03 +08:00
bernard f8a1bf6fd8 [libcpu] code cleanup for nds32. 2017-10-09 18:06:58 +08:00
Bernard Xiong c2f028ed8d Update cpuport.c 2017-10-06 11:43:50 +08:00
Bernard Xiong ea18ef60ed Merge pull request #826 from ArcherChang/master 
[BSP] Add Andes N1068 porting and simple bsp.
 2017-10-06 11:03:02 +08:00
Bernard Xiong 0d193254f8 Merge pull request #845 from caogos/master 
[BSP] Add FPU option for loongson1c.
 2017-09-14 17:06:11 +08:00
勤为本 574e22bdbd 在配置文件“rtconfig.h”中增加硬浮点FPU的配置项， 
浮点经常会用到，所以默认使用硬浮点。
 2017-09-13 15:21:09 +08:00
aozima cb247e913f update libcpu: cortex-m0 fault handlers always enable. 2017-09-01 10:22:55 +08:00
Bernard Xiong 2ac493698b [BSP] cleanup for hifive1 bsp. 2017-08-26 11:02:39 +08:00
ArcherChang 652ea85a39 [1] Andes N1068体系移植 
a. Libc改用官方版本（工具链附带版本）；
    b. 去除未使用文件；
 2017-08-25 14:25:35 +08:00
Bernard Xiong b9ebd183ae Merge pull request #827 from caogos/master 
[BSP] Add EMAC driver in loongson1C (ported by chinesebear, https://github.com/chinesebear/rtt-net)
 2017-08-25 11:07:34 +08:00
ArcherChang 921fbfbc21 [1] 添加Andes N1068体系； 
[2] 基于AE210P EVB板；
[3] 详细信息参阅bsp/AE210P/readme文件夹；
    《Andes工程创建和调试》文档；等。
 2017-08-25 10:25:33 +08:00
aozima 9bbc4e5e6b update cortex-m libcpu: fixed compile error. 2017-08-23 16:13:51 +08:00
勤为本 838c63f365 添加龙芯1C片内网卡的驱动（原创作者是chinesebear，https://github.com/chinesebear/rtt-net） 2017-08-23 15:46:51 +08:00
aozima 9b7303e511 update libcpu: ensure fault enable. 2017-08-18 11:12:58 +08:00
Bernard Xiong 4626b19ead Merge pull request #784 from zhangjun1996/master 
[BSP] add bsp for sifive(risc-v e310).
 2017-08-10 16:51:59 +08:00
勤为本 7129d77bee 增加龙芯1c硬浮点的支持（可以使用硬浮点了） 2017-08-10 15:35:03 +08:00
zhangjun 72cfe9dd68 modify： drivers/cpuusage.c 
modify：     ../../libcpu/risc-v/e310/stack.c
	rmove unused macro definition
modify：     ../../src/idle.c
	Return to the original version
 2017-07-31 12:05:45 +08:00
zhangjun 0cd49e7c4a Merge branch 'master' of https://github.com/RT-Thread/rt-thread 
add new bsp for risc-v
 2017-07-31 11:27:46 +08:00
zhangjun e9f1bdf2da new file： ../../libcpu/risc-v/e310/trap.c 
add file that forget to submit before
	auto change timer mtimercmp register on the base of RT_TICK_PER_SECOND in rtconfig.h
	no flashing led
new file：   ../../src/idle.c
	recover old file
 2017-07-31 11:12:28 +08:00
zhangjun a5305c05df fix bug in context_gcc.s and start_gcc.s: 
save mie into stack
msh  running normaly
 2017-07-31 10:59:59 +08:00
zhangjun b032dff161 fix bug in rt_hw_context_switch_interrupt_do 
save sp to old thread
	clear rt_thread_switch_interrupt_flag
always enable interrupt after rt_hw_context_switch
judeg the type of interrupt in trap_entry, then call handler(Machine timer interrupt of Machine external interrupt)
 2017-07-30 19:46:28 +08:00
zhangjun 2d56a27c20 修改： ../../libcpu/risc-v/e310/context_gcc.S 
enable interrupt after return form rt_hw_context_switch
 2017-07-30 15:34:32 +08:00
zhangjun 3c51848d33 fix trap_entry 2017-07-29 15:37:20 +08:00
zhangjun b80f83f360 modified: ../../libcpu/risc-v/e310/context_gcc.S 
fix open timer intrrupt
 2017-07-26 16:27:54 +08:00
zhangjun 98a6896cfa remove "csrrc a5, mstatus, MSTATUS_MIE" in rt_hw_interrupt_enable(); 
it will lead to interrupt again in interrupt
 2017-07-26 16:07:01 +08:00
勤为本 358612c8a2 支持GPIO中断（外部中断） 2017-07-20 17:35:03 +08:00
勤为本 d1bb7c61f4 将支持的中断个数从32个扩展到160个，至此可以支持所有中断 2017-07-20 17:05:59 +08:00
勤为本 f39164203e 修正龙芯1c的中断号 2017-07-18 17:04:32 +08:00
zhangjun b334347a24 deleted: rtthread.s /*just for debug*/ 
modified:   ../../libcpu/risc-v/e310/context_gcc.S
	change  ret to mret and switch to new task with mepc
 2017-07-17 16:55:33 +08:00
zhangjun e01455155a add context_gcc.s 2017-07-17 15:44:00 +08:00
zchong-cht a74a2a25a8 Add libcpu/arm/am335x/context_iar.S file 2017-02-06 21:57:15 +08:00
kontais b96f07e477 flush cache after exception code install 2016-06-15 08:09:56 -07:00
Bernard Xiong 4e95fdff4a [BSP] Update VFP code in armv6. 
committed by FH.
 2016-05-20 14:20:34 +08:00
Bernard Xiong 923594c7ab [BSP] Enable VFP. 
committed by FH.
 2016-05-20 12:24:51 +08:00
Bernard Xiong 255f8b7c34 [BSP] Add BSP for Ingenic X1000 CPU 2016-04-24 19:34:41 +08:00
chinesebear 86216ceecc start exception by chinesebear 2016-04-19 22:08:23 +08:00
Bernard Xiong 43f68131ce [BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd. 
FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
 2016-04-18 13:52:39 +08:00
zchong_cht 3983f39f34 Add iar compiler support for am335x. 2015-11-11 23:44:05 +08:00
Bernard Xiong 3faca6d5df [BSP] update stm32f7-disco 
code cleanup.
 2015-09-24 16:03:09 +08:00
Bernard Xiong a0de58a008 [BSP] fix x86 bsp compiling issue 2015-09-15 11:50:29 +00:00
weety 2021f5a276 Add the license. 2015-09-04 21:58:08 +08:00
weety b71cb4c09d Add dm365 porting. 2015-09-04 12:30:20 +08:00
nongxiaoming af8a91457e [bsp]add the stm32f74x bsp. 2015-08-07 13:30:13 +08:00
chinesebear 4ad1b35537 chinesebear add bsp & libcpu 2015-07-09 07:38:07 +08:00
aozima 9fe3cbf76f Align thread stack to 8 byte. 2015-06-05 19:14:08 +08:00
aozima 314379cc77 implement __user_initial_stackheap 2015-06-04 12:23:24 +08:00
aozima be76b10be6 Align stack address to 8 byte. 2015-06-04 11:59:18 +08:00
aozima 1fa5711712 fixed assembly warnings. 2015-05-22 16:48:01 +08:00
aozima 73df162d3f fixed assembly warnings. 2015-05-13 11:57:34 +08:00
Adrian Huang 4222677933 [libcpu][am335x] Fix the booting failure when enabling MMU 
Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:

----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...

----------------------------------------------------------------

This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.
 2015-05-11 10:36:11 +08:00
ardafu a13132b302 [libcpu][arm926] Optimize irq trap code. 2015-05-04 16:13:43 +08:00
ardafu 49fa5c44d7 [libcpu][arm926] Optimize code 
1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
 2015-04-22 11:19:50 +08:00
ardafu 175e357ace [libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread. 2015-04-16 14:13:43 +08:00
ardafu cf3d639fcb [libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files. 2015-04-16 10:35:12 +08:00
ardafu 6aa242645f 1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function. 
2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain.
3. [bsp][sam9260] Move link strips in to folder link_scripts.
4. [libcpu][arm926] Add copy right to source file and format code.
 2015-04-15 16:13:30 +08:00
ardafu 39452b67b0 1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP 2015-04-14 21:56:34 +08:00
Bright Pan 0b5958d700 Fix compile warning: 
..\..\libcpu\arm\cortex-m3\context_rvds.S(207):
	warning: A1581W: Added 2 bytes of padding at address 0xd6
 2015-03-09 09:31:23 +08:00
limxuzheng 4fea46c83c support rx62n 2014-11-12 01:09:43 +08:00
陈豪 62af08370b Merge pull request #2 from RT-Thread/master 
sync
 2014-09-20 01:19:42 +08:00
bernard 267c61ebce [libcpu] Add builtin ffs implementation for Cortex-M4. 2014-09-11 12:51:33 +08:00
Grissiom 11fb9060e0 mips/loongson_1b: format code 2014-08-18 15:24:21 +08:00
Grissiom 0ee101ccb0 mips/loongson_1b: install NULL handler is OK 2014-08-18 15:22:16 +08:00
Grissiom 1d928f7daf mips/loongson_1b: fix rt_interrupt_dispatch 2014-08-18 15:21:09 +08:00
陈豪 fd6ef4b235 [libcpu]am335x edit vector 
vector_undef and vector_dabt
 2014-08-12 18:26:22 +08:00
aozima 2c47f2e683 Fix some spell error; 2014-07-31 13:59:25 +08:00
Bernard Xiong 2604440ceb [bsp] Remove none-released porting 2014-07-12 11:08:38 +08:00
Grissiom 97fb91dcc6 bsp: add zynq7000 2014-06-27 14:12:36 +08:00
Grissiom 2b7be29cad [bsp/rva8] enable group{0,1} interrupt forwarding in gic initialization 
When RT-Thread is running stand alone, it forgot to enable the
distributor of GIC.
 2014-04-08 11:54:03 +08:00
Grissiom c0f0c2322f [libcpu/arm] remove useless cpsr updating in rt_hw_context_switch_to 
This piece of code will enable the interrupt early before switching to
the first thread. Although it is harmless, but not prefect.
 2014-04-08 11:24:04 +08:00
Grissiom 28f11fdd7b [vmm] add realview-pb-a8 VMM support 2014-04-03 17:59:14 +08:00
RTsien 9382a7105f add CM_PER_UARTx_CLKCTRL 2014-01-11 15:14:36 +08:00
Grissiom 0c9b9ced31 cortex-r4: use byte to allocate the stack 
Unit of "byte" is more intuitive than "long".
 2013-11-17 12:49:08 +08:00
Grissiom a8520ed383 cortex-r4: let svc mode reuse the stack of IRQ on startup 
As the svc stack is the stack of threads, there is no need to allocate a
separate stack for the startup. Reuse the IRQ stack should be OK.

Tested on rm48 board.
 2013-11-17 12:49:07 +08:00
Bright Pan 06987e72e5 Fix hardfault bug for gcc port 
for 2013-02-20 aozima commmit "port for gcc", but the commit is
not tested,and the kernel is breakdown in context_gcc.S, the file
is a copy from cortex-m3,but not port for cortex-m0, so i complete
this port for aozima, test it in stm32f0discovery board ,
and it works fine.
 2013-11-04 16:10:11 +08:00
Grissiom 377c6e6cc9 cortex-r4: dump register on traps 
We could not handle any traps except IRQ/FIQ.
 2013-10-20 23:46:50 +08:00
Grissiom e1e563e85c cortex-r4: remove RM48x50.h and add armv7.h 2013-10-20 21:10:26 +08:00
Grissiom 81ab083ae5 rm48: move some asm file to libcpu 2013-10-20 18:51:46 +08:00
Grissiom 9568669109 rm48x50: add GCC support 2013-10-20 18:51:45 +08:00
Bernard Xiong 7bdb082c91 Delete SConscript 2013-09-22 06:59:52 +08:00
bernard 9d09cd9f23 Import beaglebone porting 2013-09-20 21:20:51 +08:00
Grissiom 3ebc766521 sim/posix: move rt_hw_context_switch_interrupt after it's definition 
This fix a compile error in Clang.
 2013-09-04 00:05:03 +08:00
Bernard Xiong e301d14979 Merge pull request #132 from MrVan/sep6200 
SEP6200 Support
 2013-07-29 22:35:31 -07:00
weety 37ac4855da Embedded GPLv2 license. 2013-07-21 20:01:24 +08:00
weety 36c4604a36 fix compiling error 2013-07-21 19:39:21 +08:00
weety 42f9840653 commit again 2013-07-21 17:32:55 +08:00
weety 3bdbf640b7 update at91sam9260 project directory structure. 2013-07-21 17:19:30 +08:00
weety 885301bb14 update AT91SAM9260 usart driver， using serial driver component. 2013-07-21 15:01:42 +08:00
Peng Fan 82bc21ff7b Cleanup and add licencse 2013-07-17 18:42:19 +08:00
Peng Fan 73beced22a SEP6200 Support 2013-07-17 13:37:31 +08:00
aozima ce4f0329db enhancement hard fault exception handler. 2013-07-09 22:02:12 +08:00
aozima 5120f54a29 fix spelling error. 2013-06-24 22:57:27 +08:00
aozima 34d59ccb0f update libcpu/arm/cortex-m4: support lazy stack optimized. 2013-06-23 18:10:46 +08:00
aozima b045f93b47 fixed bug: correct cortex-m SCB->VTOR address. 2013-06-23 18:08:16 +08:00
aozima 93b9b28297 format code by Astyle. 2013-06-23 18:07:10 +08:00
aozima a2ff85c03f update libcpu/arm/cortex-m0: restore MSP. 2013-06-22 18:59:51 +08:00
aozima 4d421cad73 update libcpu/arm/cortex-m3: restore MSP. 2013-06-22 18:59:50 +08:00
aozima f9e673354a update libcpu/arm/cortex-m4: restore MSP. 2013-06-22 18:59:49 +08:00
Bernard Xiong 3071e35c54 Merge pull request #109 from grissiom/rm48x50 
Rm48x50
 2013-06-19 01:29:12 -07:00
visitor83 c986754c49 Signed-off-by: visitor83 <wolflouiswang@gmail.com> 
format the s3c24x0 serial.c and mini2440 rtconfig.py
 2013-06-18 12:51:55 +08:00
visitor83 c56fa7c907 ident format 
Signed-off-by: visitor83 <root@wolflouis.(none)>
 2013-06-16 10:00:34 +08:00
Grissiom 009239ceed rm48x50: rt_interrupt_nest should be `volatile rt_uint8_t` 2013-06-12 23:56:10 +08:00
Grissiom 9b949c28b7 rm48x50: add cache_{enable, disable} 2013-06-12 21:03:04 +08:00
Grissiom e8bbbe6788 cortex-r4: wrap asm functions with .asmfunc/.endasmfunc 2013-06-05 23:21:06 +08:00
Grissiom 228a6be077 cortex-r4: add __rt_ffs 2013-06-05 23:20:39 +08:00
Grissiom e74befca44 move libcpu/arm/rm48x50/ to libcpu/arm/cortex-r4 2013-05-31 21:06:26 +08:00
Grissiom 24fc6e6ebb rm48x50: VFP lazy stacking 
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.

Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
 2013-05-31 20:58:08 +08:00
Grissiom 8bbfd45ce3 rm48x50: change STMFD/LDMFD to STMDB/LDMIA 
VFP instructions only have IA(Increment After)/DB(Decrement Before)
mode. To keep consistency, just change STM/LDM to DB/IA accordingly.
 2013-05-31 18:38:42 +08:00
Grissiom ec1203bfab rm48x50: turn on VFP support 
This support Common VFPv2 sub-architecture.
 2013-05-31 18:32:21 +08:00
Grissiom 83ea4dd628 rm48x50: small cleanup on context_ccs.asm 2013-05-30 17:37:50 +08:00
Grissiom 810311b624 rm48x50: fix bug in rt_hw_interrupt_{mask,unmask} 2013-05-29 23:36:32 +08:00
Grissiom f08df08897 rm48x50: optimize a BEQ 
Use condition flag in the ORR. This could eliminate a BEQ.
 2013-05-26 23:37:56 +08:00
Grissiom 19fe6251e7 rm48x50: optimize context_switch_interrupt_to by reuse registers 
When saving thread registers in context_switch_interrupt_to, we don't
change them, just move them. So there is no need to always r0-r3 from
stack to the real r0-r3. So just use the intermediate registers and
eliminate 2 MOV.
 2013-05-26 22:37:49 +08:00
Grissiom 3d0647efb3 rm48x50: optimize context_switch_interrupt_do 
Substitude STMFD, MOV, ADD with STMFD, SUB. It reduce one instruction.
Tested on board and it works like a charm.
 2013-05-26 17:22:36 +08:00
Grissiom b39d038cf0 rm48x50: utilize CPS instruction and remove some useless code 2013-05-26 16:55:39 +08:00
Grissiom f51bce3fed add rm48x50 bsp and libcpu 
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:

    1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
    channel 5 in enabled and connected to IRQ.

    2, RTI driver is enabled and compare3 source is selected to counter1
    and the compare3 will generate tick in the period of 10ms. This
    value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.

In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
 2013-05-24 22:55:13 +08:00
yiyue.fang db548a1b37 fixed compiling error related to the RT_USING_INTERRUPT_INFO in mini4020 2013-04-10 00:49:18 +08:00
weety d9d39a8d21 Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication. 2013-04-08 21:57:24 +08:00
weety 0594734d8d clean up code 2013-04-02 20:33:56 +08:00
weety 03aa76155e fixed context thread issue when using armcc compile 2013-04-02 20:27:08 +08:00
weety fb9ea5eada enable at91sam9260 mmu, update SDIO and EMAC drivers 2013-04-02 20:24:51 +08:00
weety 92d4c1939b fixed at91sam9260 context thread issue, avoid idle thread stack overflow 2013-04-02 20:23:11 +08:00
Bernard Xiong edef109d76 fix interrupt compiling issue in PPC 2013-03-31 22:58:36 -04:00
Bernard Xiong c1b600644f Merge pull request #56 from aozima/aozima 
Modify the interrupt interface implementations.
 2013-03-31 04:14:40 -07:00
aozima 2ccb3c7589 update LPC2478: Modify the interrupt interface implementations. 2013-03-31 18:25:51 +08:00
weety 710a0fc4a5 fix issue when print interrupt info 2013-03-31 18:24:51 +08:00
aozima 1549b7db90 update LPC214X: Modify the interrupt interface implementations. 2013-03-31 17:58:26 +08:00
aozima eab20a9975 update AT91SAM7X: Modify the interrupt interface implementations. 2013-03-31 17:43:09 +08:00
aozima 83ce430902 update loongson 1B dev: Modify the interrupt interface implementations. 2013-03-31 17:32:25 +08:00
aozima 93e04a1366 update loongson dev3210: Modify the interrupt interface implementations. 2013-03-31 17:32:20 +08:00
aozima 6058efbd9b update Jz47xx: Modify the interrupt interface implementations. 2013-03-31 17:32:16 +08:00
aozima 29a3ae4368 update sep4020: Modify the interrupt interface implementations. 2013-03-31 17:32:04 +08:00
aozima fbc1b05dd8 update mini2440: Modify the interrupt interface implementations. 2013-03-31 17:30:30 +08:00
Bernard Xiong 608074deaf update to interrupt description 2013-03-30 08:15:27 +08:00
Bernard Xiong 8e6a534fa3 fix compiling issue in Jz47XX 2013-03-26 09:08:25 +08:00
Bernard Xiong bb72be94b2 code cleanup for interrupt description 2013-03-26 08:52:33 +08:00
weety 5639c5daed implement __rt_ffs for armv5 2013-03-24 16:03:23 +08:00
Bernard Xiong 1abaa0492d implement __rt_ffs in kernel service library 2013-03-23 11:27:29 +08:00
weety 7917cf09e7 remain the old handler to keep forward compatibility 2013-03-19 11:25:46 +08:00
weety 9678ee67e9 Modified the interrupt function comments 2013-03-19 11:25:33 +08:00
weety b21028474b Modify the interrupt interface implementations, changes in the part of the parameter definition. 2013-03-19 11:25:12 +08:00
aozima be59c9287f fixed cache initial bug. 2013-03-08 11:23:40 +08:00
prife 9ccdf4172e basic mingw support for simulator: kernel and finsh 2013-02-26 16:03:08 +08:00
aozima d80888a194 port stm32f0x to gcc. 2013-02-20 22:03:31 +08:00
prife b8aaa6e730 clean code in cpu_port.c, add some comments 2013-01-16 18:49:07 +08:00
prife b8bd5c8309 fix bug in cpu_port.c(can work very well) 2013-01-15 23:59:14 +08:00
prife 395178ebfa rewrite cpu_port.c (but still has bug) 2013-01-15 21:38:54 +08:00
prife 07da6caafd surport finsh 2013-01-14 22:38:54 +08:00
prife 8f70786c30 add finsh, but still cannot work, only can be built with gcc 2013-01-14 16:50:40 +08:00
prife 7b42f926a0 re-write the rt_hw_interrupt_enable/disable 2013-01-14 14:14:40 +08:00
prife 5685a395be add some comments and clean code in cpu_port.c 2013-01-14 01:23:08 +08:00
prife 7b58dd92fa add libcpu/sim/posix/cpu_port.c 2013-01-13 22:58:45 +08:00
Bernard Xiong 72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
Ubuntu ecd66612cf remove lpc122x because there is a common cortex-m0 porting. 2013-01-04 06:03:03 -08:00
bernard.xiong@gmail.com 68fadd9edc Add exception hook function. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2551 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-29 09:36:16 +00:00
bernard.xiong@gmail.com ac9c373d7f Add thread name to Win32Thread. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2541 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-29 03:28:31 +00:00
goprife@gmail.com 8df650d861 clean code in sim/win32/cpu_port.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2536 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-27 08:31:53 +00:00
dzzxzz@gmail.com 468ade5e98 fixed the coding style in libcpu/arm 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2518 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 06:59:14 +00:00
dzzxzz@gmail.com f6629a1e4c rename the file name using low case 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2514 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:50:42 +00:00
dzzxzz@gmail.com eab30ebbda fixed the fixed the gcc compiling error in ubuntu host OS 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2512 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:34:04 +00:00
wuyangyong 5be0c53dd8 stack addr align to 8byte. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2509 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-23 07:40:31 +00:00
dzzxzz@gmail.com 2955dbfcda add LPC4330 BSP based on NGX xplorer development board 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2487 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-17 08:21:29 +00:00
bernard.xiong 6ae9a5d95c revert wrongly commit. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2408 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 08:10:23 +00:00
bernard.xiong f78a50883b remove nuc1xx because there is a cortex-m0 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2407 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 07:59:28 +00:00
bernard.xiong ec0cb881d8 remove lpc1100 because there is a cortex-m0 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2406 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 07:56:40 +00:00
nongli1031@gmail.com 6fe2afed8c for rt-thread 1.1.0 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2372 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-26 03:36:13 +00:00
goprife@gmail.com 20352571e2 add libcpu/sim/win32 to support the win32 bsp (compiled by visual studio) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2359 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-21 04:46:24 +00:00
goprife@gmail.com 806ecbbb2b update libcpu/SConscript to support cl(c compiler of visual studio) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2358 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-21 04:42:49 +00:00
bernard.xiong 0c13711396 Add taihu bsp (PPC405) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2350 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-14 23:28:37 +00:00
wuyangyong 0057604ad2 update hdisr_gcc.S: push argument for ISR. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2341 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-10 16:39:49 +00:00
dzzxzz@gmail.com e0a5c0ae81 save texit address in to thread stack in m16c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2308 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-26 06:43:35 +00:00
dzzxzz@gmail.com c784dd2ed8 update V850 BSP, now supporting scons + IAR 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2306 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-25 04:18:24 +00:00
dzzxzz@gmail.com 6dcb1207b1 initialize register r31(LP) with texit in V850/cpuport.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2305 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-25 03:19:43 +00:00
wuyangyong 056228cce6 fixed bug: store r8 - r11. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2258 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-08-22 15:53:54 +00:00
iamyhw@gmail.com 4455768b92 fixed s3c2440a context thread bug,patch contributor 
:yuxun2k

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2192 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-06-28 14:04:20 +00:00
wuyangyong a9aa8d503e add libcpu/cortex-m0. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2142 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-31 17:41:58 +00:00
mok.jingxian@gmail.com 5684d15916 add bf533 bsp and cpu files. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2138 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-30 11:29:34 +00:00
dzzxzz@gmail.com 0ce3aa056d update CMSIS RTOS API in MB9BF506R 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2117 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-15 06:16:37 +00:00
wuyangyong 04a79d24cf fix extern list_thread return type by arda. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2104 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-29 02:11:40 +00:00
bernard.xiong@gmail.com 090553f768 delete PK40X256VLQ100 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2081 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-16 05:04:30 +00:00
dzzxzz@gmail.com a321f3da64 support GNUC cross compiler(GNUM16CM32Cv1101-ELF) for renesas M16C porting 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2047 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-14 07:04:27 +00:00
luohui2320@gmail.com 8d4938ae70 delete libcpu/arm/at91sam926x/rt_list.h 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2008 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-03-23 15:07:21 +00:00
wuyangyong 38ba67a867 update libcpu cortex-m4. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1967 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-18 17:46:08 +00:00
wuyangyong 68bee363ff update IA32 branch for new rt-thread platform. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1948 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-16 04:19:20 +00:00
wuyangyong 7906287cfe IAR not support VSTMFD and VLDMFD, use VSTMDB and VLDMIA. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1947 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-16 03:45:50 +00:00
dzzxzz@gmail.com 645260a1c9 fixed a compiling error while not defined RT_USING_FINSH 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1906 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-01-03 09:08:47 +00:00
wuyangyong aad32f8546 support context switch load/store FPU register. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1901 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 20:25:44 +00:00
wuyangyong 1097104c7f fixed stack align issues. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1900 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 20:21:46 +00:00
bernard.xiong@gmail.com 3df72cc21f update file header. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1891 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 04:08:12 +00:00
wuyangyong 701df33436 remove libcpu/arm/lm3s libcpu/arm/lpc176x , update bsp lm3s lpc176x. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1865 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-23 01:36:10 +00:00
dzzxzz d6892fb441 all FM3 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/fm3 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1861 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-22 00:46:34 +00:00
dzzxzz 8b64d24bd4 all STM32 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/stm32 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1858 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-21 09:44:52 +00:00
dzzxzz 9c8398a10b fixed scons + IAR compiling error for stm32f107 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1855 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-21 07:20:51 +00:00
wuyangyong 2622f51496 add thumb mode porting. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1854 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-20 16:06:20 +00:00
wuyangyong f1b07348c2 update libcpu lpc2478. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1852 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-20 09:03:46 +00:00
wuyangyong c808894735 update libcpu lpc2148. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1850 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-20 08:45:01 +00:00
nongli1031@gmail.com 212d828d3f change thread return address. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1848 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-19 01:46:19 +00:00
nongli1031@gmail.com da542ee0ca git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1847 bbd45198-f89e-11dd-88c7-29a3b14d5316 2011-12-18 05:36:26 +00:00
nongli1031@gmail.com c66c182894 git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1846 bbd45198-f89e-11dd-88c7-29a3b14d5316 2011-12-18 05:16:43 +00:00
nongli1031@gmail.com 90c43598fc delete microbalze.inc 
此行及以下内容将会被忽略--

D    microblaze/microbalze.inc


git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1845 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-18 05:16:01 +00:00
nongli1031@gmail.com ae73bd59bc modify format 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1844 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-18 05:13:10 +00:00
nongli1031@gmail.com 08f25161d9 porting for microblaze. nl1031 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1843 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-17 04:14:22 +00:00
bernard.xiong@gmail.com 462cfdc3e0 add fatal event handler in ARM7TDMI. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1819 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-11-29 10:17:51 +00:00
onelife.real ed9828226a *** EFM32 branch *** 
1. Move file, "start_gcc.S", from "libcpu/arm/cortex-m3/" to "bsp/efm32/" 
2. Upgrade EFM32 driver libraries (CMSIS and efm32lib) to version 2.2.2 
3. Upgrade EFM32 G2xx development kit drivers (EFM32_Gxxx_DK) to version 1.7.2 (from version 1.6.0) 
4. Modify the files ("drv_usart.c" and "drv_iic.c") according to the driver libraries upgrading 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1818 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-11-29 09:15:10 +00:00