Commit Graph

20 Commits

Author SHA1 Message Date
Yuqiang Wang b3d59050b0
[kernel] Specification interrupt nested level variable declaration type (#9568) 2024-10-23 17:08:29 -04:00
Z8MAN8 742dae7220 bsp: cvitek: Add timer driver
Signed-off-by: Shicheng Chu <1468559561@qq.com>
2024-08-25 12:11:57 -04:00
Z8MAN8 f5156774b2 bsp: cvitek: Canonically rename some macro definitions
Analysis: Some macro definition names are not standardized
and lack prefixes.

Solution: Add BSP_ prefix to GPIO_IRQ_BASE SYS_GPIO_IRQ_BASE
PLIC_PHY_ADDR TIMER_CLK_FREQ UART_IRQ_BASE I2C_IRQ_BASE.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
2024-08-20 09:52:18 +08:00
Z8MAN8 b6c26d4537 bsp: cvitek: fix c906_little IRQ_MAX_NR error num
Analysis: The IRQ_MAX_NR value of c906_little is wrong.
interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but
does not explicitly include this header file.

Solution: Change IRQ_MAX_NR to the correct value 61 in
the datasheet. Explicitly include rtconfig.h in interrupt.h.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-08-07 11:35:27 +08:00
Chen Wang d8294de640 bsp:cvitek: add pinmux for adc
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 2c85bcb463 bsp:cvitek: add pinmux for spi
Board level pin available info:

duo & duo256:

NAME    SPI         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP6     SPI2_SCK    PWR_GPIO[23]    SD1_CLK__SPI2_SCK
GP7     SPI2_SDO    PWR_GPIO[22]    SD1_CMD__SPI2_SDO
GP8     SPI2_SDI    PWR_GPIO[21]    SD1_D0__SPI2_SDI
GP9     SPI2_CS_X   PWR_GPIO[18]    SD1_D3__SPI2_CS_X

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 51825a5b5c bsp:cvitek: add pinmux for pwm
Board level pin available info is summarized and list here for memo:

Duo:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP2     PWM10       PWR_GPIO[26]    SD1_GPIO1__PWM_10
GP3     PWM11       PWR_GPIO[25]    SD1_GPIO0__PWM_11

Duo256:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP3     PWM6        XGPIOA[18]      JTAG_CPU_TCK__PWM_6
GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP2     PWM7        XGPIOA[19]      JTAG_CPU_TMS__PWM_7
GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP10    PWM10       XGPIOC[14]      PAD_MIPI_TXM1__PWM_10
GP11    PWM11       XGPIOC[15]      PAD_MIPI_TXP1__PWM_11

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 114e143d56 bsp:cvitek: add pinmux for uart
Board level UART pinmux summary, following capability
should be controlled by pinname whitelist.

Duo:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

GP3     UART4_RX    PWR_GPIO[25]    SD1_GPIO0__UART4_RX
GP2     UART4_TX    PWR_GPIO[26]    SD1_GPIO1__UART4_TX

Duo 256m:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP3     UART1_RX    XGPIOA[18]      JTAG_CPU_TCK__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP2     UART1_TX    XGPIOA[19]      JTAG_CPU_TMS__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

Note: this patch also update the .config and rtconfig.h
because this patch modify some configuration items's name,
for example: RT_USIMG_UART0 -> BSP_USING_UART0.

FIXME: only handle RISC-V related, no ARM.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang e1eb3d3217 bsp:cvitek: add pinmux for i2c
Based on new pinmux framework, add configuration for uart.

Board level pin available info is summarized and should be
controlled by pin whitelist.

Duo

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo256m

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S(Note, we have not supported duo S, just list for memo)

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 80668e0ba2 bsp:cvitek: revert add i2c pinmux config for c906
The contents of the SOC type part in the Kconfig configuration
are retained, and other parts related to I2C pin multiplexing
selection have been rolled back.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
2024-07-16 11:37:23 +08:00
Chen Wang 5dd3b7427a
Accumulated patchsets for bsp/cvitek (#8968)
* bsp: cvitek: kconfig: add wdt for cv18xx_riscv

Add Watchdog timer in Kconfig.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* drv: cvitek: remove using macro from source file

Building of source file should be controlled by SConscript,
but not in source file itself.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add i2c for cv18xx_riscv

Add I2C in Kconfig for c906B.

Note, the IRQ# is different from that of c906L.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add rtc for cv18xx_riscv

Add RTC in Kconfig for c906B.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: fix channel issue for pwm driver

The original code confuses the concepts of controllers and channels.
Fixed it and do some code cleanup.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for cv18xx_riscv

Pinmux in driver code is controlled by SOC type, bcos driver
code should be general and support all pins defined by SoC.

Pinmux configuration in Kconfig is controlled by BOARD type,
bcos when we operate on board, it does not expose all chip-level
pin signals and we can only use part of them.

Following is I2C signals exported by duo family. Details see
https://milkv.io/docs/duo/overview.

Note: we have not added support for duo-S.

Duo
===

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo 256m
========

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S
=====

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>

* bsp:cvitek: remove using macro from source file for i2c

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: unify menu message text for i2c as other drivers

Other dirvers has no extra word "HW".

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for c906_little

Porting what we have done in commit "bsp:cvitek: add i2c pinmux config
for cv18xx_riscv" to c906_little.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

---------

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>
Co-authored-by: flyingcys <flyingcys@163.com>
2024-05-22 08:19:07 +08:00
Jingbao Qiu c24280f6ef [bsp][CV1800B] add SPI driver for CV1800B
Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
2024-04-01 17:41:09 -04:00
flyingcys 40e26f4909
support cv181x c906_little (#8680) 2024-03-28 23:35:54 +08:00
Shicheng Chu 5d70f98e4d
[bsp][cvitek] add rtc driver (#8586) 2024-03-07 17:18:53 -05:00
Z8MAN8 5e892607fa [bsp][cvitek] add wdt driver 2024-03-03 14:40:15 -05:00
flyingcys aa04a59805
[bsp/cvitek]add pwm driver (#8571) 2024-03-02 16:16:22 +08:00
flyingcys 3816d9fba4
[bsp/cvitek]add adc driver (#8562) 2024-02-28 00:04:31 +08:00
flyingcys ac2f7f05bf
[bsp][cvitek] 修复cv1800b默认中断号的配置问题 2024-02-18 12:42:06 -05:00
Shicheng Chu abba40183e
[bsp][cvitek]: add c906_little i2c driver (#8535) 2024-02-15 18:05:39 -05:00
flyingcys a07442edf9
add cvitek/c906_little (#8514) 2024-01-29 09:13:21 +08:00