b3d59050b0
[kernel] Specification interrupt nested level variable declaration type ( #9568 )
2024-10-23 17:08:29 -04:00
6d4503363a
[libcpu][SConscript]规范group名为libcpu
2024-02-20 08:39:05 +08:00
6bd22f3e6f
替换RTThread旧版文件头注释版权声明 ( #5774 )
2022-04-05 19:34:30 +08:00
563e49890c
[asm] 解决tab和空格混用的问题
2022-01-20 20:57:35 +08:00
6c907c3a47
[libcpu] auto formatted
2021-03-27 17:51:56 +08:00
ef62febf1f
[SConscript]update group name
2020-12-19 16:49:11 +08:00
ba83ddc3c4
[SConscript] change libcpu to LIBARCH,and correcte letter case
2020-11-30 15:52:43 +08:00
91261e25b9
[SConscript]rename group name
2020-11-20 13:38:11 +08:00
bd8f0d0423
[libcpu] Fix the build directory issue
2019-03-26 13:36:01 +00:00
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
72782e9203
convert end of line
2013-01-08 05:05:02 -08:00
e0a5c0ae81
save texit address in to thread stack in m16c
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2308 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-09-26 06:43:35 +00:00
a321f3da64
support GNUC cross compiler(GNUM16CM32Cv1101-ELF) for renesas M16C porting
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2047 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-04-14 07:04:27 +00:00
e97c87d6a0
fixed a compile error while using scons+iar for m16c
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1740 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-10-07 03:00:12 +00:00
f7d1ca323b
fixed a spelling error
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rt_thread_switch_interrput_flag -> rt_thread_switch_interrupt_flag
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1704 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-09-09 07:30:39 +00:00
55a2684e56
improve the renesas M16C porting
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it can be worked in NORMAL or SIMPLE calling convention
and in all the optimize level(none, low, medium, high)
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1691 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-09-02 06:56:22 +00:00
e8a462b5c7
optimize porting for M16C
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void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to);
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1688 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-09-01 08:25:54 +00:00
61d969f1b9
merge stack.c and interrupt.c into cpuport.c
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1687 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-09-01 08:05:21 +00:00
fac560d432
add context_iar.S for SCONS
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actually context_iar.S is the same as context_iar.asm
but context_iar.S is used for SCONS, and context_iar.asm is used for IAR
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1272 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-02-16 13:47:44 +00:00
29db3e3295
get ready for SCONS
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change the m16c assembly extension from s34 to asm
move the m16c porting files to m16c62p directory
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1270 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-02-16 13:29:09 +00:00
367015d3fd
move peripheral ISR from libcpu/m16c/context.asm to bsp/interrupts.s34
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@658 bbd45198-f89e-11dd-88c7-29a3b14d5316
2010-04-20 03:26:11 +00:00
005d4141d9
rewrite 3 functions in context.asm for M16C port
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rt_hw_context_switch()
rt_hw_interrupt_disable()
rt_hw_interrupt_enable()
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@654 bbd45198-f89e-11dd-88c7-29a3b14d5316
2010-04-20 01:00:45 +00:00
02564df01e
port rt-thread to M16C
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@619 bbd45198-f89e-11dd-88c7-29a3b14d5316
2010-04-14 00:21:14 +00:00
Yuqiang Wang
Meco Man
yangjie
BernardXiong
dzzxzz@gmail.com