These changes are designed to standardize the memory management across
'virt64' and 'c906', ensuring efficient handling of address spaces and
page tables.
Changes:
- Creation of ASID management files (`asid.c`) for both 'c906' and
'virt64' architectures, which is essential for maintaining stability.
- Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files.
- Addition of functions to manage ASID allocation and switching of page tables.
- For c906, accommodated the early memory setup to the one from virt64.
Signed-off-by: Shell <smokewood@qq.com>
* [libcpu/risc-v] support noncached normal memory
* [mm] check before dereference in _fetch_page
* [mm] add comments on ioremap
* [ioremap] report more info on failed
* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
Shell
Yuqiang Wang
geniusgogo
Shell
guo