Commit Graph

472 Commits

Author SHA1 Message Date
Rbb666 7ace7d0a78 [libcpu][renesas]add cortex-m85 && ek-ra8m1 adapt 2023-10-31 15:09:17 +08:00
tangzz98 acc66c5479
实现MPU抽象层 (#8080)
- 为RT-Thread设计MPU抽象层,支持ARMV7-M,ARMV8-M架构,让用户使用MPU检测栈溢出等内存问题,实现线程内存隔离
- 在components/mp目录下提供通用的API,libcpu目录下提供各处理器架构的具体实现
- 在STM32U575 NUCLEO, STM32H75 NUCLEO开发板测试通过
2023-10-30 08:24:55 -04:00
Shell 70a8d1d465
[kservice] improve backtrace service in kernel (#8144)
Signed-off-by: Shell <smokewood@qq.com>
2023-10-21 20:14:45 +08:00
Shell 1d678e5596
[smart] fixup: mmap support (#8154)
Signed-off-by: Shell <smokewood@qq.com>
2023-10-20 13:28:20 +08:00
geniusgogo ecd29fda60
Sync dfs lwp (#8123) 2023-10-17 13:07:59 +08:00
guozhanxin d8a2084c05 [libcpu/cortex-a] Fix the problem of circular include of cpuport.h 2023-09-27 10:16:46 +08:00
Meco Man 47a3139b63 [iar]修复__LDREX 和 __STREX 报 declared implicitly 警告
related: https://github.com/RT-Thread/rt-thread/issues/7381
2023-09-20 10:01:25 +08:00
Shell 47b183a297
[smart/syscall] fix exit(2) and add exit_group(2) (#8005)
Signed-off-by: shell <smokewood@qq.com>
Signed-off-by: shell <wangxiaoyao@rt-thread.com>
Signed-off-by: Shell <smokewood@qq.com>
2023-09-09 09:35:56 +08:00
Wayne Lin 86f72ed6da Update NuMaker-M2354 BSP building.
1. Remove rt_hw_cpu_reset implementation in libcpu.
2. Update configuration.
3. Add drv_log.h for building.
4. Fix warnings.
2023-08-24 12:54:19 -04:00
Shell d862816a51
[components/mm] add unmap page API (#7834)
Signed-off-by: Shell <smokewood@qq.com>
2023-08-16 15:38:59 +08:00
Meco Man c6a2f5b7bd rt_hw_cpu_shutdown: implement default weak function
and remvoe duplicated default functions in each cpu/bsp level
2023-08-08 22:34:25 -04:00
Meco Man cb810dfe75 rt_hw_cpu_reset: remove all other rt_weak 2023-08-08 22:34:25 -04:00
Shell acfa74f078
[libcpu/arm] fix race condition with ldrex,strex (#7842)
Signed-off-by: Shell <smokewood@qq.com>
2023-07-25 14:07:44 +08:00
Man, Jianting (Meco) 244b903e5d
[debug] 整理debug宏并增加RT_DEBUGING_CONTEXT (#7805) 2023-07-22 10:36:42 +08:00
lepus 2741bec8f7
[libcpu][cortex-a]modified start_gcc.S (#7810) 2023-07-14 23:12:04 +08:00
Supper Thomas 350626841a
[libcpu]fix RT_ASSERT undefine (#7816) 2023-07-14 09:47:02 +08:00
程蒙蒙 33f5de4411
[atomic][IAR]修复IAR编译报警 函数“__LDREX”隐式声明 (#7733) 2023-06-29 00:04:06 +08:00
Wayne ed4b4ca9e6
[libcpu] [cortex-a] Revert RT_SMP_AUTO_BOOT. (#7549)
Co-authored-by: Wayne Lin <wclin@nuvoton.com>
2023-05-29 15:23:42 +08:00
Bernard Xiong 4b4c3c85f2
[atomic] add stdc atomic detection. (#7536) 2023-05-20 23:41:29 +08:00
huanghe 9217865c6a
[libcpu] fix arm/cortex-a/start_gcc.S (#7515) 2023-05-19 11:32:58 +08:00
guozhanxin 82ccbc40db support llvm-arm 16.0 2023-05-17 12:09:10 -04:00
Shell b7554a70d2
[libcpu][component][debug] add debug info for gdb (#7033) 2023-05-14 23:48:16 +08:00
huanghe 50a4e8c662
[bsp][phytium]适配rt-thread5.0.0 版本 (#7441)
Co-authored-by: 朱耿宇 <zhugengyu@phytium.com.cn>
2023-05-11 10:25:21 +08:00
WuxiaBai 4eeca5049e
[HUST CSE][libcpu][s3c44b0]Same expression on both sides of '|' 2023-04-28 17:58:59 -04:00
4b2a44f39e
修复 atomic_arm.c 多次指定类型限定符问题 (#7393) 2023-04-27 07:09:38 +08:00
wangqinglin fbc1d6f4fd
[fix]:修复GICv2、GICv3中断触发模式设置无效的问题 (#7358) 2023-04-24 17:06:31 +08:00
wangqinglin ac07f40670
优化设置中断模式api (#7359) 2023-04-24 14:16:21 +08:00
Shicheng Chu 93f3cb30e4
[kernel] 将rt_thread结构体改为显式继承rt_object (#7131) 2023-04-04 09:06:27 -04:00
Wayne 3309ef6001
[libcpu/arm/cortex-a] Revert safety MMU initialization. (#6796)
* Revert safety MMU initialization.

Co-authored-by: Wayne Lin <wclin@nuvoton.com>
2023-03-31 10:06:28 +08:00
Yaochenger 38eb3fc40f
[utest][atomic]添加返回值测试 (#7124)
* [utest][atomic]添加返回值测试
2023-03-30 11:06:21 +08:00
Shell eec78d9f5d
[rt-smart] testcase & improvements for memory management (#7099)
* [utest/mm] add testcase for create/init
format codes of create/init in components/mm

* [libcpu/aarch64] fix user stack check routine

* [kservice] export API for utest

* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map

* [lwp/user_mm] add user_map_varea for mmap feature

* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix

* [utest/mm] testcase for synchronization

* [mm] modify unmap api to improve throughput

* [utest/mm] testcases for cache and varea map

* [format] remove extra space

* [utest/mm] fix testcase problem in header

* [lwp] extend map_user_varea with a flag

* [utest/mm] testcase for lwp_map_user_varea

* [libcpu/arm/cortex-a] fix kernel space layout

* [utest/mm] adjust for armv7 arch
2023-03-30 08:25:15 +08:00
Yaochenger de4f237482
[atomic]添加arm与risc-v下的常用原子操作函数 (#7053)
* Update Kconfig
* Update trap_gcc.S
* Update bsp/hifive1/drivers/SConscript

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
* Update SConscript
* [atomic]提交一份arm与risc-v架构下的常用原子操作函数
* 修改变量类型
* 更新rtatomic.h与atomic_port.c
* 更新rt-thread\libcpu\arm\common\atomic_port.c
* 更新include/rtatomic.h与libcpu/arm/common/SConscript
* 更新include/rtatomic.h
* 修正格式与Kconfig
* 修正格式与文件结构

* 规范文件格式与文件重命名
* 添加测试用例与CI
* 添加函数声明
* 修改virt64/SConscript 添加atomic_riscv.c
  * 1.规范代码风格
  * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误
* 添加C11标准库原子操作测试

---------

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
2023-03-23 20:06:50 +08:00
Shell 18a14cc935
[rt-smart] move sys_cacheflush to lwp_syscall.c (#7048)
* [syscall] move sys_cacheflush to lwp_syscall.c

* [syscall] improve assertion

* [format] rename to rt_ctassert

* [debug] modified ct assertion on mm_page.c
2023-03-17 15:11:38 +08:00
wangxiaoyao 484a0d602e [fixup] add cache maintenance ops;
fix bugs on cache maintenance when starting user app
2023-02-21 08:48:49 +08:00
Shell 2d09749086
[rt-smart] PV_OFFSET as a variable (#6904)
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces
2023-02-14 23:08:32 +08:00
Meco Man f58d3c5200 rt_device_write/read return data type as rt_ssize_t
rt_ssize_t can give negative error code, which follows the unix style correctly
2023-02-07 21:43:57 -05:00
wdfk-prog 7296117203 [cortex-m7]rt_hw_cpu_dcache_ops函数uint32_t替换为rt_uint32_t 2023-02-07 12:05:27 -05:00
Shell 7450ef6c4d
[rt-smart] kernel virtual memory management layer (#6809)
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
2023-01-08 21:08:55 -05:00
guo 68ca9f07a6
[rt-smart] 弱化 RT_USING_LWP,使用 RT_USING_SMART 作为宏配置 (#6740)
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.
2022-12-16 18:38:28 +08:00
guozhanxin e2bdd8a184 [libcpu] fix cpp11 error 2022-12-14 11:04:00 +08:00
Man, Jianting (Meco) 99bdf978d7
[rtdef] use lower-case to define attributes (#6728)
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
2022-12-11 13:12:03 -05:00
guo ecf2d82159
sync branch rt-smart. (#6641)
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
xiaoguang_ma 16f6157b1e [bsp] faster startup for cortex-a
If the application defines dozens of global variables,
the speed of clearing the bss segment will be slower.

Because icache can be enabled before the mmu enabled.
Therefore, in order to speed up the process of clearing the BSS segment,
enable icache needs to be put ahead.
2022-11-25 18:04:35 +09:00
Wayne Lin ece0c6eef8 Move gtimer driver to libcpu. 2022-10-11 08:46:01 +08:00
Wayne 5d014e8d31 Revert "[libcpu] remove gtimer/pmu from cortex-a" 2022-10-11 08:46:01 +08:00
YangZhongQing 50cb4be8ce
bsp beaglebone: add IAR support (#6443)
* bsp beaglebone: add IAR template files and fix it's build error

ATTENTION:
project.* was generated by scons, so I add it to gitignore.
rtconfig.py *FLAGS located in "PLATFORM == 'iccarm'" are unverified and maybe wrong.
(我只是从STM32里面抄来,然后根据自己的理解改了一下,并没有验证这些参数的正确性,
我也不知道怎么用命令行调用这些参数来编译)

* bsp beaglebone: add beaglebone_ram.icf ROM address from uboot_cmd.txt

am335x_DDR.icf use 0x82000000, different to uboot_cmd.txt & gcc beaglebone_ram.lds,
the difference will easy cause later developer got below error:

=> go 0x80200000
## Starting application at 0x80200000 ...
undefined instruction
pc : [<8200956c>]	   lr : [<8ff62497>]
reloc pc : [<728a956c>]	   lr : [<80802497>]
sp : 8df37358  ip : 00000000	 fp : 00000002
r10: 8df4d448  r9 : 8df3feb8	 r8 : 8ffd30f8
r7 : 8ff78089  r6 : 00000002	 r5 : 80200000  r4 : 8df4d44c
r3 : 80200000  r2 : 8df4d44c	 r1 : 8df4d44c  r0 : 00000001
Flags: nzCv  IRQs off  FIQs on  Mode SVC_32
Code: 5dbffcdd bb9bdf7f abf85423 eff1f77f (7ed7daaf)
Resetting CPU ...

resetting ...

* libcpu am335x: context_iar.S rt_hw_context_switch: add thumb mode support

IAR new project defualt Processor mode is Thumb, this will cause user
easy occur the following error:
...
msh />Execption:
r00:0x8800aaa8 r01:0x802080c5 r02:0x00000000 r03:0x88009b4c
r04:0x00001000 r05:0x00000000 r06:0x00001403 r07:0x00100000
r08:0x00000000 r09:0x00000000 r10:0x0000000a
fp :0x0000000a ip :0x65687374
sp :0x00006c6c lr :0x0000008a pc :0x88008be0
cpsr:0x880001bc
software interrupt
shutdown...
(0) assertion failed at function:rt_hw_cpu_shutdown, line number:160

* bsp beaglebone: change IAR template.ewp code use Arm mode

Arm mode bin size will bigger than Thumb mode

* libcpu am335x: IAR: use rt_hw_cpu_dcache_enable instead of rt_cpu_dcache_enable

Reviewer mysterywolf say:
麻烦把rt_cpu_icache_enable 和 rt_cpu_dcache_enable, 统一改成 rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable
rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable 是其他bsp也是这么命名的 这是个命名统一的函数
2022-09-22 14:13:34 +08:00
Man, Jianting (Meco) 1249bc45f9
完善bsp beaglebone的基本使用 (#6434)
* bsp beaglebone: rerun menuconfg

* bsp beaglebone: add uart0 support

* bsp beaglebone: use uart0 as console

* bsp beaglebone: add heap init

fix rt_application_init() error:
(m != RT_NULL) assertion failed at function:rt_smem_alloc, line number:288

* bsp beaglebone: add mmu & interrupt init

must init mmu, otherwise no interrupt is generated, cause scheduler can't work.
I don't know why need mmu, just seen: bsp/rockchip/rk3568/driver/board.c

* libcpu am335x: reset interrupt controller before init vector

I think reset before init is more better

AM335X_StarterWare_02_00_01_01\system_config\armv7a\am335x\interrupt.c
IntAINTCInit()

* bsp beaglebone: full gpio driver support

* bsp beaglebone: add tftpboot way to uboot_cmd.txt

* bsp beaglebone: optimize am33xx_gpio_hdr, check irqstatus is the last one

Co-authored-by: YangZhongQing <vipox@qq.com>
2022-09-15 23:56:31 -04:00
Zhang WenBin e2368bf7f3 fix: 修复arm926异常时打印栈名乱码 2022-09-05 11:07:06 +08:00
Martin e4d6dd88c9 [libcpu][arm] fix rt_hw_cpu_dcache_ops clean invalid bug
clean_invalid must be set at the same time, and call
clean_invalid, or call clean/invalid
2022-08-13 22:12:17 -04:00
tfx2001 21ee452661 [libcpu][arm] fix armclang error when enable LTO 2022-08-11 08:35:42 -04:00