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rt-thread-official
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17 Commits

Author SHA1 Message Date
yangjie11 ba83ddc3c4 [SConscript] change libcpu to LIBARCH,and correcte letter case 2020-11-30 15:52:43 +08:00
yangjie11 91261e25b9 [SConscript]rename group name 2020-11-20 13:38:11 +08:00
BernardXiong bd8f0d0423 [libcpu] Fix the build directory issue 2019-03-26 13:36:01 +00:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
Bernard Xiong 72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
dzzxzz@gmail.com e0a5c0ae81 save texit address in to thread stack in m16c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2308 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-26 06:43:35 +00:00
dzzxzz@gmail.com a321f3da64 support GNUC cross compiler(GNUM16CM32Cv1101-ELF) for renesas M16C porting 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2047 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-14 07:04:27 +00:00
dzzxzz e97c87d6a0 fixed a compile error while using scons+iar for m16c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1740 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-10-07 03:00:12 +00:00
dzzxzz f7d1ca323b fixed a spelling error 
rt_thread_switch_interrput_flag -> rt_thread_switch_interrupt_flag

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1704 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-09 07:30:39 +00:00
dzzxzz 55a2684e56 improve the renesas M16C porting 
it can be worked in NORMAL or SIMPLE calling convention
and in all the optimize level(none, low, medium, high)

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1691 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-02 06:56:22 +00:00
dzzxzz e8a462b5c7 optimize porting for M16C 
void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to);

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1688 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-01 08:25:54 +00:00
dzzxzz 61d969f1b9 merge stack.c and interrupt.c into cpuport.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1687 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-09-01 08:05:21 +00:00
dzzxzz fac560d432 add context_iar.S for SCONS 
actually context_iar.S is the same as context_iar.asm
but context_iar.S is used for SCONS, and context_iar.asm is used for IAR

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1272 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-02-16 13:47:44 +00:00
dzzxzz 29db3e3295 get ready for SCONS 
change the m16c assembly extension from s34 to asm
move the m16c porting files to m16c62p directory


git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1270 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-02-16 13:29:09 +00:00
dzzxzz 367015d3fd move peripheral ISR from libcpu/m16c/context.asm to bsp/interrupts.s34 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@658 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2010-04-20 03:26:11 +00:00
dzzxzz 005d4141d9 rewrite 3 functions in context.asm for M16C port 
rt_hw_context_switch()
rt_hw_interrupt_disable()
rt_hw_interrupt_enable()

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@654 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2010-04-20 01:00:45 +00:00
dzzxzz 02564df01e port rt-thread to M16C 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@619 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2010-04-14 00:21:14 +00:00