qz721
|
b10039f396
|
Disable the data alignment check.
|
2019-04-01 14:21:59 +08:00 |
|
qz721
|
fbd40fc5b8
|
Add standard rt-thread cache interfaces for arm/cortex-a.
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
|
2019-03-29 20:22:25 +08:00 |
|
qz721
|
2eb1bef773
|
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
|
2019-03-25 20:03:49 +08:00 |
Bernard Xiong
|
bde47018b8
|
[libcpu] Add SConscript in libcpu.
|
2019-01-07 06:09:45 +08:00 |
liruncong
|
cbe07afabe
|
[libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定
|
2018-12-05 20:35:34 +08:00 |
|
Bernard Xiong
|
7c425408b4
|
[license] Change the license of libarm to Apache.
|
2018-10-15 01:35:07 +08:00 |
SummerGift
|
fc7a5abc76
|
[libcpu]: add 8-byte alignment for arm architecture && optimize code format
|
2017-12-21 16:37:38 +08:00 |
|
Bernard Xiong
|
f6170a6e5b
|
[BSP] add i.MX 6UL BSP
|
2017-11-01 13:30:17 +08:00 |