* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
* bsp beaglebone: add IAR template files and fix it's build error
ATTENTION:
project.* was generated by scons, so I add it to gitignore.
rtconfig.py *FLAGS located in "PLATFORM == 'iccarm'" are unverified and maybe wrong.
(我只是从STM32里面抄来,然后根据自己的理解改了一下,并没有验证这些参数的正确性,
我也不知道怎么用命令行调用这些参数来编译)
* bsp beaglebone: add beaglebone_ram.icf ROM address from uboot_cmd.txt
am335x_DDR.icf use 0x82000000, different to uboot_cmd.txt & gcc beaglebone_ram.lds,
the difference will easy cause later developer got below error:
=> go 0x80200000
## Starting application at 0x80200000 ...
undefined instruction
pc : [<8200956c>] lr : [<8ff62497>]
reloc pc : [<728a956c>] lr : [<80802497>]
sp : 8df37358 ip : 00000000 fp : 00000002
r10: 8df4d448 r9 : 8df3feb8 r8 : 8ffd30f8
r7 : 8ff78089 r6 : 00000002 r5 : 80200000 r4 : 8df4d44c
r3 : 80200000 r2 : 8df4d44c r1 : 8df4d44c r0 : 00000001
Flags: nzCv IRQs off FIQs on Mode SVC_32
Code: 5dbffcdd bb9bdf7f abf85423 eff1f77f (7ed7daaf)
Resetting CPU ...
resetting ...
* libcpu am335x: context_iar.S rt_hw_context_switch: add thumb mode support
IAR new project defualt Processor mode is Thumb, this will cause user
easy occur the following error:
...
msh />Execption:
r00:0x8800aaa8 r01:0x802080c5 r02:0x00000000 r03:0x88009b4c
r04:0x00001000 r05:0x00000000 r06:0x00001403 r07:0x00100000
r08:0x00000000 r09:0x00000000 r10:0x0000000a
fp :0x0000000a ip :0x65687374
sp :0x00006c6c lr :0x0000008a pc :0x88008be0
cpsr:0x880001bc
software interrupt
shutdown...
(0) assertion failed at function:rt_hw_cpu_shutdown, line number:160
* bsp beaglebone: change IAR template.ewp code use Arm mode
Arm mode bin size will bigger than Thumb mode
* libcpu am335x: IAR: use rt_hw_cpu_dcache_enable instead of rt_cpu_dcache_enable
Reviewer mysterywolf say:
麻烦把rt_cpu_icache_enable 和 rt_cpu_dcache_enable, 统一改成 rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable
rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable 是其他bsp也是这么命名的 这是个命名统一的函数
* bsp beaglebone: rerun menuconfg
* bsp beaglebone: add uart0 support
* bsp beaglebone: use uart0 as console
* bsp beaglebone: add heap init
fix rt_application_init() error:
(m != RT_NULL) assertion failed at function:rt_smem_alloc, line number:288
* bsp beaglebone: add mmu & interrupt init
must init mmu, otherwise no interrupt is generated, cause scheduler can't work.
I don't know why need mmu, just seen: bsp/rockchip/rk3568/driver/board.c
* libcpu am335x: reset interrupt controller before init vector
I think reset before init is more better
AM335X_StarterWare_02_00_01_01\system_config\armv7a\am335x\interrupt.c
IntAINTCInit()
* bsp beaglebone: full gpio driver support
* bsp beaglebone: add tftpboot way to uboot_cmd.txt
* bsp beaglebone: optimize am33xx_gpio_hdr, check irqstatus is the last one
Co-authored-by: YangZhongQing <vipox@qq.com>
Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:
----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...
----------------------------------------------------------------
This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.