* the initial support of synopsys designware ARC processor
using embARC_BSP, all synopsys ARC-based boards are
supported:
-ARC Software Development Platform
-ARC EM Starter Kit
-ARC EM Software Development Platform
-ARC HS Development Kit
-ARC IoT Development Kit
* The embARC BSP is a new generation embARC software development
package. It is designed to be the inter-layer between hardware and
operating system. BSP could hide the difference of hardware/boards,
provide a unified interface to upper-layer.
* the initial support of synopsys MWDT toolchain.
The DesignWare® ARC® MetaWare Development Toolkit builds upon
a 25-year legacy of industry-leading compiler and debugger products.
It is a complete solution that contains all the components needed to
support the development, debugging and tuning of embedded applications
for the DesignWare ARC processors.
* for detailed board information, pls go embarc.org.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Previously Loongson 1B and Loongson 1C have their own libcpu
implemention, but they're almost identical. So we merge them
into gs232 and adapt to new common code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.
The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
In C28x DSP, interrupt status are stored in ST1 register. Both INTM and DBGM is used for masking interrupt, while the latter one is used in real-time debug mode. The origin function rudely enable and disable the interrupt without considering the recent interrupt status, which not only may cause problem in some situation but also is not in conformity with rt-thread design specifications. The new api will fix this bug.