For bsp/cvitek, duo256m, the operation process is
slightly different when building images for riscv
and arm64.
To improve the user experience, unify the building
process and steps of the two as follows:
- Enter c906_little and execute `scons`
- Enter cv18xx_riscv/cv18xx_aarch64 and execute `scons`
That's all. Finally, we can get `fip.bin` and
`boot.sd` under `bsp/cvitek/output/milkv-duo256m`.
Update the README.md accordingly.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Duo's CPU combination is more complicated:
| BSP | B/L core| ISA | UART |
| ------------- | ------- |---------------- |-------|
| cv18xx_risc-v | Big | RISC-V C906 | UART0 |
| c906-little | Littel | RISC-V C906 | UART1 |
| cv18xx_aarch64| Big | ARM Cortex A53 | UART0 |
Printing ISA and big and small core information
during the boot process helps developers/testers
determine the CPU and serial port corresponding to
the current console.
In addition, the RTT logo printing has already
distinguished whether it is smart, so the bsp
printing no longer distinguishes.
Updated README to sync with this change.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
