blta
|
b1a9c4c4ea
|
[libcpu/arm]: add dsb and isb instructions in the end of rt_hw_context_switch_to (#5748)
|
2022-04-08 12:52:22 +08:00 |
aozima
|
c3d63e49de
|
set Systick interrupt priority to the lowest
|
2020-05-30 15:23:25 +08:00 |
Bernard Xiong
|
bde47018b8
|
[libcpu] Add SConscript in libcpu.
|
2019-01-07 06:09:45 +08:00 |
|
aozima
|
9b7303e511
|
update libcpu: ensure fault enable.
|
2017-08-18 11:12:58 +08:00 |
|
aozima
|
2c47f2e683
|
Fix some spell error;
|
2014-07-31 13:59:25 +08:00 |
|
aozima
|
ce4f0329db
|
enhancement hard fault exception handler.
|
2013-07-09 22:02:12 +08:00 |
|
aozima
|
4d421cad73
|
update libcpu/arm/cortex-m3: restore MSP.
|
2013-06-22 18:59:50 +08:00 |
dzzxzz
|
8b64d24bd4
|
all STM32 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/stm32
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1858 bbd45198-f89e-11dd-88c7-29a3b14d5316
|
2011-12-21 09:44:52 +00:00 |
|
dzzxzz
|
9c8398a10b
|
fixed scons + IAR compiling error for stm32f107
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1855 bbd45198-f89e-11dd-88c7-29a3b14d5316
|
2011-12-21 07:20:51 +00:00 |