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26 Commits

Author SHA1 Message Date
chenchaoqun@rt-thread.com bb8e89e851 【串口】宏定义对应增加 2018-12-17 09:38:53 +08:00
aozima cdf3f7e670 [bsp][rm48x50] update scons config: disable MDK support. 2018-12-03 20:22:06 +08:00
aozima 19433e0cf5 update SConscript: support scons 3. 2018-02-06 20:07:28 +08:00
Bernard Xiong 1368e01470 [BSP] fix RT_DFS_ELM_MAX_LFN to 255. 2017-04-09 19:23:28 +08:00
bernard c45f5a2490 [Drivers] re-write serial framework. 2014-07-18 06:45:54 +08:00
Grissiom d3648dbc9f rm48x50: cleanup sys_startup.c 2013-10-20 18:51:47 +08:00
Grissiom 81ab083ae5 rm48: move some asm file to libcpu 2013-10-20 18:51:46 +08:00
Grissiom 9568669109 rm48x50: add GCC support 2013-10-20 18:51:45 +08:00
Grissiom 2f4329430d rm48x50: cleanup HALCoGen code 2013-10-20 04:04:59 +08:00
Grissiom 6bcf1bc48b rm48x50: fix the prototype of finsh_system_init 2013-10-19 21:10:49 +08:00
Grissiom 2df7fc310f RM48 does not have cache implemented 2013-06-12 23:48:29 +08:00
Grissiom 228a6be077 cortex-r4: add __rt_ffs 2013-06-05 23:20:39 +08:00
Grissiom 480ac34445 rm48x50: remove useless reg_test code 2013-06-03 22:25:25 +08:00
Grissiom 24fc6e6ebb rm48x50: VFP lazy stacking 
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.

Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
 2013-05-31 20:58:08 +08:00
Grissiom ec1203bfab rm48x50: turn on VFP support 
This support Common VFPv2 sub-architecture.
 2013-05-31 18:32:21 +08:00
Grissiom 939c58c295 rm48x50: remove unused vPortTaskUsesFPU 2013-05-30 17:39:32 +08:00
Grissiom d8755ddd93 rm48x50: move uart.c to drv_uart.c 2013-05-30 10:02:26 +08:00
Grissiom 4d40978a70 rm48x50: add finsh support 2013-05-29 23:39:09 +08:00
Grissiom eda09ab002 rm48x50/uart.c: fix bugs 2013-05-29 23:38:10 +08:00
Grissiom 50c8cbe1d5 rm48x50: now it has console 2013-05-29 17:26:34 +08:00
Grissiom d22496aee8 rm48x50: update HALCoGen file 2013-05-29 16:42:26 +08:00
Grissiom 435f305fa2 rm48x50: temperately disable the VFP register test 2013-05-26 22:15:26 +08:00
Grissiom 56b640ecb6 rm48x50: add vRegTestTask2 2013-05-26 22:14:24 +08:00
Grissiom 2805d315bd rm48x50: fix bug in reg_test from FreeRTOS 
It does not satisfy AAPCS.
 2013-05-26 21:49:26 +08:00
Grissiom 85ec844de9 rm48x50: add reg_test from FreeRTOS 
The code is GPLv2 so I think we could use it for free(both free beer and
free speech).
 2013-05-26 21:16:14 +08:00
Grissiom f51bce3fed add rm48x50 bsp and libcpu 
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:

    1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
    channel 5 in enabled and connected to IRQ.

    2, RTI driver is enabled and compare3 source is selected to counter1
    and the compare3 will generate tick in the period of 10ms. This
    value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.

In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
 2013-05-24 22:55:13 +08:00