7 Commits

Author	SHA1	Message	Date
Bernard Xiong	98e0c58527	Add ADT Kconfig and fix MMU kconfig issue in Cortex-A (#6901) ... * Add ADT Kconfig and fix MMU kconfig issue in Cortex-A * [BSP] enable ADT	2023-02-06 01:11:04 +08:00
Meco Man	ddccef3a64	modify RT_ALIGN_SIZE as 8 by default	2023-01-12 22:47:23 -05:00
Shell	7450ef6c4d	[rt-smart] kernel virtual memory management layer (#6809) ... synchronize virtual memory system works. adding kernel virtual memory management layer for page-based MMU enabled architecture porting libcpu MMU codes porting lwp memory related codes	2023-01-08 21:08:55 -05:00
guo	ecf2d82159	sync branch rt-smart. (#6641) ... * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>	2022-12-03 12:07:44 +08:00
liuxianliang	a4eb64b873	update the project for RT-Thread_V4.1.1	2022-08-16 19:38:48 +08:00
guozhanxin	e353b2d5f1	[bsp] Update all projects.	2022-03-29 19:28:06 +08:00
GUI	f587a55bc2	[libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722) ... * [libcpu/aarch64] add smp support * [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2 * [libcpu/aarch64] disable irq/fiq when switch thread * [libcpu/aarch64] add gtimer frq set and stack align * [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568	2022-03-29 11:08:25 +08:00