2 Commits

Author	SHA1	Message	Date
Shell	fe2b124345	feat: arm64 ASID support ... Support for ARM64 ASID to enhance virtual memory management efficiency by reducing the need for TLB flushes during address space switches. These changes improve performance especially for multi-process systems. Changes: - Added `ARCH_USING_ASID` configuration in `libcpu/aarch64/Kconfig`. - Defined ASID-related constants in `mmu.h`. - Updated `TLBI_ARG` macro to include ASID manipulation. - Implemented ASID allocation mechanism with spinlock synchronization. - Enhanced TLB invalidation to support ASID-specific operations. - Modified `rt_hw_aspace_switch` to use ASIDs when switching address spaces. - Adjusted debug logging and function documentation to reflect ASID usage. - Refactored AArch64 MMU and TLB handling for ASID integration. Signed-off-by: Shell <smokewood@qq.com>	2024-11-24 13:44:34 -05:00
Shell	90917cc75a	[format] cleanup libcpu/aarch64 (#8950) ... * [dfs] fixup compiler warning Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: separate context switching codes Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: separate vector Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: separate context_gcc.S Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: moving headers to include directory Signed-off-by: Shell <smokewood@qq.com> * style: replace tab with space --------- Signed-off-by: Shell <smokewood@qq.com>	2024-06-28 00:23:09 +08:00