Commit Graph

357 Commits

Author SHA1 Message Date
kontais b96f07e477 flush cache after exception code install 2016-06-15 08:09:56 -07:00
Bernard Xiong 4e95fdff4a [BSP] Update VFP code in armv6.
committed by FH.
2016-05-20 14:20:34 +08:00
Bernard Xiong 923594c7ab [BSP] Enable VFP.
committed by FH.
2016-05-20 12:24:51 +08:00
Bernard Xiong 255f8b7c34 [BSP] Add BSP for Ingenic X1000 CPU 2016-04-24 19:34:41 +08:00
chinesebear 86216ceecc start exception by chinesebear 2016-04-19 22:08:23 +08:00
Bernard Xiong 43f68131ce [BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.
FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
2016-04-18 13:52:39 +08:00
zchong_cht 3983f39f34 Add iar compiler support for am335x. 2015-11-11 23:44:05 +08:00
Bernard Xiong 3faca6d5df [BSP] update stm32f7-disco
code cleanup.
2015-09-24 16:03:09 +08:00
Bernard Xiong a0de58a008 [BSP] fix x86 bsp compiling issue 2015-09-15 11:50:29 +00:00
weety 2021f5a276 Add the license. 2015-09-04 21:58:08 +08:00
weety b71cb4c09d Add dm365 porting. 2015-09-04 12:30:20 +08:00
nongxiaoming af8a91457e [bsp]add the stm32f74x bsp. 2015-08-07 13:30:13 +08:00
chinesebear 4ad1b35537 chinesebear add bsp & libcpu 2015-07-09 07:38:07 +08:00
aozima 9fe3cbf76f Align thread stack to 8 byte. 2015-06-05 19:14:08 +08:00
aozima 314379cc77 implement __user_initial_stackheap 2015-06-04 12:23:24 +08:00
aozima be76b10be6 Align stack address to 8 byte. 2015-06-04 11:59:18 +08:00
aozima 1fa5711712 fixed assembly warnings. 2015-05-22 16:48:01 +08:00
aozima 73df162d3f fixed assembly warnings. 2015-05-13 11:57:34 +08:00
Adrian Huang 4222677933 [libcpu][am335x] Fix the booting failure when enabling MMU
Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:

----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...

----------------------------------------------------------------

This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.
2015-05-11 10:36:11 +08:00
ardafu a13132b302 [libcpu][arm926] Optimize irq trap code. 2015-05-04 16:13:43 +08:00
ardafu 49fa5c44d7 [libcpu][arm926] Optimize code
1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
2015-04-22 11:19:50 +08:00
ardafu 175e357ace [libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread. 2015-04-16 14:13:43 +08:00
ardafu cf3d639fcb [libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files. 2015-04-16 10:35:12 +08:00
ardafu 6aa242645f 1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function.
2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain.
3. [bsp][sam9260] Move link strips in to folder link_scripts.
4. [libcpu][arm926] Add copy right to source file and format code.
2015-04-15 16:13:30 +08:00
ardafu 39452b67b0 1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP 2015-04-14 21:56:34 +08:00
Bright Pan 0b5958d700 Fix compile warning:
..\..\libcpu\arm\cortex-m3\context_rvds.S(207):
	warning: A1581W: Added 2 bytes of padding at address 0xd6
2015-03-09 09:31:23 +08:00
limxuzheng 4fea46c83c support rx62n 2014-11-12 01:09:43 +08:00
陈豪 62af08370b Merge pull request #2 from RT-Thread/master
sync
2014-09-20 01:19:42 +08:00
bernard 267c61ebce [libcpu] Add builtin ffs implementation for Cortex-M4. 2014-09-11 12:51:33 +08:00
Grissiom 11fb9060e0 mips/loongson_1b: format code 2014-08-18 15:24:21 +08:00
Grissiom 0ee101ccb0 mips/loongson_1b: install NULL handler is OK 2014-08-18 15:22:16 +08:00
Grissiom 1d928f7daf mips/loongson_1b: fix rt_interrupt_dispatch 2014-08-18 15:21:09 +08:00
陈豪 fd6ef4b235 [libcpu]am335x edit vector
vector_undef and vector_dabt
2014-08-12 18:26:22 +08:00
aozima 2c47f2e683 Fix some spell error; 2014-07-31 13:59:25 +08:00
Bernard Xiong 2604440ceb [bsp] Remove none-released porting 2014-07-12 11:08:38 +08:00
Grissiom 97fb91dcc6 bsp: add zynq7000 2014-06-27 14:12:36 +08:00
Grissiom 2b7be29cad [bsp/rva8] enable group{0,1} interrupt forwarding in gic initialization
When RT-Thread is running stand alone, it forgot to enable the
distributor of GIC.
2014-04-08 11:54:03 +08:00
Grissiom c0f0c2322f [libcpu/arm] remove useless cpsr updating in rt_hw_context_switch_to
This piece of code will enable the interrupt early before switching to
the first thread. Although it is harmless, but not prefect.
2014-04-08 11:24:04 +08:00
Grissiom 28f11fdd7b [vmm] add realview-pb-a8 VMM support 2014-04-03 17:59:14 +08:00
RTsien 9382a7105f add CM_PER_UARTx_CLKCTRL 2014-01-11 15:14:36 +08:00
Grissiom 0c9b9ced31 cortex-r4: use byte to allocate the stack
Unit of "byte" is more intuitive than "long".
2013-11-17 12:49:08 +08:00
Grissiom a8520ed383 cortex-r4: let svc mode reuse the stack of IRQ on startup
As the svc stack is the stack of threads, there is no need to allocate a
separate stack for the startup. Reuse the IRQ stack should be OK.

Tested on rm48 board.
2013-11-17 12:49:07 +08:00
Bright Pan 06987e72e5 Fix hardfault bug for gcc port
for 2013-02-20 aozima commmit "port for gcc", but the commit is
not tested,and the kernel is breakdown in context_gcc.S, the file
is a copy from cortex-m3,but not port for cortex-m0, so i complete
this port for aozima, test it in stm32f0discovery board ,
and it works fine.
2013-11-04 16:10:11 +08:00
Grissiom 377c6e6cc9 cortex-r4: dump register on traps
We could not handle any traps except IRQ/FIQ.
2013-10-20 23:46:50 +08:00
Grissiom e1e563e85c cortex-r4: remove RM48x50.h and add armv7.h 2013-10-20 21:10:26 +08:00
Grissiom 81ab083ae5 rm48: move some asm file to libcpu 2013-10-20 18:51:46 +08:00
Grissiom 9568669109 rm48x50: add GCC support 2013-10-20 18:51:45 +08:00
Bernard Xiong 7bdb082c91 Delete SConscript 2013-09-22 06:59:52 +08:00
bernard 9d09cd9f23 Import beaglebone porting 2013-09-20 21:20:51 +08:00
Grissiom 3ebc766521 sim/posix: move rt_hw_context_switch_interrupt after it's definition
This fix a compile error in Clang.
2013-09-04 00:05:03 +08:00