When building bsp/cvitek/c906_little, compiler warns:
```
board/board.c: In function 'rt_hw_board_init':
board/board.c:26:5: warning: implicit declaration of
function 'rt_hw_tick_init'; did you mean 'rt_hw_stack_init'?
[-Wimplicit-function-declaration]
26 | rt_hw_tick_init();
| ^~~~~~~~~~~~~~~
| rt_hw_stack_init
board/board.c:29:5: warning: implicit declaration of
function 'rt_hw_uart_init'; did you mean 'rt_hw_board_init'?
[-Wimplicit-function-declaration]
29 | rt_hw_uart_init();
| ^~~~~~~~~~~~~~~
| rt_hw_board_init
```
To remove these build warnings, include header files
which declare these functions.
Plus, remove the decalartion of `tick_isr()`, this
function does not exist.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Originally, for riscv big and little cores under bsp/cvitek,
after generating rtthread.bin, the cvitek_bootloader tool
would be used to package it and generate fip.bin and boot.sd
files that can be burned into sdcard. However, the
cvitek_bootloader tool repository is relatively large, and
it compiles and generates firmware such as fsbl, opensbi and
uboot from the source code level. And when using it, it
needs to be downloaded to the bsp/cvitek directory, which
will introduce pollution to source files in the RTT repository
under the original working path.
The new solution uses rttpkgtool, which is similar to
cvitek_bootloader, but it uses prebuilt firmware, so it is
very small and does not introduce pollution to the source file.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
build warning: passing argument 1 of 'inv_icache_range' makes integer
from pointer without a cast [-Wint-conversion]
Analyze: The passed parameter type is void*, which is a pointer type,
but the required type is uintptr_t, which is an integer type. Therefore,
there will be a 'makes integer from pointer without a cast' warning.
Solution: casting the void* pointer to uintptr_t, ensure that the
function receives the correct type.
Signed-off-by: zdtyuiop4444 <ign7798540@gmail.com>
Duo's CPU combination is more complicated:
| BSP | B/L core| ISA | UART |
| ------------- | ------- |---------------- |-------|
| cv18xx_risc-v | Big | RISC-V C906 | UART0 |
| c906-little | Littel | RISC-V C906 | UART1 |
| cv18xx_aarch64| Big | ARM Cortex A53 | UART0 |
Printing ISA and big and small core information
during the boot process helps developers/testers
determine the CPU and serial port corresponding to
the current console.
In addition, the RTT logo printing has already
distinguished whether it is smart, so the bsp
printing no longer distinguishes.
Updated README to sync with this change.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
By default, the small core enables D-Cache without ensuring cache
coherence. Therefore, when using shared memory, inconsistencies can
occur in the data read by the small core and the big core.
Solution: Migrate cache-related functions from the official
duo-buildroot-sdk library to implement cache-related operations in
rthw.h. This allows you to either disable D-Cache or call the
flush_dcache_range function before reading and after writing for
synchronization.
It is recommended to use the flush_dcache_range function, as disabling
D-Cache can have a significant performance impact.
Signed-off-by: zdtyuiop4444 <ign7798540@gmail.com>
description: In the bsp/cvitek/c906_little/board/interrupt.c, There is an issue with
setting the PLIC_PRIORITY[n].
analysis: PLIC_PRIORITY[n] each register corresponds to the priority of
a hardware interrupt number.
Solution: Each register is 4 bytes.
Multiply the total number of IRQs by 4 instead of dividing by 4.
Signed-off-by: Liu Gui <kenneth.liu@sophgo.com>
Confirmed with milkv, only the sd card version is sold
by default for duo in the market. The spi pins are
provided through stamp holes, so that users can solder
the corresponding components on their baseboard during
secondary development.
In order to simplify maintenance work, the mainline
will only support the sd-card version and no longer
support spinor/spinand.
Updated config files the same in this patch.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Supports both big and little cores of RISC-V C906,
but does not support ARM cores. Currently, only UART
drivers are supported on the peripherals.
Signed-off-by: Shicheng Chu <1468559561@qq.com>
For bsp/cvitek, all drivers related files are moved to the directory
bsp/cvitek/drivers, so the drivers_path_prefix processing in the
SConstruct of the three bsp projects can be simplified.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Analysis: The IRQ_MAX_NR value of c906_little is wrong.
interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but
does not explicitly include this header file.
Solution: Change IRQ_MAX_NR to the correct value 61 in
the datasheet. Explicitly include rtconfig.h in interrupt.h.
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Currently, the documents under bsp/cvitek are a bit
messy. There are currently four readme files:
- bsp/cvitek/README.md (Chinese)
- bsp/cvitek/c906_little/README.md (Chinese/English)
- bsp/cvitek/cv18xx_aarch64/README.md (Chinese)
- bsp/cvitek/cv18xx_risc-v/README.md (Chinese/English)
Regarding the working mode of the big + small cores, it
is meaningless to describe the small core alone, or the
large core alone. This can also be seen in the existing
files. The readme of the small core will also introduce
the programming of the large core, and vice versa.
Considering that the official default mode is
C906B + C906L. ARM large core can be treataed as a
special case. So the document structure is modified as
follows:
- Remove `bsp/cvitek/c906_little/README.md` and
`bsp/cvitek/cv18xx_risc-v/README.md`, merge them all
into `bsp/cvitek/README.md`
- Add a link to `bsp/cvitek/cv18xx_aarch64/README.md`
in `bsp/cvitek/README.md`
FIXME: The modified document does not provide English
version. Is it really necessary?
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
The contents of the SOC type part in the Kconfig configuration
are retained, and other parts related to I2C pin multiplexing
selection have been rolled back.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
* bsp: cvitek: kconfig: add wdt for cv18xx_riscv
Add Watchdog timer in Kconfig.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* drv: cvitek: remove using macro from source file
Building of source file should be controlled by SConscript,
but not in source file itself.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* bsp: cvitek: kconfig: add i2c for cv18xx_riscv
Add I2C in Kconfig for c906B.
Note, the IRQ# is different from that of c906L.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* bsp: cvitek: kconfig: add rtc for cv18xx_riscv
Add RTC in Kconfig for c906B.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* bsp: cvitek: fix channel issue for pwm driver
The original code confuses the concepts of controllers and channels.
Fixed it and do some code cleanup.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* bsp:cvitek: add i2c pinmux config for cv18xx_riscv
Pinmux in driver code is controlled by SOC type, bcos driver
code should be general and support all pins defined by SoC.
Pinmux configuration in Kconfig is controlled by BOARD type,
bcos when we operate on board, it does not expose all chip-level
pin signals and we can only use part of them.
Following is I2C signals exported by duo family. Details see
https://milkv.io/docs/duo/overview.
Note: we have not added support for duo-S.
Duo
===
NAME I2C CV1800B/GPIO <PINNAME>__<FUNCNAME>
---- --- ------------ ---------------------
GP0 I2C0_SCL XGPIOA[28] IIC0_SCL__IIC0_SCL
GP1 I2C0_SDA XGPIOA[29] IIC0_SDA__IIC0_SDA
GP4 I2C1_SCL PWR_GPIO[19] SD1_D2__IIC1_SCL
GP9 I2C1_SCL PWR_GPIO[18] SD1_D3__IIC1_SCL
GP11 I2C1_SCL XGPIOC[10] PAD_MIPIRX0N__IIC1_SCL
GP5 I2C1_SDA PWR_GPIO[20] SD1_D1__IIC1_SDA
GP8 I2C1_SDA PWR_GPIO[21] SD1_D0__IIC1_SDA
GP10 I2C1_SDA XGPIOC[9] PAD_MIPIRX1P__IIC1_SDA
GP7 I2C3_SCL PWR_GPIO[22] SD1_CMD__IIC3_SCL
GP6 I2C3_SDA PWR_GPIO[23] SD1_CLK__IIC3_SDA
Duo 256m
========
NAME I2C CV1800B/GPIO <PINNAME>__<FUNCNAME>
---- --- ------------ ---------------------
GP4 I2C1_SCL PWR_GPIO[19] SD1_D2__IIC1_SCL
GP9 I2C1_SCL PWR_GPIO[18] SD1_D3__IIC1_SCL
GP5 I2C1_SDA PWR_GPIO[20] SD1_D1__IIC1_SDA
GP8 I2C1_SDA PWR_GPIO[21] SD1_D0__IIC1_SDA
GP11 I2C2_SCL XGPIOC[15] PAD_MIPI_TXP1__IIC2_SCL
GP10 I2C2_SDA XGPIOC[14] PAD_MIPI_TXM1__IIC2_SDA
GP7 I2C3_SCL PWR_GPIO[22] SD1_CMD__IIC3_SCL
GP6 I2C3_SDA PWR_GPIO[23] SD1_CLK__IIC3_SDA
Duo S
=====
NAME I2C CV1800B/GPIO <PINNAME>__<FUNCNAME>
---- --- ------------ ---------------------
J3-B18 I2C1_SCL XGPIOB[18] VIVO_D3__IIC1_SCL
J3-B12 I2C1_SCL XGPIOB[12] VIVO_D9__IIC1_SCL
J3-B11 I2C1_SDA XGPIOB[11] VIVO_D10__IIC1_SDA
J3-B13 I2C2_SCL XGPIOB[13] VIVO_D8__IIC2_SCL
J4-E1 I2C2_SCL PWR_GPIO[1] PWR_GPIO1__IIC2_SCL
J3-B14 I2C2_SDA XGPIOB[14] VIVO_D7__IIC2_SDA
J4-E2 I2C2_SDA PWR_GPIO[2] PWR_GPIO2__IIC2_SDA
J3-B20 I2C4_SCL XGPIOB[20] VIVO_D1__IIC4_SCL
J4-B1 I2C4_SCL XGPIOB[1] ADC3__IIC4_SCL
J3-B21 I2C4_SDA XGPIOB[21] VIVO_D0__IIC4_SDA
J4-B2 I2C4_SDA XGPIOB[2] ADC2__IIC4_SDA
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>
* bsp:cvitek: remove using macro from source file for i2c
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* bsp:cvitek: unify menu message text for i2c as other drivers
Other dirvers has no extra word "HW".
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* bsp:cvitek: add i2c pinmux config for c906_little
Porting what we have done in commit "bsp:cvitek: add i2c pinmux config
for cv18xx_riscv" to c906_little.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
---------
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>
Co-authored-by: flyingcys <flyingcys@163.com>
