18a14cc935
[rt-smart] move sys_cacheflush to lwp_syscall.c ( #7048 )
...
* [syscall] move sys_cacheflush to lwp_syscall.c
* [syscall] improve assertion
* [format] rename to rt_ctassert
* [debug] modified ct assertion on mm_page.c
2023-03-17 15:11:38 +08:00
68ca9f07a6
[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 ( #6740 )
...
* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.
2022-12-16 18:38:28 +08:00
ecf2d82159
sync branch rt-smart. ( #6641 )
...
* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
da701d6b3a
添加dcache invalidate/dcache clean&invalidate接口
2021-07-03 17:34:45 +08:00
6c907c3a47
[libcpu] auto formatted
2021-03-27 17:51:56 +08:00
fc155f8810
fix cortex-a cahce
2019-06-19 10:40:13 +08:00
fbd40fc5b8
Add standard rt-thread cache interfaces for arm/cortex-a.
...
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
Shell
guo
fenghuijie
Meco Man
ZYH
qz721