liruncong
5321f202c4
[libcpu/arm/lpc214x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:58 +08:00
liruncong
8ce36092c5
[libcpu/arm/cortex-r4]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:43 +08:00
liruncong
cbe07afabe
[libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:34 +08:00
liruncong
8200137327
[libcpu/arm/AT9ASAM7X]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:17 +08:00
liruncong
2635cc1694
[libcpu/arm/am335x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:02 +08:00
Bernard Xiong
bd731fe1f0
[license] Fix the bad license header for lpc24xx.
2018-10-16 09:18:53 +08:00
Bernard Xiong
7c425408b4
[license] Change the license of libarm to Apache.
2018-10-15 01:35:07 +08:00
Bernard Xiong
1253a1b445
Merge pull request #1812 from liruncong/am335x-mmu
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修正am335x中mmu问题
2018-10-10 08:49:18 +08:00
Bernard Xiong
d96027f156
[libcpu] Fix the FPU definition in M4/M7 for ARM Clang
2018-09-25 11:08:58 +08:00
Bernard Xiong
ff08faf605
[Kernel] Adjust the copyright information
2018-09-25 11:06:07 +08:00
Bernard Xiong
b98a0ba804
[Kernel] Add ARMCC 6.x support.
2018-09-23 12:08:44 +08:00
liruncong
af1044955a
修正am335x中mmu问题
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1) mmu_disable_dcache/mmu_enable_dcache等, 应使用rt_cpu_xxx相关函数,否则会跑飞. armcc并没有提供rt_cpu_xxx对应汇编代码,先删除
2) mmu_setmtt抽取为函数mmu_setmtts,并增加RT_WEAK.mmu_setmtts此处作为示例函数.实际用户板子可在bsp中重新实现该函数.可在rt_components_board_init函数前调用rt_hw_mmu_init
2018-09-15 11:37:14 +08:00
liruncong
6d16685011
rt_hw_backtrace中多余括号删除. armclang给出警告
2018-09-10 19:58:28 +08:00
hichard_ren@yeah.net
b46e7f3172
add rt_hw_cpu_reset for cortex-m cpu
2018-08-01 11:57:56 +08:00
aozima
d431f4b5f9
[libcpu][comtex-m7] enhancement hard fault exception handler.
2018-07-25 21:39:45 +08:00
aozima
6c39b2d54d
[libcpu][comtex-m4] enhancement hard fault exception handler.
2018-07-25 21:39:44 +08:00
aozima
a0fe71f78f
fixed get sp in HardFault_Handler. close #1646
2018-07-25 21:39:43 +08:00
=
944b0f1c94
fix annotation error
2018-06-13 15:04:31 +08:00
ArdaFu
7a1f8ee1c4
[libcpu][arm][arm926] Using C header file to define stack and heap size.
2018-06-04 13:34:45 +08:00
aozima
dd1041bb7f
[libcpu]: fixed #1196 FPU FPCA issue.
2018-01-31 18:54:11 +08:00
SummerGift
fc7a5abc76
[libcpu]: add 8-byte alignment for arm architecture && optimize code format
2017-12-21 16:37:38 +08:00
SummerGift
336207ad31
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 15:35:48 +08:00
SummerGift
a4a85a28da
[libcpu]:optimize code format
2017-12-21 15:14:23 +08:00
SummerGift
e7b1786759
[libcpu]:optimize code format
2017-12-21 14:55:34 +08:00
SummerGift
15715692d2
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 10:13:47 +08:00
SummerGift
eb72d19179
[libcpu] add volatile for __asm.
2017-11-22 09:54:36 +08:00
SummerGift
2488624a18
[libcpu] add volatile for asm (" mcr ") or asm (" mrc ") instruct.
2017-11-22 09:54:27 +08:00
Bernard Xiong
f6170a6e5b
[BSP] add i.MX 6UL BSP
2017-11-01 13:30:17 +08:00
weety
6085f6826d
[bsp][at91sam9260] Fix the problem of the finsh function failure by using component initialization.
2017-10-19 23:46:17 +08:00
bernard
5e3b3b19a6
[BSP] change the type of cmd.
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1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
2017-10-16 13:23:03 +08:00
aozima
cb247e913f
update libcpu: cortex-m0 fault handlers always enable.
2017-09-01 10:22:55 +08:00
aozima
9bbc4e5e6b
update cortex-m libcpu: fixed compile error.
2017-08-23 16:13:51 +08:00
aozima
9b7303e511
update libcpu: ensure fault enable.
2017-08-18 11:12:58 +08:00
zchong-cht
a74a2a25a8
Add libcpu/arm/am335x/context_iar.S file
2017-02-06 21:57:15 +08:00
Bernard Xiong
4e95fdff4a
[BSP] Update VFP code in armv6.
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committed by FH.
2016-05-20 14:20:34 +08:00
Bernard Xiong
923594c7ab
[BSP] Enable VFP.
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committed by FH.
2016-05-20 12:24:51 +08:00
Bernard Xiong
43f68131ce
[BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.
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FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
2016-04-18 13:52:39 +08:00
zchong_cht
3983f39f34
Add iar compiler support for am335x.
2015-11-11 23:44:05 +08:00
Bernard Xiong
3faca6d5df
[BSP] update stm32f7-disco
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code cleanup.
2015-09-24 16:03:09 +08:00
weety
2021f5a276
Add the license.
2015-09-04 21:58:08 +08:00
weety
b71cb4c09d
Add dm365 porting.
2015-09-04 12:30:20 +08:00
nongxiaoming
af8a91457e
[bsp]add the stm32f74x bsp.
2015-08-07 13:30:13 +08:00
aozima
9fe3cbf76f
Align thread stack to 8 byte.
2015-06-05 19:14:08 +08:00
aozima
314379cc77
implement __user_initial_stackheap
2015-06-04 12:23:24 +08:00
aozima
be76b10be6
Align stack address to 8 byte.
2015-06-04 11:59:18 +08:00
aozima
1fa5711712
fixed assembly warnings.
2015-05-22 16:48:01 +08:00
aozima
73df162d3f
fixed assembly warnings.
2015-05-13 11:57:34 +08:00
Adrian Huang
4222677933
[libcpu][am335x] Fix the booting failure when enabling MMU
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Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:
----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...
----------------------------------------------------------------
This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.
2015-05-11 10:36:11 +08:00
ardafu
a13132b302
[libcpu][arm926] Optimize irq trap code.
2015-05-04 16:13:43 +08:00
ardafu
49fa5c44d7
[libcpu][arm926] Optimize code
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1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
2015-04-22 11:19:50 +08:00