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33 Commits

Author SHA1 Message Date
Fan YANG 5308cc4716 [libcpu][risc-v][common] Fix application crash on risc-v soc if FPU is 
enabled

- Defined ARCH_RISCV_FPU once the __riscv_flen macro was detected

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
 2023-08-11 21:20:28 -04:00
Fan YANG 5ac509b6d0 [libcpu][risc-v][common] Avoid using t0 before being saved 
- Fixed the issue that t0 was modified unexpectedly before being saved

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
 2023-08-09 01:07:11 -04:00
Meco Man c6a2f5b7bd rt_hw_cpu_shutdown: implement default weak function 
and remvoe duplicated default functions in each cpu/bsp level
 2023-08-08 22:34:25 -04:00
Liu,Yuan 1d8165851b
[risc-v][libcpu] 删去无用局部变量 (#7634) 2023-06-07 17:04:12 -04:00
Bernard Xiong 4b4c3c85f2
[atomic] add stdc atomic detection. (#7536) 2023-05-20 23:41:29 +08:00
Yaochenger 38eb3fc40f
[utest][atomic]添加返回值测试 (#7124) 
* [utest][atomic]添加返回值测试
 2023-03-30 11:06:21 +08:00
flyingcys 0cf3bcf495
[bsp]fix esp32_c3 compile error (#7107) 
* fix rt_hw_interrupt_install return value

* add __rt_rvstack
 2023-03-29 19:01:26 +08:00
Yaochenger de4f237482
[atomic]添加arm与risc-v下的常用原子操作函数 (#7053) 
* Update Kconfig
* Update trap_gcc.S
* Update bsp/hifive1/drivers/SConscript

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
* Update SConscript
* [atomic]提交一份arm与risc-v架构下的常用原子操作函数
* 修改变量类型
* 更新rtatomic.h与atomic_port.c
* 更新rt-thread\libcpu\arm\common\atomic_port.c
* 更新include/rtatomic.h与libcpu/arm/common/SConscript
* 更新include/rtatomic.h
* 修正格式与Kconfig
* 修正格式与文件结构

* 规范文件格式与文件重命名
* 添加测试用例与CI
* 添加函数声明
* 修改virt64/SConscript 添加atomic_riscv.c
  * 1.规范代码风格
  * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误
* 添加C11标准库原子操作测试

---------

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
 2023-03-23 20:06:50 +08:00
flyingcys a538b26858
[bsp] add bl808 lp core (#7069) 
* Add riscv_32e support

* add bl808 lp core

* update README.md
 2023-03-19 23:16:12 +08:00
Yaochenger b9e4fcfc68
[libcpu][riscv]整合libcpu/riscv中的移植文件 提供一份公共代码于common (#6941) 
整合libcpu/riscv中的移植文件 提供一份公共代码于common

在提交本pr时，除hpmicro的内核，rv32内核bsp已完成去除大部分的冗余，大部分代码采用common中的实现。本pr的作用是进一步统一common中的文件，从而提供一份公用代码，新移植的RV32内核的BSP可以全部使用common代码。

- 在common中提供一份公用文件：interrupt_gcc.S
- 修改原有的文件，将原有的中断中上下文切换代码替换为interrupt_gcc.S
- 基于上述修改，修改仓库中risc-v内核的BSP与移植相关的部分 (主要包含中断入口函数 中断栈等)
- 在common中提供一份公用文件：trap_common.c；提供统一中断入口函数，中断入口函数初始化，中断入口注册等函数，并完善异常时的信息输出

- 在common中提供一份公用文件：rt_hw_stack_frame.h；将栈帧结构体剥离，供用户使用

- 在上述工作完成后，在上述工作的基础上测试仓库中risc-v内核的BSP

- 完善函数中的命名，完善中断栈的获取

- 提供一份详细的基于现有common文件的移植指南

  #### 在什么测试环境下测试通过 

- 1.CH32V307V-R1-R0
- 2.CH32V208W-R0-1V4
- 3.HPM6750EVKMINI
- 4.GD32VF103V-EVAL
- 5.qemu(CORE-V-MCU )

> 与上述开发板使用同样芯片的BSP均测试通过

在CH32V307V-R1-R0与HPM6750EVKMINI上基于现有移植文件进行多线程复杂场景下的长时间测试，测试过程系统运行正常。
 2023-03-01 01:32:43 -05:00
Meco Man 9bc68d26a4 format Kconfig and sconscript 2023-01-08 22:52:13 -05:00
Yaochenger b99769f686
[libcpu][riscv]移除ch32中的冗余文件,使用common下的文件 (#6813) 
* [libcpu][riscv]移除ch32中的冗余文件,使用common下的文件

* 修正cpuport.h宏定义

* 规范宏定义格式
 2023-01-04 21:06:09 -05:00
Yaochenger f2a66e122f [libcpu][riscv]移除cv32e40p中部分文件，采用common中的文件 2023-01-02 16:42:18 -05:00
Yaochenger 882a0af94e [libcpu][riscv] 添加宏用于区别是否开启FPU，更新ch32v208v-r0 ->ch32v208w-r0，更新注释 2022-12-28 18:47:39 -05:00
Man, Jianting (Meco) 99bdf978d7
[rtdef] use lower-case to define attributes (#6728) 
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
 2022-12-11 13:12:03 -05:00
guo ecf2d82159
sync branch rt-smart. (#6641) 
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
 2022-12-03 12:07:44 +08:00
emuzit c802fcdcf8
WCH CH569W-R0-1v0 evt board bsp port, first version (#6167) 
WCH CH569W-R0-1v0 evt board bsp port, first version

dev/test under Ubuntu 20.04
toolchain from MounRiver_Studio_Community_Linux_x64_V120

tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling)

libcpu/risc-v/SConscript :
group includes rtconfig.CPU only if folder exists

libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() :
make it RT_WEAK for customization
 2022-07-30 02:10:51 -04:00
thewon86 f5b0bfd3f4 uniform code writing-disable interrupt 2022-04-20 14:22:43 +08:00
Meco Man 6c907c3a47 [libcpu] auto formatted 2021-03-27 17:51:56 +08:00
yangjie eeaf1fcc50 resolve Conflicts 
bsp/nrf52832/board/Sconscript
	bsp/nrf52832/startups/Sconscript
	bsp/raspberry-pi/raspi4-32/driver/SConscript
 2020-12-28 12:02:31 +08:00
yangjie ef62febf1f [SConscript]update group name 2020-12-19 16:49:11 +08:00
Bernard Xiong a472656ee0
Merge pull request #4019 from bj-wanghz/dev 
fix long call linker error with 'jal', 'j' or conditional branch instruction in .S files for k210
 2020-12-03 16:02:00 +08:00
yangjie11 ba83ddc3c4 [SConscript] change libcpu to LIBARCH,and correcte letter case 2020-11-30 15:52:43 +08:00
Bernard Xiong b7dd3cae09
Merge pull request #4043 from zhangsz0516/zhangsz_1120 
[libcpu][update]重启与关机函数：rt_hw_cpu_shutdown、rt_hw_cpu_reset，补充WEAK属性
 2020-11-23 17:40:34 +08:00
tangweikang c8deffcf56 [libcpu/risc-v][K210] add FPU support 2020-11-20 13:53:50 +08:00
yangjie11 91261e25b9 [SConscript]rename group name 2020-11-20 13:38:11 +08:00
张世争 355f8dd95c [libcpu][update]重启与关机函数：rt_hw_cpu_shutdown、rt_hw_cpu_reset，补充WEAK属性 2020-11-20 08:49:51 +08:00
wanghongzhu 111ecae6ad fix long call linker error with 'jal', 'j' or conditional branch instruction 2020-11-11 09:58:20 +08:00
ZhangTao 80a4912baf 修改了上下文切换退出时的bug，该bug会导致中断被提前打开造成死锁 2019-11-05 10:30:47 +08:00
shaojinchun bcb7fac0d0 fix signals for k210 2019-05-11 09:37:25 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
shaojinchun 86c76b0e8a add k210 SMP support 2018-12-28 09:41:18 +08:00
Bernard Xiong 2a7d814f77 [libcpu] Add unified RISC-V libcpu porting. 2018-12-08 10:41:38 +08:00