This patch optimizes the user-space context handling in the ARM64
architecture, specifically improving how the context is saved and
restored during system calls and interrupts. The changes make the
code more efficient and easier to maintain, while ensuring proper
preservation of user context during system transitions.
Changes:
- Introduced a parameter for context saving to improve flexibility.
- Replaced hardcoded stack pointer operations with frame-relative
references for better readability and code reuse.
- Simplified context restoration, removing redundant operations like
loading/storing floating-point registers.
Signed-off-by: Shell <smokewood@qq.com>
The ref_count of the vnode is NOT bound to the resource reference counts
of the ptm device created by opening `dev/ptmx`, so the conditional
release of resource may end up by memory leaking if the multiple user
have open the `dev/ptmx`.
Changes:
- Removed conditional branch on recycling resource
Signed-off-by: Shell <smokewood@qq.com>
Fix some code style and init for V2M, ITS.
V2M is the PCI MSI/MSI-X for GICv2.
ITS is the PCI MSI/MSI-X for GICv3/v4.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
PIC may free because some wrongs in debug.
We should remove in PIC list or there are
some undefined behavior will happen.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
The mode permissions for character, block, and pipe devices were
previously set to 0777, which is overly permissive and not in line
with standard practice. This change reduces the permissions to 0666,
restricting execute permissions while still allowing read/write access.
Changes:
- Adjusted permissions for character/block/pipe devices from 0777 to 0666.
Signed-off-by: Shell <smokewood@qq.com>
The `LWP_CONSOLE_INPUT_BUFFER_SIZE` is a legacy config option for TTY
driver used in smart. Since the driver is updated, there's no dependency
of this option any more.
Changes:
- Removed unused Kconfig option `LWP_CONSOLE_INPUT_BUFFER_SIZE`
Signed-off-by: Shell <smokewood@qq.com>
In manual, the prototype of lseek is
`off_t lseek(int fd, off_t offset, int whence);`
where the return type is `off_t` but not ssize_t.
Signed-off-by: Shell <smokewood@qq.com>
The ofw parse should:
1. Check obj_name EQU the current node's rt_data.
2. Find the next object name.
3. goto "2" until obj_name EQU the cmp_cell's obj_name.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
When the driver request a API gets RT_NULL which return value is ptr,
they could not know why get a RT_NULL.
some API return RT_NULL, is not error internal maybe, it just not
supported for this platform, but the driver still could work ok,
the API can return (RT_NULL + -RT_EEMPTY) to driver.
on the other hand, the driver can do more behaviors by error no.
When the API return the -RT_EBUSY, driver can wait for a moment and retry.
When the API return the -RT_ENOSYS, driver can try the next mode or request's name.
Signed-off-by: GuEe-GUI <wusongjie@rt-thread.com>
PCI/PCIe have better performance and more devices support, such as
NVMe, GPU, Powerful NIC (Like RDMA). PCI/PCIe can access control by
IOMMU that the virtualiztion and userspace driver will more safety.
PCI/PCIe device could hot plugging, no design modifications SoC required,
PCI/PCIe on Embedded SoC is popular now.
We make a simple framework to support them.
Feature Lists:
1.PCI INTx: the INT[A-D] pin IRQ for legacy PCI, work with platform PIC.
2.MSI/MSI-X: the message write IRQ for PCIe, work with platform's PIC.
3.PME: we only support the D0, D1, D2, D3HOT, D3COLD init by framework.
4.Endpoint: a simple EP framework for PCI FPGA or NTB function.
5.OFW: we only support work on OFW SoC, ACPI support in the future maybe.
Host controller:
1. Common PCI host controller on ECAM.
2. Generic PCI host controller on ECAM.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. RT_FIELD_PREP: prepare a bitfield element.
2. RT_FIELD_GET: extract a bitfield element.
3. rt_offsetof: member offset of a struct
4. rt_upper_32_bits: high 32 bits of value.
5. rt_lower_32_bits: lower 32 bits of value.
6. rt_upper_16_bits: high 16 bits of value.
7. rt_lower_16_bits: lower 16 bits of value.
8. rt_max_t: fix type of max(...).
9. rt_ilog2: integer logarithm base 2.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
This patch addresses the potential issue of uninitialized elements in
the argument vector returned by `lwp_get_command_line_args()`. The
previous implementation could leave `argv` in an inconsistent state
if certain errors occurred, leading to possible undefined behavior.
Changes:
- Replaced `rt_malloc()` with `rt_calloc()` to ensure `argv` is properly initialized.
- Added a consistent error handling path using `goto error_exit` to handle memory allocation failures and string copy errors.
- Ensured `lwp_free_command_line_args()` is called before returning on error, preventing potential memory leaks.
Signed-off-by: Shell <smokewood@qq.com>
Since the completion is used to sync with ISR mostly, we should set the
default semantic to ISR-safe. So most user will be happy and don't see
any weird behavior in their codes.
Changes:
- Added `rt_completion_wait_noisr` and
`rt_completion_wait_flags_noisr` functions in `completion.h`,
`completion_comm.c`, `completion_mp.c`, and `completion_up.c`.
- The new APIs allow waiting for completions in non-ISR contexts
while ensuring thread context safety.
- Existing documentation and comments were updated to clarify
usage contexts and emphasize restrictions on ISR usage.
Signed-off-by: Shell <smokewood@qq.com>
Analysis: There is still an omission in the preprocessing control of
_control_rtc in 24b0a81 ("Add RT_USING_RTC conditional
compilation protection in ctimer.c")
Solution: Add RT_USING_RTC preprocessing control to missing
_control_rtc
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Analysis: RT_USING_RTC preprocessing is used in 47cd52d ("修复不
使能 RT_USING_DEVICE 时编译报错") to control the reference of
rtdevice.h, as well as the implementation and call of _control_rtc,
but there are some omissions.
Solution: Add RT_USING_RTC preprocessing control to missing
_control_rtc
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
To support more choice on bootfs. romfs, cromfs are now supported on
risc_v_big platform.
Changes:
- added mount operations under port
- added prototypes for cromfs init APIs
Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
This patch focuses on the ARM64 general context handling code.
The modifications are aimed at enhancing performance by simplifying
context save/restore operations.
Changes include:
- Adjusted stack alignment in `arch_set_thread_context` function.
- Updated `lwp_gcc.S` to reset frame pointer and link register.
- Refined `rt_hw_backtrace_frame_unwind` to handle user space address checks.
- Added `GET_THREAD_SELF` macro in `asm-generic.h`.
- Simplified context saving/restoring in `context_gcc.h` and related files.
- Optimized `rt_hw_context_switch_interrupt` and related assembly routines.
Signed-off-by: Shell <smokewood@qq.com>
Do unmap before shrink so we don't see mapped entry on page table
insertion, which is not acceptable for riscv implementation of
architecture porting.
Changes:
- add un-mapping of pte on `_null_shrink()`
Signed-off-by: Shell <smokewood@qq.com>
[dfs] feat: Mark dirty on unmap for shared mapping
This patch optimizes the pcache varea management by refining the
conditions under which pages are marked dirty, specifically targeting
the unmap operations in the dfs_pcache component. These changes were
necessary to enhance the efficiency of page cache management.
Changes:
- Adjusted include statements in `dfs_pcache.c` for better organization.
- Modified `dfs_aspace_unmap` function:
- Added a check to ensure `varea` is not privately locked before marking a page as dirty.
- Updated `dfs_aspace_page_unmap` function:
- Added a similar check for `varea` lock status before marking a page as dirty.
Signed-off-by: Shell <smokewood@qq.com>
The changes unify the tick.c implementations for all risc-v64
architectures, leveraging the CPUTIME feature. This refactoring was
necessary to streamline the codebase, and ensure consistent timer
handling across different platforms.
Changes:
- Updated `Kconfig` in `bsp/cvitek/cv18xx_risc-v` to fix formatting issues.
- Updated .config for BSPs to update `CPUTIME_TIMER_FREQ`
- Updated header of for API `riscv_cputime_init`
- Initialized riscv timer on `rt_hw_tick_init`
- Refactored `tick.c` and `tick.h` in `libcpu/risc-v/t-head/c906` and `libcpu/risc-v/virt64`:
- Replaced direct use of `rdtime` with `clock_cpu_gettime`.
- Removed redundant timer frequency definitions.
- Added static assertions to check the value of `CPUTIME_TIMER_FREQ`.
- Initialized `tick_cycles` based on `CPUTIME_TIMER_FREQ`.
- Integrated `ktime` support for tick initialization.
Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9164
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
feat: [libcpu/c906] support ARCH_REMAP_KERNEL
This change was necessary to enable the remapping of the kernel image to
a high virtual address region on the c906 platform.
Changes:
- Introduced new configuration options `ARCH_REMAP_KERNEL`, and
`ARCH_USING_ASID` under the `ARCH_RISCV64` section.
- Updated MMU initialization and switching functions to incorporate
remapping handling.
- Modified page table setup for proper memory attribute settings.
- Added support for early memory setup, kernel remapping
- Added conditional compilation for ASID support in the `rt_aspace` struct,
since this is not enable currently for most architecture.
Signed-off-by: Shell <smokewood@qq.com>
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