Commit Graph

514 Commits

Author SHA1 Message Date
tyustli 49e9d19c82 first version 2019-07-24 17:03:26 +08:00
Zhou Yanjie d45efced1c libcpu: MIPS: 更新版权信息/Update copyright information.
更新版权信息。

Update copyright information.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:05:00 +08:00
Zhou Yanjie d6b2f56f15 libcpu: MIPS: 清理代码/Clean up code.
清理内容重复的头文件。

Clean up duplicate header files.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:00:34 +08:00
Bernard Xiong ba9dbed372
Merge pull request #2827 from yangjie11/ac6
[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7
2019-07-05 15:23:57 +08:00
明德无敌赵晓薇 d68220d866 [libcpu][c28x]Add __rt_ffs support
Use a native instruction "Count Sign Bits" to support fast ffs function, then add __rt_ffs support in C28x.
2019-07-03 19:31:54 +08:00
yangjie 31ffc4582c [libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7 2019-07-03 18:47:11 +08:00
Bernard Xiong 38d5c2aa72
Merge pull request #2796 from lymzzyh/cache
修复cortex-a 中cache操作没有 dsb isb
2019-06-19 11:41:05 +08:00
ZYH fc155f8810 fix cortex-a cahce 2019-06-19 10:40:13 +08:00
明德无敌赵晓薇 21d32cdb3a
[libcpu][C28x] Fix bugs of old c28x interrupt api which can not save and restore int status
In C28x DSP, interrupt status are stored in ST1 register. Both INTM and DBGM is used for masking interrupt, while the latter one is used in real-time debug mode. The origin function rudely enable and disable the interrupt without considering the recent interrupt status, which not only may cause  problem in some situation but also is not in conformity with rt-thread design specifications. The new api will fix this bug.
2019-06-18 20:59:00 +08:00
Bernard Xiong 0b4e2a984e
Merge pull request #2731 from jesven/a9-fpu
add cortex-a fpu support
2019-05-29 18:30:44 +08:00
shaojinchun 043611b98a add cortex-a fpu support 2019-05-29 08:40:41 +08:00
HubretXie 36ffdc058b
对CM3,CM4,CM7 自动开启RT_USING_CPU_FFS 2019-05-28 21:30:45 +08:00
neal 257d21c0bd [bsp][at91sam9g45]Fix build bugs which caused by the change of libcpu/arm/arm926/start_gcc.S 2019-05-13 18:36:31 -07:00
Bernard Xiong ec6cb9f260 [BSP][qemu-vexpress-a9] code cleaup for compiling warning. 2019-05-12 15:07:26 +08:00
shaojinchun bcb7fac0d0 fix signals for k210 2019-05-11 09:37:25 +08:00
shaojinchun 6cdfb2ac92 fix signal code 2019-05-11 09:34:26 +08:00
Bernard Xiong d729448f5e [libcpu][arm/cortex-a] Add correct comments. 2019-05-09 08:48:38 +08:00
misonyo 0f33da3f0e [libcpu/cortex-m7]add cache driver 2019-04-27 17:35:46 +08:00
shaojinchun 1e7bd3d8a1 修改lwp支持中arm cortex-a的swi入口函数处理 2019-04-27 13:54:51 +08:00
qz721 61f2a71511 Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
2019-04-26 10:50:48 +08:00
Bernard Xiong 41aabf3736
Merge pull request #2573 from xuzhuoyi/tms320f28379d
[bsp][tms320f28379d] Improve finsh support and update README.md
2019-04-14 15:39:37 +08:00
xuzhuoyi 752152b63e [bsp][tms320f28379d] Fix FPU config problem 2019-04-14 12:26:25 +08:00
xuzhuoyi 4acd8db61e [bsp][tms320f28379d] Add finsh init in rt_init_thread 2019-04-10 22:33:25 +08:00
Bernard Xiong 44c3f55996
Merge pull request #2527 from xuzhuoyi/gd32e230
[bsp] Add GD32E230K-START support
2019-04-07 16:59:27 +08:00
Bernard Xiong 238c93468f
Merge pull request #2530 from qz721/libcpu_cortex_a
Disable the data alignment check.
2019-04-01 17:43:19 +08:00
qz721 b10039f396 Disable the data alignment check. 2019-04-01 14:21:59 +08:00
xuzhuoyi fd8eb60a67 [bsp][gd32e230k-start] Update Kconfig 2019-03-31 23:26:35 +08:00
xuzhuoyi 5a460aadcd [bsp][gd32e230k-start] Update Sconscript 2019-03-31 21:17:55 +08:00
xuzhuoyi 5d166c389d [bsp][gd32e230k-start] Add GD32E230K-START BSP port 2019-03-31 15:44:24 +08:00
Bernard Xiong 459ddc3b06
Merge pull request #2523 from qz721/libcpu_cortex_a
Add standard rt-thread cache interfaces for arm/cortex-a.
2019-03-30 05:57:47 +08:00
qz721 fbd40fc5b8 Add standard rt-thread cache interfaces for arm/cortex-a.
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
ZYH fcb88f7034 [libcpu][k210]fix stack frame print 2019-03-28 17:05:52 +08:00
BernardXiong bd8f0d0423 [libcpu] Fix the build directory issue 2019-03-26 13:36:01 +00:00
Bernard Xiong 94e7f7316b
Merge pull request #2503 from qz721/libcpu_cortex_a
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 21:58:48 +08:00
qz721 2eb1bef773 Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code. 2019-03-25 20:03:49 +08:00
tangyuxin e6d1537327 移除 SConscript.1 临时文件 2019-03-25 15:18:09 +08:00
ZYH c41bf3120f [libcpu][k210]add stack info printf 2019-03-21 15:10:55 +08:00
ZYH 3dd72f956b [libcpu][k210]add description of exception 2019-03-20 12:23:17 +08:00
shaojinchun 29264edde8 修改arm926中machine.c的协议声明 2019-03-14 17:54:21 +08:00
shaojinchun 159def753f arm926内容整理 2019-03-14 17:24:35 +08:00
Wayne Ren d8aa99a29c [bsp][synopsys] add the support of synopsys arc emsk
* the initial support of synopsys designware arc processor
* the initial support of synospsy ARC EM Starter Kit
* the bsp code is based on embarc which is a common SDK for
all synopsys ARC-based boards
* use "scons --gdb" to debug emsk with em9d configuration
* for detailed board information, pls go embarc.org

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-01-25 10:29:34 +08:00
Bernard Xiong 3a3c6c51f8 [libcpu] remove cache.h from mips/common folder. 2019-01-07 21:16:05 +08:00
Bernard Xiong 4c0aafb57f [libcpu] Fix the SCoscript issue in cpu/MIPS. 2019-01-07 09:20:30 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
shaojinchun 86c76b0e8a add k210 SMP support 2018-12-28 09:41:18 +08:00
zhuhongbing fb693418ee add project support for at91sam9260, add support for at91sam9g45 2018-12-26 12:50:52 +08:00
Bernard Xiong 597d71cc03 [bsp][k210] Add get_free_heap_size function.
* Add get_free_heap_size function;
* Increase shell stack for KPU module.
2018-12-23 14:11:25 +08:00
Bernard Xiong 5e0f8cb3aa [libcpu] Add k210 BSP. 2018-12-18 21:01:03 +08:00
Bernard Xiong c72dc1a7e5
Merge pull request #2072 from yufanyufan77/master
添加cpu复位函数
2018-12-15 11:53:17 +08:00
Bernard Xiong 885d99ee9b
[libcpu][risc-v] fix rt_thread_switch_interrupt_flag issue. 2018-12-15 11:47:59 +08:00