Commit Graph

473 Commits

Author SHA1 Message Date
liruncong 6d16685011 rt_hw_backtrace中多余括号删除. armclang给出警告 2018-09-10 19:58:28 +08:00
xuzhuoyi 9d8e27e626 [bsp][tms320f28379d] Modify to C28x Compiler Register Conventions 2018-09-03 23:02:16 +08:00
xuzhuoyi 5fd1213e73 [bsp][tms320f28379d] __rt_ffs() problem caused by 16-bit int 2018-09-03 21:39:56 +08:00
xuzhuoyi 697a4495a6 [bsp][tms320f28379d] Add support for upward-growing stack 2018-09-03 00:03:06 +08:00
xuzhuoyi d85981a715 [BSP][tms320f28379d] Add port for tms320f28379d 2018-09-02 18:44:28 +08:00
hichard_ren@yeah.net b46e7f3172 add rt_hw_cpu_reset for cortex-m cpu 2018-08-01 11:57:56 +08:00
aozima d431f4b5f9 [libcpu][comtex-m7] enhancement hard fault exception handler. 2018-07-25 21:39:45 +08:00
aozima 6c39b2d54d [libcpu][comtex-m4] enhancement hard fault exception handler. 2018-07-25 21:39:44 +08:00
aozima a0fe71f78f fixed get sp in HardFault_Handler. close #1646 2018-07-25 21:39:43 +08:00
= 944b0f1c94 fix annotation error 2018-06-13 15:04:31 +08:00
liang yongxiang 7785dc5d01 [libcpu] add c-sky ck802 support 2018-06-11 09:43:39 +08:00
ArdaFu aa08164cb3 [libcpu] Sconscript: fix spell srror. 2018-06-04 14:23:54 +08:00
ArdaFu 099062de78 [tools][building] Add ASFLAGS in DefineGroup. 2018-06-04 14:18:31 +08:00
ArdaFu 7a1f8ee1c4 [libcpu][arm][arm926] Using C header file to define stack and heap size. 2018-06-04 13:34:45 +08:00
liang yongxiang 32c5b2515f [libcpu] add risc-v e310 porting 2018-05-31 14:53:26 +08:00
Bernard Xiong fe691c2ab3
Merge pull request #1484 from TanekLiang/riscv-update
remove hifive1 bsp and risc-v/e310 porting
2018-05-29 16:20:39 +08:00
liang yongxiang 46b9be6038 [libcpu] remove nds32 porting 2018-05-29 12:59:54 +08:00
liang yongxiang 5faae3350c [libcpu] remove libcpu/risc-v 2018-05-29 12:59:13 +08:00
zhuangwei123 330bdf6989 [bsp/ls1cdev]跟上一提交,漏提两个文件 2018-05-12 19:36:08 +08:00
zhuangwei123 9a7caed323 [bsp/ls1cdev]添加自引导特性,添加配置选项
1、添加自引导特性,添加配置选项
2、修复cpuport.c的bug
3、修复ls1c_pin.c不能默认复用的bug
2018-05-12 19:33:32 +08:00
aozima dd1041bb7f [libcpu]: fixed #1196 FPU FPCA issue. 2018-01-31 18:54:11 +08:00
Bernard Xiong d78f5eb674
Merge pull request #1124 from SummerGGift/add_arm_8-byte_alignment
[libcpu]: add 8-byte alignment for arm architecture && optimize code …
2017-12-21 17:07:34 +08:00
SummerGift fc7a5abc76 [libcpu]: add 8-byte alignment for arm architecture && optimize code format 2017-12-21 16:37:38 +08:00
Bernard Xiong cc75366fda
Merge pull request #1123 from SummerGGift/8-byte_alignment
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 15:36:21 +08:00
SummerGift 336207ad31 [libcpu]: add 8-byte alignment for armv6 architecture 2017-12-21 15:35:48 +08:00
SummerGift a4a85a28da [libcpu]:optimize code format 2017-12-21 15:14:23 +08:00
SummerGift e7b1786759 [libcpu]:optimize code format 2017-12-21 14:55:34 +08:00
SummerGift 15715692d2 [libcpu]: add 8-byte alignment for armv6 architecture 2017-12-21 10:13:47 +08:00
Bernard Xiong bb46058d8e [libcpu] Add ARCH_ARM_ARM9/11 type 2017-12-19 17:39:23 +08:00
SummerGift eb72d19179 [libcpu] add volatile for __asm. 2017-11-22 09:54:36 +08:00
SummerGift 2488624a18 [libcpu] add volatile for asm (" mcr ") or asm (" mrc ") instruct. 2017-11-22 09:54:27 +08:00
tangyuxin afc2256d01 [libcpu]Support x1000 CPU 2017-11-10 19:50:14 +08:00
Bernard Xiong f6170a6e5b [BSP] add i.MX 6UL BSP 2017-11-01 13:30:17 +08:00
bernard 756bfcc5e2 Update Kconfig.
1. Add IPADDR/GWADDR etc;
2. Add Kconfig for libcpu.
2017-10-31 09:54:23 +08:00
weety 6085f6826d [bsp][at91sam9260] Fix the problem of the finsh function failure by using component initialization. 2017-10-19 23:46:17 +08:00
bernard 5e3b3b19a6 [BSP] change the type of cmd.
1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
2017-10-16 13:23:03 +08:00
bernard f8a1bf6fd8 [libcpu] code cleanup for nds32. 2017-10-09 18:06:58 +08:00
Bernard Xiong c2f028ed8d Update cpuport.c 2017-10-06 11:43:50 +08:00
Bernard Xiong ea18ef60ed Merge pull request #826 from ArcherChang/master
[BSP] Add Andes N1068 porting and simple bsp.
2017-10-06 11:03:02 +08:00
Bernard Xiong 0d193254f8 Merge pull request #845 from caogos/master
[BSP] Add FPU option for loongson1c.
2017-09-14 17:06:11 +08:00
勤为本 574e22bdbd 在配置文件“rtconfig.h”中增加硬浮点FPU的配置项,
浮点经常会用到,所以默认使用硬浮点。
2017-09-13 15:21:09 +08:00
aozima cb247e913f update libcpu: cortex-m0 fault handlers always enable. 2017-09-01 10:22:55 +08:00
Bernard Xiong 2ac493698b [BSP] cleanup for hifive1 bsp. 2017-08-26 11:02:39 +08:00
ArcherChang 652ea85a39 [1] Andes N1068体系移植
a. Libc改用官方版本(工具链附带版本);
    b. 去除未使用文件;
2017-08-25 14:25:35 +08:00
Bernard Xiong b9ebd183ae Merge pull request #827 from caogos/master
[BSP] Add EMAC driver in loongson1C (ported by chinesebear, https://github.com/chinesebear/rtt-net)
2017-08-25 11:07:34 +08:00
ArcherChang 921fbfbc21 [1] 添加Andes N1068体系;
[2] 基于AE210P EVB板;
[3] 详细信息参阅bsp/AE210P/readme文件夹;
    《Andes工程创建和调试》文档;等。
2017-08-25 10:25:33 +08:00
aozima 9bbc4e5e6b update cortex-m libcpu: fixed compile error. 2017-08-23 16:13:51 +08:00
勤为本 838c63f365 添加龙芯1C片内网卡的驱动(原创作者是chinesebear,https://github.com/chinesebear/rtt-net) 2017-08-23 15:46:51 +08:00
aozima 9b7303e511 update libcpu: ensure fault enable. 2017-08-18 11:12:58 +08:00
Bernard Xiong 4626b19ead Merge pull request #784 from zhangjun1996/master
[BSP] add bsp for sifive(risc-v e310).
2017-08-10 16:51:59 +08:00
勤为本 7129d77bee 增加龙芯1c硬浮点的支持(可以使用硬浮点了) 2017-08-10 15:35:03 +08:00
zhangjun 72cfe9dd68 modify: drivers/cpuusage.c
modify:     ../../libcpu/risc-v/e310/stack.c
	rmove unused macro definition
modify:     ../../src/idle.c
	Return to the original version
2017-07-31 12:05:45 +08:00
zhangjun 0cd49e7c4a Merge branch 'master' of https://github.com/RT-Thread/rt-thread
add new bsp for risc-v
2017-07-31 11:27:46 +08:00
zhangjun e9f1bdf2da new file: ../../libcpu/risc-v/e310/trap.c
add file that forget to submit before
	auto change timer mtimercmp register on the base of RT_TICK_PER_SECOND in rtconfig.h
	no flashing led
new file:   ../../src/idle.c
	recover old file
2017-07-31 11:12:28 +08:00
zhangjun a5305c05df fix bug in context_gcc.s and start_gcc.s:
save mie into stack
msh  running normaly
2017-07-31 10:59:59 +08:00
zhangjun b032dff161 fix bug in rt_hw_context_switch_interrupt_do
save sp to old thread
	clear rt_thread_switch_interrupt_flag
always enable interrupt after rt_hw_context_switch
judeg the type of interrupt in trap_entry, then call handler(Machine timer interrupt of Machine external interrupt)
2017-07-30 19:46:28 +08:00
zhangjun 2d56a27c20 修改: ../../libcpu/risc-v/e310/context_gcc.S
enable interrupt after return form rt_hw_context_switch
2017-07-30 15:34:32 +08:00
zhangjun 3c51848d33 fix trap_entry 2017-07-29 15:37:20 +08:00
zhangjun b80f83f360 modified: ../../libcpu/risc-v/e310/context_gcc.S
fix open timer intrrupt
2017-07-26 16:27:54 +08:00
zhangjun 98a6896cfa remove "csrrc a5, mstatus, MSTATUS_MIE" in rt_hw_interrupt_enable();
it will lead to interrupt again in interrupt
2017-07-26 16:07:01 +08:00
勤为本 358612c8a2 支持GPIO中断(外部中断) 2017-07-20 17:35:03 +08:00
勤为本 d1bb7c61f4 将支持的中断个数从32个扩展到160个,至此可以支持所有中断 2017-07-20 17:05:59 +08:00
勤为本 f39164203e 修正龙芯1c的中断号 2017-07-18 17:04:32 +08:00
zhangjun b334347a24 deleted: rtthread.s /*just for debug*/
modified:   ../../libcpu/risc-v/e310/context_gcc.S
	change  ret to mret and switch to new task with mepc
2017-07-17 16:55:33 +08:00
zhangjun e01455155a add context_gcc.s 2017-07-17 15:44:00 +08:00
zchong-cht a74a2a25a8 Add libcpu/arm/am335x/context_iar.S file 2017-02-06 21:57:15 +08:00
kontais b96f07e477 flush cache after exception code install 2016-06-15 08:09:56 -07:00
Bernard Xiong 4e95fdff4a [BSP] Update VFP code in armv6.
committed by FH.
2016-05-20 14:20:34 +08:00
Bernard Xiong 923594c7ab [BSP] Enable VFP.
committed by FH.
2016-05-20 12:24:51 +08:00
Bernard Xiong 255f8b7c34 [BSP] Add BSP for Ingenic X1000 CPU 2016-04-24 19:34:41 +08:00
chinesebear 86216ceecc start exception by chinesebear 2016-04-19 22:08:23 +08:00
Bernard Xiong 43f68131ce [BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.
FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
2016-04-18 13:52:39 +08:00
zchong_cht 3983f39f34 Add iar compiler support for am335x. 2015-11-11 23:44:05 +08:00
Bernard Xiong 3faca6d5df [BSP] update stm32f7-disco
code cleanup.
2015-09-24 16:03:09 +08:00
Bernard Xiong a0de58a008 [BSP] fix x86 bsp compiling issue 2015-09-15 11:50:29 +00:00
weety 2021f5a276 Add the license. 2015-09-04 21:58:08 +08:00
weety b71cb4c09d Add dm365 porting. 2015-09-04 12:30:20 +08:00
nongxiaoming af8a91457e [bsp]add the stm32f74x bsp. 2015-08-07 13:30:13 +08:00
chinesebear 4ad1b35537 chinesebear add bsp & libcpu 2015-07-09 07:38:07 +08:00
aozima 9fe3cbf76f Align thread stack to 8 byte. 2015-06-05 19:14:08 +08:00
aozima 314379cc77 implement __user_initial_stackheap 2015-06-04 12:23:24 +08:00
aozima be76b10be6 Align stack address to 8 byte. 2015-06-04 11:59:18 +08:00
aozima 1fa5711712 fixed assembly warnings. 2015-05-22 16:48:01 +08:00
aozima 73df162d3f fixed assembly warnings. 2015-05-13 11:57:34 +08:00
Adrian Huang 4222677933 [libcpu][am335x] Fix the booting failure when enabling MMU
Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:

----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...

----------------------------------------------------------------

This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.
2015-05-11 10:36:11 +08:00
ardafu a13132b302 [libcpu][arm926] Optimize irq trap code. 2015-05-04 16:13:43 +08:00
ardafu 49fa5c44d7 [libcpu][arm926] Optimize code
1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
2015-04-22 11:19:50 +08:00
ardafu 175e357ace [libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread. 2015-04-16 14:13:43 +08:00
ardafu cf3d639fcb [libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files. 2015-04-16 10:35:12 +08:00
ardafu 6aa242645f 1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function.
2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain.
3. [bsp][sam9260] Move link strips in to folder link_scripts.
4. [libcpu][arm926] Add copy right to source file and format code.
2015-04-15 16:13:30 +08:00
ardafu 39452b67b0 1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP 2015-04-14 21:56:34 +08:00
Bright Pan 0b5958d700 Fix compile warning:
..\..\libcpu\arm\cortex-m3\context_rvds.S(207):
	warning: A1581W: Added 2 bytes of padding at address 0xd6
2015-03-09 09:31:23 +08:00
limxuzheng 4fea46c83c support rx62n 2014-11-12 01:09:43 +08:00
陈豪 62af08370b Merge pull request #2 from RT-Thread/master
sync
2014-09-20 01:19:42 +08:00
bernard 267c61ebce [libcpu] Add builtin ffs implementation for Cortex-M4. 2014-09-11 12:51:33 +08:00
Grissiom 11fb9060e0 mips/loongson_1b: format code 2014-08-18 15:24:21 +08:00
Grissiom 0ee101ccb0 mips/loongson_1b: install NULL handler is OK 2014-08-18 15:22:16 +08:00
Grissiom 1d928f7daf mips/loongson_1b: fix rt_interrupt_dispatch 2014-08-18 15:21:09 +08:00
陈豪 fd6ef4b235 [libcpu]am335x edit vector
vector_undef and vector_dabt
2014-08-12 18:26:22 +08:00
aozima 2c47f2e683 Fix some spell error; 2014-07-31 13:59:25 +08:00