Commit Graph

16088 Commits

Author SHA1 Message Date
LaterComer 2cbe8bdae0
解决ktime部分函数计算时unsigned long溢出 (#9008)
* 解决ktime部分函数计算时unsigned long溢出

* 恢复部分不需要ktime中部分rt_uint64_t类型的为unsigned long
2024-05-30 12:04:33 +08:00
Jiading Xu 2fcf151a8e [components][drivers][include][phy] add one more parameter for mulitiple phys
- add parameter phy to specify multiple-phy instance

Signed-off-by: Jiading Xu <Jiading.Xu@hpmicro.com>
2024-05-29 22:22:51 +08:00
wdfk-prog 8e54e31c74
[IDLE] 修改注释,避免造成歧义 (#9010) 2024-05-29 22:18:13 +08:00
WKJay 2fd9ff56dc [BSP][stm32f103-100ask-pro]add ext_sram driver to stm32f103-100ask-pro 2024-05-29 20:19:46 +08:00
lzh 07d7b71345 code format adjustment 2024-05-29 20:18:18 +08:00
lzh b764055018 xmac port code update 2024-05-29 20:18:18 +08:00
lzh 7d7a53ebc1 aarch32 config update tcp pri 12->16 2024-05-29 20:18:18 +08:00
lzh e2c98c9e63 aarch64 config update tcp pri 12->16 2024-05-29 20:18:18 +08:00
lzh 6dc3d7f968 aarch32 menuconfig all update 2024-05-29 20:18:18 +08:00
lzh 65b5735178 ping test e2000d pass 2024-05-29 20:18:18 +08:00
lzh 214f187821 gpio disabled 2024-05-29 20:18:18 +08:00
lzh 601b29967a aarch64 config update all 2024-05-29 20:18:18 +08:00
Shell 63591d935e
[smart] fixup errno passing on sys_mkdir() (#9007)
Use _SYS_WRAP to fetch errno on return of mkdir to avoiding overriding
of it on other system APIs.

Signed-off-by: Shell <smokewood@qq.com>
2024-05-29 18:06:54 +08:00
Shell f179ce12b7
[smart] update sched_setaffinity() to use thread(task) ID (#9004)
Correct `sched_setaffinity()` to use the thread IDs (TIDs) instead of
process IDs (PIDs). The previous implementation used PIDs, which
caused issues since affinity settings need to be applied at the
thread level.

As the manual documented, the signature is:

>        int sched_setaffinity(pid_t pid, size_t cpusetsize,
>                             const cpu_set_t *mask);

Yes, it's tricky, the identification passing in is called **'PID'**.
But when we talk about 'pid' from GNU libc, it's the **'task-id'**,
aka, `thread->tid` known in kernel.

Changes were made by updating the function signatures and logic in
`lwp.h`, `lwp_pid.c`, and `lwp_syscall.c` to accept TIDs. Specifically,
the `lwp_setaffinity` function and related internal functions now
operate using thread IDs and adjust thread affinity settings accordingly

Signed-off-by: Shell <smokewood@qq.com>
2024-05-29 06:53:22 +08:00
heyuanjie87 326150e2f4
[lwp/riscv]进入libc前初始化用户态sp (#8997) 2024-05-29 06:52:38 +08:00
LZerro 3172d37db7 [BSP][Infineon]Change Readme 2024-05-28 16:39:16 +08:00
Shell f17f994f8c
[arm64] add hw thread self (#8942)
* [libcpu] arm64: Add hardware thread_self support

This patch introduces hardware-based thread self-identification
for the AArch64 architecture. It optimizes thread management by
using hardware registers to store and access the current thread's
pointer, reducing overhead and improving overall performance.

Changes include:
- Added `ARCH_USING_HW_THREAD_SELF` configuration option.
- Modified `rtdef.h`, `rtsched.h` to conditionally include
  `critical_switch_flag` based on the new config.
- Updated context management in `context_gcc.S`, `cpuport.h`
  to support hardware-based thread self.
- Enhanced `scheduler_mp.c` and `thread.c` to leverage the new
  hardware thread self feature.

These modifications ensure better scheduling and thread handling,
particularly in multi-core environments, by minimizing the
software overhead associated with thread management.

Signed-off-by: Shell <smokewood@qq.com>

* fixup: address suggestion

* fixup: rt_current_thread as global

* scheduler: add cpu object for UP scheduler

Also, maintain the rt_current_thread in cpu object on UP scheduler.

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-05-28 14:27:55 +08:00
GUI b45fb59df2
[OFW] io ranges use list to storage without ofw data (#8993)
[OFW] io ranges use ptr array to storage without ofw data

ofw data is private data for every ofw node that
the drivers of ofw node will use item.
replace the ranges supported to a ptr array.

the ptr array size is config by `RT_USING_OFW_BUS_RANGES_NUMBER`

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 14:25:09 +08:00
GUI 6f6b0c3ba0
[DM/feature] Simple NUMA (Non-Uniform Memory Access) (#9000)
For some CPU memory access devices, that the drivers
will find memory and CPU affinity to config device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 14:08:33 +08:00
Shell 952f2c43f8
[smart] add FIONREAD ioctl support for tty (#8996)
Signed-off-by: Shell <smokewood@qq.com>
2024-05-28 09:56:10 +08:00
GUI de352aee62
[PIC] Make affinity helper interface (#8995)
* [PIC] Make affinity helper interface

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [PIC/GIC] Fixup GIC affinity init

GICv2 is not support if current CPU is not startup,
but RT-Thread SMP is startup after the devices init
in the `main` thread.

This patch fixup the cpumask to init once and check
the init status in affinity interface.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

---------

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 09:55:24 +08:00
GUI f035188094
[OFW] Support ID map interface (#8994)
The OFW map id is always use in DMA, PCI, IOMMU
bus system to find the device identity. this is
a access interface.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 09:54:03 +08:00
GUI 8c6c9205b0
[OFW] Fixup irq parse map and map mask (#8992)
`map_len` and `map_mask_len` is the count of elements,
not the bytes size of elements.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 09:52:10 +08:00
GUI 754c59a411
[Feature] DFS mount auto by kernel parameters (#8989)
DFS mount auto by kernel parameters

1.Mount the rootfs options by parameters:
- root=: root device, like vda1, sda1, sd0p1, nvme0n0p1...
- rootfstype=: root file system type, like elm, ext, crom...
- rw/ro: root is readonly or all enable, if not have 'rw' flag,
         the 'ro' flag is default.
- rootwait: always wait for root device status is OK.
- rootdelay=: mount rootfs delay amount of time (millisecond).

2.Mount the other fs options by `fstab.sh`, it will read the script
after root mount is OK, it's format is a list of mount cmds in MSH:

mount vda2 /mnt elm
mount 192.168.1.1:/ /mnt/remote nfs

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 00:26:57 +08:00
Rbb666 ae6a3287e6 Add psoc62、61 config. 2024-05-27 21:20:13 +08:00
LZerro b65b922f6c Adjust the PKG selection position. 2024-05-27 21:20:13 +08:00
LZerro 0d2d5e88c7 Format some file 2024-05-27 21:20:13 +08:00
LZerro 3d6b978ba9 Format some File 2024-05-27 21:20:13 +08:00
LZerro 731c4034dc Add BSP CI 2024-05-27 21:20:13 +08:00
LZerro 4b6a60bf1e Add XMC7200 BSP And Make the HAL library as a software package 2024-05-27 21:20:13 +08:00
winfenggao 80dc539698 如果申请空间不足,申请不到合适的空间,需要回收new_rbb 2024-05-27 11:28:45 +08:00
Fan YANG 2cc2743fc7 [components][drivers][sd] add uhs-i mode support to sd driver
- added SDR50, SDR104 and DDR50 support to SD driver

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
2024-05-27 11:27:03 +08:00
flyingcys 09a0e4c5f8 update gpio driver 2024-05-27 11:26:09 +08:00
Shell 5f71da566a
[libcpu] arm: fixup signal handling (#8988)
Signed-off-by: Shell <smokewood@qq.com>
2024-05-26 22:00:48 +08:00
Shell 397cdcd132
[libcpu] discard rt_current_thread (#8976)
* [libcpu] rv64: discard rt_current_thread

* arm: using rt_thread_self to fetch current TCB
2024-05-26 22:00:17 +08:00
Fan YANG 1a1514640a [components][drivers][mmc] add HS400 support to mmc driver
- added HS400 supprt (both eMMC5.0 and eMMC5.1 flavor are supported)

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
2024-05-26 12:36:02 +08:00
Chen Wang 5dd3b7427a
Accumulated patchsets for bsp/cvitek (#8968)
* bsp: cvitek: kconfig: add wdt for cv18xx_riscv

Add Watchdog timer in Kconfig.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* drv: cvitek: remove using macro from source file

Building of source file should be controlled by SConscript,
but not in source file itself.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add i2c for cv18xx_riscv

Add I2C in Kconfig for c906B.

Note, the IRQ# is different from that of c906L.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add rtc for cv18xx_riscv

Add RTC in Kconfig for c906B.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: fix channel issue for pwm driver

The original code confuses the concepts of controllers and channels.
Fixed it and do some code cleanup.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for cv18xx_riscv

Pinmux in driver code is controlled by SOC type, bcos driver
code should be general and support all pins defined by SoC.

Pinmux configuration in Kconfig is controlled by BOARD type,
bcos when we operate on board, it does not expose all chip-level
pin signals and we can only use part of them.

Following is I2C signals exported by duo family. Details see
https://milkv.io/docs/duo/overview.

Note: we have not added support for duo-S.

Duo
===

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo 256m
========

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S
=====

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>

* bsp:cvitek: remove using macro from source file for i2c

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: unify menu message text for i2c as other drivers

Other dirvers has no extra word "HW".

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for c906_little

Porting what we have done in commit "bsp:cvitek: add i2c pinmux config
for cv18xx_riscv" to c906_little.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

---------

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>
Co-authored-by: flyingcys <flyingcys@163.com>
2024-05-22 08:19:07 +08:00
zms123456 adf2b35ec6
[component][driver]init dm serial naming framework in a separate phase (#8971)
init dm serial naming framework in a phase
2024-05-21 22:36:20 +08:00
Shell 6b12bce22f
[quality] fixup compiler warning (#8961)
Signed-off-by: Shell <smokewood@qq.com>
2024-05-21 19:47:42 +08:00
Shell 5f947863b4
[dfsv2] fixup out-of-memory access (#8973)
This change addresses a potential out-of-memory access issue in the
devfs filesystem component. The issue arises when the `rt_malloc`
function allocates memory for a path string without accounting for
the null terminator, leading to undefined behavior.

As the manual documented:

> DESCRIPTION
>   The strlen() function calculates the length of the string pointed to
>   by s, excluding the terminating null byte ('\0').

To fix this, the memory allocation size was increased by one byte
to ensure space for the null terminator. This prevents potential
out-of-memory access and ensures proper string termination.

Signed-off-by: Shell <smokewood@qq.com>
2024-05-21 19:45:08 +08:00
zms123456 6101f1fd29
[components][driver]add isr statistics (#8955)
add isr statistics
2024-05-21 09:01:42 +08:00
Astrozen ce913b95c7
[tools/cmake] fix the issue of the missing link flags added in Sconscript (#8957) 2024-05-21 08:58:26 +08:00
Shell e82c53559b
[utest] add device find (#8959)
* [utest] add device find

Signed-off-by: Shell <smokewood@qq.com>

* fixup: add test

* fixup: ptr aliasing

* quality: meaning parameter

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-05-21 08:56:35 +08:00
蒙蒙plus 2f559906d6 feat(bsp): hc32L196增加IAR_8.40支持
Signed-off-by: 蒙蒙plus <chengmeng_2@outlook.com>
2024-05-17 18:38:05 -04:00
Shell f2d6325b43
[smart] select console device dynamically (#8949)
* [smart] select console device dynamically

- Fixed compiler warning on terminal subsystem for
  `components/lwp/terminal/terminal.h`
- Updated default console setup to dynamically select an appropriate tty
  device based on the configured console device name.

Signed-off-by: Shell <smokewood@qq.com>

* fixup: remove useless codes

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-05-17 13:19:00 +08:00
JamieTx 3d30b56c86 [HC32] Fixed a bug about erase flash. 2024-05-16 19:15:38 -04:00
sheltonyu 194fd6df05 [bsp/at32] 1.fixed f402 uart7/8 pierph clock source error, 2.fixed compiling error of drv_usart_v2.c with no dma 2024-05-16 19:15:17 -04:00
Shell e25fc8b511
[libcpu/arm64] add C11 atomic ticket spinlock (#8882)
* [libcpu/arm64] add C11 atomic ticket spinlock

Replace the former implementation of flag-based spinlock which is unfair

Besides, C11 atomic implementation is more readable (it's C anyway),
and maintainable. Cause toolchain can use their builtin optimization and
tune for different micro-architectures. For example armv8.5 introduces a
better instruction. The compiler can help with that when it knows your
target platform in support of it.

Signed-off-by: Shell <smokewood@qq.com>

* fixup: RT_CPUS_NR

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-05-16 15:45:12 +08:00
xiao-mang e46333496f
fix specified network card not taking effect with msh's ping error (#8937)
* fix specified network card not taking effect with msh's ping error

* fix specified network card not taking effect with msh's ping error
2024-05-16 15:43:50 +08:00
zms123456 ed002bb84a
[drivers][serial]fix error in getting serial_tty settings (#8953)
fix error in getting serial_tty settings
2024-05-16 15:36:16 +08:00