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30 Commits

Author SHA1 Message Date
Bernard Xiong 8da9f78d72 [libc] remove rtlibc 2021-09-11 11:07:51 +08:00
Meco Man 6c907c3a47 [libcpu] auto formatted 2021-03-27 17:51:56 +08:00
yangjie c17c727628 [libcpu]update GPL license to Apache-2.0 2021-03-24 15:58:47 +08:00
yangjie ef62febf1f [SConscript]update group name 2020-12-19 16:49:11 +08:00
yangjie11 ba83ddc3c4 [SConscript] change libcpu to LIBARCH,and correcte letter case 2020-11-30 15:52:43 +08:00
yangjie11 91261e25b9 [SConscript]rename group name 2020-11-20 13:38:11 +08:00
michael a8928c881e MIPS:fix the RT_EXCEPTION_MAX value 
from <see mips run> know that cp0_cause's ExcCode have 5 bit filed and
the max exception is 32.
 2020-09-14 11:10:44 +08:00
bigmagic c66314a8b6 fixed loongson bsp build on windows 2020-09-04 11:57:35 +08:00
bigmagic 1556ba8e7f add ls2k mmu 2020-09-04 10:16:34 +08:00
bigmagic bd95f3a94f fix mips stackframe and exception 2020-09-04 10:16:34 +08:00
michael 3d0bdf4bb6 MIPS:improvement FPU support 2020-08-25 11:52:07 +08:00
michael 3ce53f9c79 MIPS:remove redundant #ifdef ARCH_MIPS64 
there exist redundant #ifdef ARCH_MIPS64 in asm.h, remove it
 2020-08-24 09:35:10 +08:00
bigamgic 1ec681a551 fix ls2k libc and irq 2020-06-21 23:28:11 +08:00
duhuanpeng f295149f20 MIPS: fix inline assembly for FPU 
Signed-off-by: duhuanpeng <548708880@qq.com>
 2020-04-10 15:07:39 +08:00
duhuanpeng ee61d78b18 MIPS: inline routine should be static here 
gcc will remove this "unused" routine and cause a linking error.
symbol not found when linking.

Signed-off-by: duhuanpeng <548708880@qq.com>
 2020-04-10 15:07:34 +08:00
bigmagic c27f13c6c9 [mips]fix a bug 2020-04-07 19:01:54 +08:00
bigmagic dff04ffdc6 fix mips stackframe point 2020-04-07 14:49:20 +08:00
bigmagic 3c5329a9b7 mips repair constraint 2020-04-07 14:43:20 +08:00
bigmagic c024e2e485 add ls2k bsp config 2020-04-07 14:39:20 +08:00
bigmagic 990f731b77 fix mips64 some bug 2020-04-07 14:39:12 +08:00
bigmagic 0f26ffa7a2 add ls2k bsp 2020-04-07 14:38:58 +08:00
Jiaxun Yang 7c66501861 [libcpu] Refine MIPS common code 
MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.

The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
 2019-12-11 15:24:04 +08:00
Zhou Yanjie d45efced1c libcpu: MIPS: 更新版权信息/Update copyright information. 
更新版权信息。

Update copyright information.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
 2019-07-19 21:05:00 +08:00
Bernard Xiong 3a3c6c51f8 [libcpu] remove cache.h from mips/common folder. 2019-01-07 21:16:05 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
tangyuxin afc2256d01 [libcpu]Support x1000 CPU 2017-11-10 19:50:14 +08:00
勤为本 7129d77bee 增加龙芯1c硬浮点的支持（可以使用硬浮点了） 2017-08-10 15:35:03 +08:00
Bernard Xiong 72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
bernard.xiong@gmail.com 67eff19969 add init loongson soc3210 porting. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1012 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2010-10-15 23:40:44 +00:00
bernard.xiong e94adf07ca add init Jz47xx porting. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@792 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2010-07-14 09:51:49 +00:00