Commit Graph

531 Commits

Author SHA1 Message Date
David Lin 36d2652f0d
Fixed typo 'threah' and 'swithc' in cpuport.c
Fixed typo:
    threah -> thread
    swithc -> switch
2020-02-17 09:13:17 +08:00
Watson Zeng fe24ae7ca4 [bsp][synopsys] add basic new embarc bsp support
* the initial support of synopsys designware ARC processor
  using embARC_BSP, all synopsys ARC-based boards are
  supported:
  -ARC Software Development Platform
  -ARC EM Starter Kit
  -ARC EM Software Development Platform
  -ARC HS Development Kit
  -ARC IoT Development Kit

* The embARC BSP is a new generation embARC software development
  package.  ​It is designed to be the inter-layer between hardware and
  operating system. ​ BSP could hide the difference of hardware/boards,
  provide a unified interface to upper-layer.

* the initial support of synopsys MWDT toolchain.
  The DesignWare® ARC® MetaWare Development Toolkit builds upon
  a 25-year legacy of industry-leading compiler and debugger products.
  It is a complete solution that contains all the components needed to
  support the development, debugging and tuning of embedded applications
  for the DesignWare ARC processors.

* for detailed board information, pls go embarc.org.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-01-16 16:02:00 +08:00
bigmagic f922bf2e31 Add comment information 2020-01-15 16:46:19 +08:00
bigmagic 08f55d9fda add raspi3-32 in bsp 2020-01-15 16:38:22 +08:00
bigmagic fdde8ab198 add raspi2 and raspi3 BSP 2020-01-10 10:38:21 +08:00
Jiaxun Yang 9ef986929c [libcpu] mips: Merge loongson_1 into gs232
Previously Loongson 1B and Loongson 1C have their own libcpu
implemention, but they're almost identical. So we merge them
into gs232 and adapt to new common code.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:42 +08:00
Jiaxun Yang 7c66501861 [libcpu] Refine MIPS common code
MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.

The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:04 +08:00
Bernard Xiong a972fcc0b5 [BSP] move libcpu/mips/x1000 to bsp/x1000/cpu 2019-12-11 11:01:40 +08:00
ZhangTao 80a4912baf 修改了上下文切换退出时的bug,该bug会导致中断被提前打开造成死锁 2019-11-05 10:30:47 +08:00
tangyuxin a16f27d84e [libcpu][cm33] support cortex-m33 2019-10-29 09:45:17 +08:00
ZYH cabdbf5bbf [libcpu][M7]修复cache编译警告
Signed-off-by: ZYH <lymz@foxmail.com>
2019-10-23 15:04:34 +08:00
aozima 525d353403 fixed linker script and stack align issues. 2019-10-22 09:47:41 +08:00
shaojinchun cb07e5fb24 开放spinlock相关函数 2019-09-27 14:38:33 +08:00
tangyuxin 8316646b85 [libcpu][arm] 修复因提前返回,导致sp指针不对称问题 2019-09-19 18:27:07 +08:00
xiaofan 94551979e0 Fix Cortex-M0 Cannot Execute Reboot
Signed-off-by: xiaofan <xfan1024@live.com>
2019-09-07 21:20:46 +08:00
xuzhuoyi a101327d24 [bsp][tms320f28379d] Fix an issue that interrupts are disabled in the thread 2019-08-24 18:42:54 +08:00
liufeilong ab818cda30 参照龙芯1c手册更正看门狗寄存器宏定义 2019-08-21 13:44:55 +08:00
tyustli 49e9d19c82 first version 2019-07-24 17:03:26 +08:00
Zhou Yanjie d45efced1c libcpu: MIPS: 更新版权信息/Update copyright information.
更新版权信息。

Update copyright information.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:05:00 +08:00
Zhou Yanjie d6b2f56f15 libcpu: MIPS: 清理代码/Clean up code.
清理内容重复的头文件。

Clean up duplicate header files.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:00:34 +08:00
Bernard Xiong ba9dbed372
Merge pull request #2827 from yangjie11/ac6
[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7
2019-07-05 15:23:57 +08:00
明德无敌赵晓薇 d68220d866 [libcpu][c28x]Add __rt_ffs support
Use a native instruction "Count Sign Bits" to support fast ffs function, then add __rt_ffs support in C28x.
2019-07-03 19:31:54 +08:00
yangjie 31ffc4582c [libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7 2019-07-03 18:47:11 +08:00
Bernard Xiong 38d5c2aa72
Merge pull request #2796 from lymzzyh/cache
修复cortex-a 中cache操作没有 dsb isb
2019-06-19 11:41:05 +08:00
ZYH fc155f8810 fix cortex-a cahce 2019-06-19 10:40:13 +08:00
明德无敌赵晓薇 21d32cdb3a
[libcpu][C28x] Fix bugs of old c28x interrupt api which can not save and restore int status
In C28x DSP, interrupt status are stored in ST1 register. Both INTM and DBGM is used for masking interrupt, while the latter one is used in real-time debug mode. The origin function rudely enable and disable the interrupt without considering the recent interrupt status, which not only may cause  problem in some situation but also is not in conformity with rt-thread design specifications. The new api will fix this bug.
2019-06-18 20:59:00 +08:00
Bernard Xiong 0b4e2a984e
Merge pull request #2731 from jesven/a9-fpu
add cortex-a fpu support
2019-05-29 18:30:44 +08:00
shaojinchun 043611b98a add cortex-a fpu support 2019-05-29 08:40:41 +08:00
HubretXie 36ffdc058b
对CM3,CM4,CM7 自动开启RT_USING_CPU_FFS 2019-05-28 21:30:45 +08:00
neal 257d21c0bd [bsp][at91sam9g45]Fix build bugs which caused by the change of libcpu/arm/arm926/start_gcc.S 2019-05-13 18:36:31 -07:00
Bernard Xiong ec6cb9f260 [BSP][qemu-vexpress-a9] code cleaup for compiling warning. 2019-05-12 15:07:26 +08:00
shaojinchun bcb7fac0d0 fix signals for k210 2019-05-11 09:37:25 +08:00
shaojinchun 6cdfb2ac92 fix signal code 2019-05-11 09:34:26 +08:00
Bernard Xiong d729448f5e [libcpu][arm/cortex-a] Add correct comments. 2019-05-09 08:48:38 +08:00
misonyo 0f33da3f0e [libcpu/cortex-m7]add cache driver 2019-04-27 17:35:46 +08:00
shaojinchun 1e7bd3d8a1 修改lwp支持中arm cortex-a的swi入口函数处理 2019-04-27 13:54:51 +08:00
qz721 61f2a71511 Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
2019-04-26 10:50:48 +08:00
Bernard Xiong 41aabf3736
Merge pull request #2573 from xuzhuoyi/tms320f28379d
[bsp][tms320f28379d] Improve finsh support and update README.md
2019-04-14 15:39:37 +08:00
xuzhuoyi 752152b63e [bsp][tms320f28379d] Fix FPU config problem 2019-04-14 12:26:25 +08:00
xuzhuoyi 4acd8db61e [bsp][tms320f28379d] Add finsh init in rt_init_thread 2019-04-10 22:33:25 +08:00
Bernard Xiong 44c3f55996
Merge pull request #2527 from xuzhuoyi/gd32e230
[bsp] Add GD32E230K-START support
2019-04-07 16:59:27 +08:00
Bernard Xiong 238c93468f
Merge pull request #2530 from qz721/libcpu_cortex_a
Disable the data alignment check.
2019-04-01 17:43:19 +08:00
qz721 b10039f396 Disable the data alignment check. 2019-04-01 14:21:59 +08:00
xuzhuoyi fd8eb60a67 [bsp][gd32e230k-start] Update Kconfig 2019-03-31 23:26:35 +08:00
xuzhuoyi 5a460aadcd [bsp][gd32e230k-start] Update Sconscript 2019-03-31 21:17:55 +08:00
xuzhuoyi 5d166c389d [bsp][gd32e230k-start] Add GD32E230K-START BSP port 2019-03-31 15:44:24 +08:00
Bernard Xiong 459ddc3b06
Merge pull request #2523 from qz721/libcpu_cortex_a
Add standard rt-thread cache interfaces for arm/cortex-a.
2019-03-30 05:57:47 +08:00
qz721 fbd40fc5b8 Add standard rt-thread cache interfaces for arm/cortex-a.
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
ZYH fcb88f7034 [libcpu][k210]fix stack frame print 2019-03-28 17:05:52 +08:00
BernardXiong bd8f0d0423 [libcpu] Fix the build directory issue 2019-03-26 13:36:01 +00:00