9 Commits

Author	SHA1	Message	Date
MuChenger	0efc408a00	adapt to rv64ilp32 toolchain	2024-07-18 15:59:40 +08:00
heyuanjie87	a5a89c439f	[rv]修正signal退出后用户态sp少8的问题 (#9080)	2024-06-24 21:36:32 +08:00
Yuqiang Wang	c6bdee3c50	[ci] open ci check with function declaration warning (#8546)	2024-02-20 22:45:04 -05:00
Shell	70a8d1d465	[kservice] improve backtrace service in kernel (#8144) ... Signed-off-by: Shell <smokewood@qq.com>	2023-10-21 20:14:45 +08:00
Shell	e991be9c51	[smart][risc-v/libcpu] port rv64 cpu code (#6704) ... * [risc-v/libcpu] porting Smart & RTOS * [fix] rv64 plic * [risc-v/rv64] remove macro in rtdef	2022-12-10 22:16:42 +08:00
guo	ecf2d82159	sync branch rt-smart. (#6641) ... * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>	2022-12-03 12:07:44 +08:00
bigmagic123	d6f5fbcd5b	format code	2021-05-21 18:39:41 +08:00
bigmagic	b7c7c7f4de	Support for running with M-Mode	2021-05-21 17:10:07 +08:00
lizhirui	5036816967	add qemu-riscv-virt64 bsp ... add qemu-riscv-virt64 bsp	2021-05-18 09:57:25 +08:00