Commit Graph

4782 Commits

Author SHA1 Message Date
GuEe-GUI 16608279db [DM/FIXUP] Fixup pin propname check
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:15:17 +08:00
GuEe-GUI 7c59bb01ed [DM/FIXUP] Fixup pin flags get from OFW
Only check HIGH or LOW

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:15:17 +08:00
GuEe-GUI aa30e9804a [DM/FIXUP] Fixup pin depend auto
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:15:17 +08:00
GuEe-GUI 7b7e4686af [DM/MAILBOX] Fixup platform request will deadlock
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:14:34 +08:00
GuEe-GUI 72a78a268f [DM/DMA] merge ofw_parse and request_chan
Work together can make DMA engine device drivers
knows how want a chan easy.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:14:13 +08:00
GuEe-GUI 8f392779ef [DM/DMA] Use strict mode for device DMA pool
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:14:13 +08:00
ligr e9452ee98f [documentation][dfs]add some comments to dfs posix APIs for supplement. 2024-11-30 21:09:58 -05:00
GuEe-GUI 88b8310d16 [DM/PCI] Add DesignWare PCIe RC/EP base drivers
Too many PCI controllers base on DesignWare PCIe.
This is a modules.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:58 +08:00
GuEe-GUI 50982cd970 [DM/PCI] Add memory window pool for EP
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:58 +08:00
GuEe-GUI 0d2e677f07 [DM/LED] Add GPIO LED driver
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:02 +08:00
GuEe-GUI 175a7d26bf [DM/FEATURE] Support LED
Provides general LED control API and drivers.
It can work on PWM, GPIO and Syscon...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:02 +08:00
GuEe-GUI 6f68ca7c71 [DM/SPI] Support DM mode in SPI
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:04:07 +08:00
GuEe-GUI 49d18ec0a9 [DM/REGULATOR] Add populate drivers
1. Fixed regulator.
2. GPIO regulator.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:02:23 +08:00
GuEe-GUI 56614a4cb9 [DM/FEATURE] Support regulator
1. Add the regulator driver framework.
2. Add the generic voltage and current regulator API support
  for drivers.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:02:23 +08:00
Meco Man 443ade4c29 [sscanf] use rt_sscanf to replace sscanf 2024-11-27 10:59:15 +08:00
ligr ca1d4e6dea [components][ulog]add some comments to ulog for supplement. 2024-11-26 20:05:09 +08:00
GUI d025072837
[DM/FEATURE] Support ATA AHCI (#9683)
Add ACHI drivers to support some old platform
driver such as SATA.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:22:09 +08:00
GuEe-GUI 71520fa9f1 [DM/FIXUP] Add ms sleep for link status change
We should wait a while for success or failure
after link status change or will communicate
fail with the endpoint.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:14:51 +08:00
GuEe-GUI 1ac8044294 [DM/FIXUP] Fixup PCI device ofw private node for MSI
Some PCI device devicetree is like:
```dts
pcie@fe270000 {
    device_type = "pci";
    msi-map = <0x1000 0x9c 0x1000 0x1000>;

    pcie@10 {
        reg = <0x100000 0x00 0x00 0x00 0x00>;
        #address-cells = <0x03>;
        #size-cells = <0x02>;

        pcie@10,0 {
            reg = <0x00 0x00 0x00 0x00 0x00>;
        };
    };
};
```

that the pcie@10,0 have a private ofw node, it will find
property name `msi-map` or `msi-parent` fail.
We should only find the property in host bridge's ofw node.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:14:51 +08:00
GUI 1a24ae06f3
[DM/FEATURE] Support reset controller (#9630)
* [DM/FEATURE] Support reset controller

Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
  1. The consumer driver interface, which allows
    peripheral drivers to request control over
    their reset input signals
  2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.

* [RESET/SIMPLE] Support simple reset

Currently this driver supports:
 - Altera SoCFPGAs
 - ASPEED BMC SoCs
 - Bitmain BM1880 SoC
 - Realtek SoCs
 - RCC reset controller in STM32 MCUs
 - Allwinner SoCs
 - SiFive FU740 SoCs
 - Sophgo SoCs

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 10:02:50 +08:00
GUI f849afb5ca
[DM/FEATURE] Support hardware mailbox (#9599)
* [DM/FEATURE] Support hardware mailbox
* [MAILBOX/PIC] Add PIC Mailbox drivers.

The mailbox device(s) may be instantiated in one of three equivalent way:

Device Tree node, eg.:

```dts
interrupt-controller@0 {
	interrupt-controller;
	#interrupt-cells = <1>;
};

pic_mailbox@10000 {
	compatible = "rt-thread,pic-mailbox";
	reg = <0x10000 0x100>;
	position = <0>;
	interrupts = <34>;
	peer-interrupts = <35>;
	uid = <0>;
	#mbox-cells = <1>;
};
```
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 11:00:04 +08:00
GUI c2545cdd7b
[DM/FEATURE] Support PHY (external) (#9597)
This framework will be of use only to devices that use
external PHY (PHY functionality is not embedded within the controller).

Use in PCIE, USB, HDMI, DP...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 10:23:01 +08:00
PermissionDenied7335 92f26b7ad2 [drivers] fixed a minor typo in the comments of dev_serial_v2.c 2024-11-24 12:48:19 -05:00
GUI 945114fd59
[DM/FEATURE] Support NVME (#9591)
* [DM/FEATURE] Support NVME

1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-24 13:57:37 +08:00
Meco Man 13e0671f65 [fal] using rt-thread raw API instead of std API 2024-11-24 11:34:30 +08:00
Meco Man 8e10983c9b [klibc] add rt_vsnprintf_std.c and rename RT_KLIBC_USING_VSNPRINTF_LONGLONG 2024-11-24 11:29:28 +08:00
GUI 42a41c696d
[DM/FEATURE] Support SCSI bus (#9592)
* [DM/FEATURE] Support block for SCSI
1. Support SD and CD-ROM.
2. SD will port to UFS and ATA device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 16:59:37 +08:00
GUI c055261177
[DM/FEATURE] Support DMA management (#9682)
1. DMA pool management for platform.
2. DMA engine driver API.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 14:11:40 +08:00
ligr dd709c1cea [components/libc/posix]add comments for thread local storage APIs. 2024-11-21 21:46:47 -05:00
ligr bb0a1ea453 [components/libc/posix]fix the problem that it doesn't check if barrier still in use and dosen't destory the mutex either. 2024-11-21 19:22:44 -05:00
ligr 0bac8c4f90 [components/libc/posix]fix the errors that assigning an integer to a pointer and always return EINVAL. 2024-11-21 19:22:44 -05:00
ligr 79324c0b4c [components/libc/posix]add comments for barrier APIs. 2024-11-21 19:22:44 -05:00
GUI f797eccbf1
[DM/FEATURE] Support IIO (Industrial I/O) (#9598)
[DM/FEATURE] Support IIO (Industrial I/O)

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 20:44:25 +08:00
GuEe-GUI 4a3fa385cb [DM/FEATURE] Support import SoC Pinctrl config
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 12:44:55 +08:00
GuEe-GUI b0a5bfe66b [DM/FIXUP] Fixup pinctrl depend auto
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 12:44:55 +08:00
GuEe-GUI 0d2c84d89f [DM/FEATURE] make SoC Kconfig import easy
Open Kconfig will not fail if using osource,
This way can make SoC Kconfig to DM easy.

Link: ecb89b1370

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 23:52:34 +08:00
GuEe-GUI 86ba3b666f [DM/FIXUP] Fixup MSI first IRQ read offset
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:34:10 +08:00
GuEe-GUI 34cf382c8b [DM/FIXUP] Fixup PCI MSI global irq map
Don't use `irq` as a var when clear MSI global
irq map, the irq which alloc before will rewrite.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:34:10 +08:00
GuEe-GUI 33785ca68a [DEVICE/SDIO] port to the block
1. remove gpt.
2. remove block device custom.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI c424cb8186 [DM/FEATURE] Support simple block layer
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI 10cac76d3b [DM/FEATURE] Support MFD syscon
MFD (Multifunction device) with System Controller Register Read/Write.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 15:53:23 +08:00
GuEe-GUI f5aca55a26 [DM/FEATURE] Support import SoC CLK config
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 11:08:28 +08:00
GuEe-GUI b6dff44054 [DM/FIXUP] Fixup CLK
1. Default return OK when input NULL (if is not necessary in device).
2. Support object parse in OFW.
3. Support CLK depends fix auto.
4. Fixup rt_clk_array_prepare_enable and rt_clk_array_disable_unprepare.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 11:08:28 +08:00
zhuzhuzhu bdf4da8ee1
[components][driver]add phy and mdio bus
old phy bus is too simple add phy_bus is not adapt rt_bus framework,so writer a stronger phy bus framework.

here is my commit message:
add mdio bus and phy bus to kernel,the phy bus use rt_bus framewok ,driver writer can write phy_driver first .when mac driver need to use phy they can register phy_device and pjhy_devie will serach for driver which match by uid and mask,if no driver match with the device that you register,phy_bus will return the genphy to you device,the genphy driver is the general driver for phy,so you can use it but it can not support the capcity of chip it may be cause performance is not up to peak
2024-11-19 21:34:03 -05:00
ligr b023c15256 [components/libc/posix]add comments for rwlock APIs. 2024-11-19 18:26:16 -05:00
ligr c1c7959bdb [components/libc/posix]add comments for condition variable APIs. 2024-11-19 18:26:16 -05:00
ligr 07c8b571ce [components/libc/posix]add comments for mutex APIs. 2024-11-18 19:21:02 -05:00
GuEe-GUI 6185250c86 [DM/FEATURE] Support clock subprobe in OFW
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00
GuEe-GUI cefe6d6380 [DM/FEATURE] Support driver depends fix auto
We need a API to fix the driver load auto when
a second driver get it in probe process that
we can not be careful of the driver-to-driver's
depends in different SoC.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00
GuEe-GUI b6f67285e9 [DM/FIXUP] remove OFW switch macros
The drivers will support OFW and name probe both.
We should make build OK when OFW is disable.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00