Commit Graph

16682 Commits

Author SHA1 Message Date
Chen Wang 16475b3c92 bsp: cvitek: fix warning on rtc driver
When RTC is enabled, a warning appear during compiling:
warning: implicit declaration of function 'rtc_alarm_enable' [-Wimplicit-function-declaration]
  366 |     rtc_alarm_enable(alarm->enable);
      |     ^~~~~~~~~~~~~~~~

It's due to _rtc_set_alarm is not covered by RT_USING_ALARM. It's wrong.

Solution: cover all functions including _rtc_get_alarm & _rtc_set_alarm
under RT_USING_ALARM macro conditional defintion.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-26 21:45:00 -05:00
Chen Wang 0c910e755d bsp: cvitek: add introduction about rt-smart booting with rootfs
README.md: add introduction about how to make rootfs(fat) and
booting kernel with it.

Plus some cleanup for this documentation.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-26 21:45:00 -05:00
Chen Wang 032fe9c3a3 bsp: cvitek: support mount fat/ext rootfs for rt-smart
Support mount rootfs automaticly during booting up.
First try ext, then fat.

Plus some code cleanup, such as remove BSP_USING_ON_CHIP_FLASH_FS,
which is not defined and unused.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-26 21:45:00 -05:00
Chen Wang 1052f99537 bsp: cvitek: 906b: romfs -> diskfs
ROMFS is Read-Only Memory Filesystem. But ext4/fat are not read-only.

So renamed:
- mnt_romfs.c -> mnt_diskfs.c
- BSP_ROOTFS_TYPE_ROMFS -> BSP_ROOTFS_TYPE_DISKFS

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-26 21:45:00 -05:00
Chen Wang c4ba5ee068 kernel: Optimize display format for auto init when debugging
When RT_DEBUGING_AUTO_INIT is enabled, kenrel will add more
print message for auto init. However, the original format
easily causes the kernel printing and the init function printing
to be connected together, resulting in a confusing display
format.

For exmaple:
```
initialize lwip_system_initlwIP-2.0.3 initialized!
:0 done
```
Or
```
initialize sal_init[I/sal.skt] Socket Abstraction Layer initialize success.
:0 done
```

Solution: Add a carriage return to separate the kernel
printing and the init function printing.

After changing, the output will be:
```
initialize lwip_system_init
lwIP-2.0.3 initialized!
:0 done
```
Or
```
initialize sal_init
[I/sal.skt] Socket Abstraction Layer initialize success.
:0 done
```

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-11-26 21:44:19 -05:00
ligr ca1d4e6dea [components][ulog]add some comments to ulog for supplement. 2024-11-26 20:05:09 +08:00
hywing 07999dc84a [bsp][nxp][mcxa153] add interrupt process in IRQ Handler functions 2024-11-26 20:04:31 +08:00
hywing 46b2850f12 [bsp][nxp][mcxa153] add hardware timer driver 2024-11-26 20:04:31 +08:00
GUI d025072837
[DM/FEATURE] Support ATA AHCI (#9683)
Add ACHI drivers to support some old platform
driver such as SATA.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:22:09 +08:00
GuEe-GUI 71520fa9f1 [DM/FIXUP] Add ms sleep for link status change
We should wait a while for success or failure
after link status change or will communicate
fail with the endpoint.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:14:51 +08:00
GuEe-GUI 1ac8044294 [DM/FIXUP] Fixup PCI device ofw private node for MSI
Some PCI device devicetree is like:
```dts
pcie@fe270000 {
    device_type = "pci";
    msi-map = <0x1000 0x9c 0x1000 0x1000>;

    pcie@10 {
        reg = <0x100000 0x00 0x00 0x00 0x00>;
        #address-cells = <0x03>;
        #size-cells = <0x02>;

        pcie@10,0 {
            reg = <0x00 0x00 0x00 0x00 0x00>;
        };
    };
};
```

that the pcie@10,0 have a private ofw node, it will find
property name `msi-map` or `msi-parent` fail.
We should only find the property in host bridge's ofw node.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:14:51 +08:00
hywing 5346c87fe2 [bsp][nxp][mcxa153] update drv_wdt.c && drv_wdt.h file format 2024-11-25 21:19:26 -05:00
hywing e43df5eb9e [bsp][nxp][mcxa153] add watch dog driver 2024-11-25 21:19:26 -05:00
GUI 1a24ae06f3
[DM/FEATURE] Support reset controller (#9630)
* [DM/FEATURE] Support reset controller

Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
  1. The consumer driver interface, which allows
    peripheral drivers to request control over
    their reset input signals
  2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.

* [RESET/SIMPLE] Support simple reset

Currently this driver supports:
 - Altera SoCFPGAs
 - ASPEED BMC SoCs
 - Bitmain BM1880 SoC
 - Realtek SoCs
 - RCC reset controller in STM32 MCUs
 - Allwinner SoCs
 - SiFive FU740 SoCs
 - Sophgo SoCs

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 10:02:50 +08:00
Meco Man 9afe6a5182 [klibc] separate klibc Kconfig 2024-11-25 14:28:36 +08:00
GUI f849afb5ca
[DM/FEATURE] Support hardware mailbox (#9599)
* [DM/FEATURE] Support hardware mailbox
* [MAILBOX/PIC] Add PIC Mailbox drivers.

The mailbox device(s) may be instantiated in one of three equivalent way:

Device Tree node, eg.:

```dts
interrupt-controller@0 {
	interrupt-controller;
	#interrupt-cells = <1>;
};

pic_mailbox@10000 {
	compatible = "rt-thread,pic-mailbox";
	reg = <0x10000 0x100>;
	position = <0>;
	interrupts = <34>;
	peer-interrupts = <35>;
	uid = <0>;
	#mbox-cells = <1>;
};
```
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 11:00:04 +08:00
flyingcys 8ed4ae144f support milkv-duo rt-smart
1. switches memory management to SLA

2. use ioremap modification driver

Signed-off-by: flyingcys flyingcys@163.com
2024-11-25 10:48:36 +08:00
GUI c2545cdd7b
[DM/FEATURE] Support PHY (external) (#9597)
This framework will be of use only to devices that use
external PHY (PHY functionality is not embedded within the controller).

Use in PCIE, USB, HDMI, DP...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 10:23:01 +08:00
Meco Man 8b4d1c0c5d [klibc] add rt_sscanf
cherry-pick from: https://github.com/PetteriAimonen/Baselibc/blob/master/src/vsscanf.c

BSD license
2024-11-25 09:49:23 +08:00
Shell b7520e262b feat: Kconfig: moving the arm64 specified configs to sub-menu
Just for better readability.

Signed-off-by: Shell <smokewood@qq.com>
2024-11-24 13:44:34 -05:00
Shell fe2b124345 feat: arm64 ASID support
Support for ARM64 ASID to enhance virtual memory management efficiency
by reducing the need for TLB flushes during address space switches.
These changes improve performance especially for multi-process systems.

Changes:
- Added `ARCH_USING_ASID` configuration in `libcpu/aarch64/Kconfig`.
- Defined ASID-related constants in `mmu.h`.
- Updated `TLBI_ARG` macro to include ASID manipulation.
- Implemented ASID allocation mechanism with spinlock synchronization.
- Enhanced TLB invalidation to support ASID-specific operations.
- Modified `rt_hw_aspace_switch` to use ASIDs when switching address spaces.
- Adjusted debug logging and function documentation to reflect ASID usage.
- Refactored AArch64 MMU and TLB handling for ASID integration.

Signed-off-by: Shell <smokewood@qq.com>
2024-11-24 13:44:34 -05:00
PermissionDenied7335 92f26b7ad2 [drivers] fixed a minor typo in the comments of dev_serial_v2.c 2024-11-24 12:48:19 -05:00
GUI 945114fd59
[DM/FEATURE] Support NVME (#9591)
* [DM/FEATURE] Support NVME

1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-24 13:57:37 +08:00
Meco Man 13e0671f65 [fal] using rt-thread raw API instead of std API 2024-11-24 11:34:30 +08:00
Meco Man fbcda2a788 [kernel] format Kconfig 2024-11-24 11:30:58 +08:00
Meco Man 8e10983c9b [klibc] add rt_vsnprintf_std.c and rename RT_KLIBC_USING_VSNPRINTF_LONGLONG 2024-11-24 11:29:28 +08:00
Kai e4b02a28f8
[tools][cmake] fix processing groups with similar name (#9667) 2024-11-22 19:06:43 +08:00
GUI 42a41c696d
[DM/FEATURE] Support SCSI bus (#9592)
* [DM/FEATURE] Support block for SCSI
1. Support SD and CD-ROM.
2. SD will port to UFS and ATA device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 16:59:37 +08:00
GUI c055261177
[DM/FEATURE] Support DMA management (#9682)
1. DMA pool management for platform.
2. DMA engine driver API.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 14:11:40 +08:00
ligr dd709c1cea [components/libc/posix]add comments for thread local storage APIs. 2024-11-21 21:46:47 -05:00
heyuanjie87 2a684126c0 [libcpu][riscv]纠正pv_offset的对齐检查 2024-11-21 19:23:11 -05:00
ligr bb0a1ea453 [components/libc/posix]fix the problem that it doesn't check if barrier still in use and dosen't destory the mutex either. 2024-11-21 19:22:44 -05:00
ligr 0bac8c4f90 [components/libc/posix]fix the errors that assigning an integer to a pointer and always return EINVAL. 2024-11-21 19:22:44 -05:00
ligr 79324c0b4c [components/libc/posix]add comments for barrier APIs. 2024-11-21 19:22:44 -05:00
GUI f797eccbf1
[DM/FEATURE] Support IIO (Industrial I/O) (#9598)
[DM/FEATURE] Support IIO (Industrial I/O)

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 20:44:25 +08:00
GuEe-GUI 4a3fa385cb [DM/FEATURE] Support import SoC Pinctrl config
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 12:44:55 +08:00
GuEe-GUI b0a5bfe66b [DM/FIXUP] Fixup pinctrl depend auto
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 12:44:55 +08:00
zhangjing 858813a081 [bsp][qemu-virt64-riscv]:remove the redundant UART1 configuration from the Kconfig 2024-11-20 21:49:49 -05:00
GuEe-GUI 0d2c84d89f [DM/FEATURE] make SoC Kconfig import easy
Open Kconfig will not fail if using osource,
This way can make SoC Kconfig to DM easy.

Link: ecb89b1370

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 23:52:34 +08:00
GuEe-GUI 86ba3b666f [DM/FIXUP] Fixup MSI first IRQ read offset
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:34:10 +08:00
GuEe-GUI 34cf382c8b [DM/FIXUP] Fixup PCI MSI global irq map
Don't use `irq` as a var when clear MSI global
irq map, the irq which alloc before will rewrite.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:34:10 +08:00
GuEe-GUI 5dda65c21b [DM/FIXUP] add cortex-m23's cpuport.h
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI 33785ca68a [DEVICE/SDIO] port to the block
1. remove gpt.
2. remove block device custom.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI c424cb8186 [DM/FEATURE] Support simple block layer
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI 10cac76d3b [DM/FEATURE] Support MFD syscon
MFD (Multifunction device) with System Controller Register Read/Write.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 15:53:23 +08:00
GuEe-GUI f5aca55a26 [DM/FEATURE] Support import SoC CLK config
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 11:08:28 +08:00
GuEe-GUI b6dff44054 [DM/FIXUP] Fixup CLK
1. Default return OK when input NULL (if is not necessary in device).
2. Support object parse in OFW.
3. Support CLK depends fix auto.
4. Fixup rt_clk_array_prepare_enable and rt_clk_array_disable_unprepare.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 11:08:28 +08:00
zhuzhuzhu bdf4da8ee1
[components][driver]add phy and mdio bus
old phy bus is too simple add phy_bus is not adapt rt_bus framework,so writer a stronger phy bus framework.

here is my commit message:
add mdio bus and phy bus to kernel,the phy bus use rt_bus framewok ,driver writer can write phy_driver first .when mac driver need to use phy they can register phy_device and pjhy_devie will serach for driver which match by uid and mask,if no driver match with the device that you register,phy_bus will return the genphy to you device,the genphy driver is the general driver for phy,so you can use it but it can not support the capcity of chip it may be cause performance is not up to peak
2024-11-19 21:34:03 -05:00
ligr b023c15256 [components/libc/posix]add comments for rwlock APIs. 2024-11-19 18:26:16 -05:00
ligr c1c7959bdb [components/libc/posix]add comments for condition variable APIs. 2024-11-19 18:26:16 -05:00