Thermal drivers offer a generic mechanism for thermal management.
Usually it's made up of one or more thermal zones and cooling devices.
Each thermal zone contains its own temperature, trip points, and cooling devices.
All platforms with ACPI or OFW thermal support can use this driver.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Add the regulator driver framework.
2. Add the generic voltage and current regulator API support
for drivers.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [DM/FEATURE] Support reset controller
Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
1. The consumer driver interface, which allows
peripheral drivers to request control over
their reset input signals
2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.
* [RESET/SIMPLE] Support simple reset
Currently this driver supports:
- Altera SoCFPGAs
- ASPEED BMC SoCs
- Bitmain BM1880 SoC
- Realtek SoCs
- RCC reset controller in STM32 MCUs
- Allwinner SoCs
- SiFive FU740 SoCs
- Sophgo SoCs
Signed-off-by: GuEe-GUI <2991707448@qq.com>
This framework will be of use only to devices that use
external PHY (PHY functionality is not embedded within the controller).
Use in PCIE, USB, HDMI, DP...
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [DM/FEATURE] Support NVME
1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
PCI/PCIe have better performance and more devices support, such as
NVMe, GPU, Powerful NIC (Like RDMA). PCI/PCIe can access control by
IOMMU that the virtualiztion and userspace driver will more safety.
PCI/PCIe device could hot plugging, no design modifications SoC required,
PCI/PCIe on Embedded SoC is popular now.
We make a simple framework to support them.
Feature Lists:
1.PCI INTx: the INT[A-D] pin IRQ for legacy PCI, work with platform PIC.
2.MSI/MSI-X: the message write IRQ for PCIe, work with platform's PIC.
3.PME: we only support the D0, D1, D2, D3HOT, D3COLD init by framework.
4.Endpoint: a simple EP framework for PCI FPGA or NTB function.
5.OFW: we only support work on OFW SoC, ACPI support in the future maybe.
Host controller:
1. Common PCI host controller on ECAM.
2. Generic PCI host controller on ECAM.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
* [ipc] lockless rt_completion implementation
The new rt_completion implemented by lockless algorithm can improve timer resolution for up to ~12%, compare to sem IPC.
Signed-off-by: Shell <smokewood@qq.com>
* fixup: error
* remove useless changes
---------
Signed-off-by: Shell <smokewood@qq.com>
We support OFW API to replace fdt old API, and add
IRQ, IO, Platform-Bus, CPUs ... OFW node contorl.
To support work with Device Tree or ACPI in drivers
that use IRQ, we make a programmable interrupt
controller driver's model.
Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
* [bsp/nuvoton] Support NuMaker-M467HJ BSP and update drivers.
* Format files.
* [usbhost] List keyboard and update driver.
* Enlarge to reasonable thread stack size.
* Do indent..
* Keep private.
Co-authored-by: Wayne Lin <wclin@nuvoton.com>
* Add CANFD support and correct typos
- Added CANFD required fields to can.h
- Fixed typos in can.h and can.c
- Corrected all the projects affected by the typo
- Fixed wrong line-ending in some affected can driver files
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
* update
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
Co-authored-by: Meco Man <920369182@qq.com>
* add soft-spi
* add spi-bit-ops.c/h to components/drivers/spi
* add a drv_soft_spi example for gd32303e-eval
Signed-off-by: kyle <kylepengchn@163.com>
* Fixed the format and the certificate.
Signed-off-by: kyle <kylepengchn@163.com>
* Update the certificate data.
Signed-off-by: kyle <kylepengchn@163.com>