Commit Graph

1614 Commits

Author SHA1 Message Date
GuEe-GUI 0d2e677f07 [DM/LED] Add GPIO LED driver
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:02 +08:00
GuEe-GUI 175a7d26bf [DM/FEATURE] Support LED
Provides general LED control API and drivers.
It can work on PWM, GPIO and Syscon...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:02 +08:00
GuEe-GUI 6f68ca7c71 [DM/SPI] Support DM mode in SPI
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:04:07 +08:00
GuEe-GUI 49d18ec0a9 [DM/REGULATOR] Add populate drivers
1. Fixed regulator.
2. GPIO regulator.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:02:23 +08:00
GuEe-GUI 56614a4cb9 [DM/FEATURE] Support regulator
1. Add the regulator driver framework.
2. Add the generic voltage and current regulator API support
  for drivers.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:02:23 +08:00
Meco Man 443ade4c29 [sscanf] use rt_sscanf to replace sscanf 2024-11-27 10:59:15 +08:00
GUI d025072837
[DM/FEATURE] Support ATA AHCI (#9683)
Add ACHI drivers to support some old platform
driver such as SATA.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:22:09 +08:00
GuEe-GUI 71520fa9f1 [DM/FIXUP] Add ms sleep for link status change
We should wait a while for success or failure
after link status change or will communicate
fail with the endpoint.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:14:51 +08:00
GuEe-GUI 1ac8044294 [DM/FIXUP] Fixup PCI device ofw private node for MSI
Some PCI device devicetree is like:
```dts
pcie@fe270000 {
    device_type = "pci";
    msi-map = <0x1000 0x9c 0x1000 0x1000>;

    pcie@10 {
        reg = <0x100000 0x00 0x00 0x00 0x00>;
        #address-cells = <0x03>;
        #size-cells = <0x02>;

        pcie@10,0 {
            reg = <0x00 0x00 0x00 0x00 0x00>;
        };
    };
};
```

that the pcie@10,0 have a private ofw node, it will find
property name `msi-map` or `msi-parent` fail.
We should only find the property in host bridge's ofw node.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:14:51 +08:00
GUI 1a24ae06f3
[DM/FEATURE] Support reset controller (#9630)
* [DM/FEATURE] Support reset controller

Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
  1. The consumer driver interface, which allows
    peripheral drivers to request control over
    their reset input signals
  2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.

* [RESET/SIMPLE] Support simple reset

Currently this driver supports:
 - Altera SoCFPGAs
 - ASPEED BMC SoCs
 - Bitmain BM1880 SoC
 - Realtek SoCs
 - RCC reset controller in STM32 MCUs
 - Allwinner SoCs
 - SiFive FU740 SoCs
 - Sophgo SoCs

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 10:02:50 +08:00
GUI f849afb5ca
[DM/FEATURE] Support hardware mailbox (#9599)
* [DM/FEATURE] Support hardware mailbox
* [MAILBOX/PIC] Add PIC Mailbox drivers.

The mailbox device(s) may be instantiated in one of three equivalent way:

Device Tree node, eg.:

```dts
interrupt-controller@0 {
	interrupt-controller;
	#interrupt-cells = <1>;
};

pic_mailbox@10000 {
	compatible = "rt-thread,pic-mailbox";
	reg = <0x10000 0x100>;
	position = <0>;
	interrupts = <34>;
	peer-interrupts = <35>;
	uid = <0>;
	#mbox-cells = <1>;
};
```
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 11:00:04 +08:00
GUI c2545cdd7b
[DM/FEATURE] Support PHY (external) (#9597)
This framework will be of use only to devices that use
external PHY (PHY functionality is not embedded within the controller).

Use in PCIE, USB, HDMI, DP...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 10:23:01 +08:00
PermissionDenied7335 92f26b7ad2 [drivers] fixed a minor typo in the comments of dev_serial_v2.c 2024-11-24 12:48:19 -05:00
GUI 945114fd59
[DM/FEATURE] Support NVME (#9591)
* [DM/FEATURE] Support NVME

1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-24 13:57:37 +08:00
Meco Man 8e10983c9b [klibc] add rt_vsnprintf_std.c and rename RT_KLIBC_USING_VSNPRINTF_LONGLONG 2024-11-24 11:29:28 +08:00
GUI 42a41c696d
[DM/FEATURE] Support SCSI bus (#9592)
* [DM/FEATURE] Support block for SCSI
1. Support SD and CD-ROM.
2. SD will port to UFS and ATA device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 16:59:37 +08:00
GUI c055261177
[DM/FEATURE] Support DMA management (#9682)
1. DMA pool management for platform.
2. DMA engine driver API.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 14:11:40 +08:00
GUI f797eccbf1
[DM/FEATURE] Support IIO (Industrial I/O) (#9598)
[DM/FEATURE] Support IIO (Industrial I/O)

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 20:44:25 +08:00
GuEe-GUI 4a3fa385cb [DM/FEATURE] Support import SoC Pinctrl config
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 12:44:55 +08:00
GuEe-GUI b0a5bfe66b [DM/FIXUP] Fixup pinctrl depend auto
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 12:44:55 +08:00
GuEe-GUI 0d2c84d89f [DM/FEATURE] make SoC Kconfig import easy
Open Kconfig will not fail if using osource,
This way can make SoC Kconfig to DM easy.

Link: ecb89b1370

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 23:52:34 +08:00
GuEe-GUI 86ba3b666f [DM/FIXUP] Fixup MSI first IRQ read offset
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:34:10 +08:00
GuEe-GUI 34cf382c8b [DM/FIXUP] Fixup PCI MSI global irq map
Don't use `irq` as a var when clear MSI global
irq map, the irq which alloc before will rewrite.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:34:10 +08:00
GuEe-GUI 33785ca68a [DEVICE/SDIO] port to the block
1. remove gpt.
2. remove block device custom.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI c424cb8186 [DM/FEATURE] Support simple block layer
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI 10cac76d3b [DM/FEATURE] Support MFD syscon
MFD (Multifunction device) with System Controller Register Read/Write.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 15:53:23 +08:00
GuEe-GUI f5aca55a26 [DM/FEATURE] Support import SoC CLK config
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 11:08:28 +08:00
GuEe-GUI b6dff44054 [DM/FIXUP] Fixup CLK
1. Default return OK when input NULL (if is not necessary in device).
2. Support object parse in OFW.
3. Support CLK depends fix auto.
4. Fixup rt_clk_array_prepare_enable and rt_clk_array_disable_unprepare.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 11:08:28 +08:00
zhuzhuzhu bdf4da8ee1
[components][driver]add phy and mdio bus
old phy bus is too simple add phy_bus is not adapt rt_bus framework,so writer a stronger phy bus framework.

here is my commit message:
add mdio bus and phy bus to kernel,the phy bus use rt_bus framewok ,driver writer can write phy_driver first .when mac driver need to use phy they can register phy_device and pjhy_devie will serach for driver which match by uid and mask,if no driver match with the device that you register,phy_bus will return the genphy to you device,the genphy driver is the general driver for phy,so you can use it but it can not support the capcity of chip it may be cause performance is not up to peak
2024-11-19 21:34:03 -05:00
GuEe-GUI 6185250c86 [DM/FEATURE] Support clock subprobe in OFW
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00
GuEe-GUI cefe6d6380 [DM/FEATURE] Support driver depends fix auto
We need a API to fix the driver load auto when
a second driver get it in probe process that
we can not be careful of the driver-to-driver's
depends in different SoC.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00
GuEe-GUI b6f67285e9 [DM/FIXUP] remove OFW switch macros
The drivers will support OFW and name probe both.
We should make build OK when OFW is disable.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00
GuEe-GUI 3b22dbd049 [DM/FEATURE] DM Device IDA management
Drivers can manage their own IDs without having to concern
themselves with the register/unregister in system

Link: https://github.com/RT-Thread/rt-thread/issues/9534

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 14:23:25 +08:00
zhuzhuzhu 45aba1bcd7 add head 2024-11-18 13:53:25 +08:00
zhujiale 48fca91817 add ofw api to of net,driver writer can use this api get phy modes or get mac address 2024-11-18 13:53:25 +08:00
wdfk-prog 4c18fa7e21 fix:[CAN][STM32]open时立刻启动can_start,还未完成其他配置,可能导致异常 2024-11-13 22:56:17 -05:00
Shell a573ea06b7 🚚 renaming: move `smp` to `smp_call` 2024-11-03 10:08:45 +08:00
Shell 2f6d98bfcb feat: smp_call: added signaling call_req
This patch introduces `rt_smp_call_request` API to handle queued
requests across cores with user provided data buffer, which provides a
way to request IPI through a non-blocking pattern.

It also resolved several issues in the old implementation:
- Multiple requests from different cores can not be queued in the work
  object of the target core.
- Data racing on `rt_smp_work` of same core. If multiple requests came
  in turns, or if the call is used by the target cpu, while a new
  request is coming, the value will be overwrite.
- Memory vulnerability. The rt_smp_event is allocated on stack, though
  the caller may not wait until the call is done.
- API naming problem. Actually we don't provide a way to issue an IPI to
  ANY core in mask. What the API do is aligned to MANY pattern.
- FUNC_IPI registering to PIC.

Changes:
- Declared and configured the new `RT_SMP_CALL_IPI` to support
  functional IPIs for task requests across cores.
- Replaced the single `rt_smp_work` array with `call_req_cores` to
  manage per-core call requests safely.
- Added `_call_req_take` and `_call_req_release` functions for atomic
  handling of request lifetimes, preventing data race conditions.
- Replaced single event handling with a queue-based approach
  (`call_queue`) for efficient multi-request processing per core.
- Introduced `rt_smp_call_ipi_handler` to process queued requests,
  reducing IPI contention by only sending new requests when needed.
- Implemented `_smp_call_remote_request` to handle remote requests
  with specific flags, enabling more flexible core-to-core task
  signaling.
- Refined `rt_smp_call_req_init` to initialize and track requests
  with atomic usage flags, mitigating potential memory vulnerabilities.

Signed-off-by: Shell <smokewood@qq.com>
2024-11-03 10:08:45 +08:00
Kai 5e34298f99 add missing extern "C" in header to support cpp 2024-10-24 20:22:48 +08:00
sakumisu 4c206caf8b
update(cherryusb): update to v1.4.1 2024-10-19 12:23:21 -04:00
zms123456 344ea87347
[components][smp]remove redundant memset & unlock in smp 2024-10-11 00:09:28 -04:00
Yuqiang Wang 9b31631df1
[drivers][spi] Fixed an issue that caused spi bus deadlock in the spi configuration 2024-10-09 21:32:17 -04:00
CYFS 2b281ff0cb
[doxygen][rsoc]add pwm touch can i2c spi driver example for doxygen 2024-10-08 17:57:52 -04:00
Meco Man 36f8f266e9 feat:[drivers][spi] rt_spi_configure 添加互斥保护 2024-10-06 00:02:53 -04:00
wdfk-prog 99503d3ff6 feat:[drivers][spi] rt_spi_bus_configure 添加 -RT_EBUSY 返回值,并增加说明注释 2024-10-06 00:02:53 -04:00
CYFS3 9bcb904a0b [doxygen]add pin driver example for doxygen 2024-10-05 23:33:58 -04:00
zhuzhuzhu ef426851ea
[feat] add pci api,the pci/pcie driver
add pci api,the pci/pcie driver writer can use this to get resource of current device with flag,there are three flag :
1. PCI_BUS_REGION_F_MEM it mean memory space
2. PCI_BUS_REGION_F_IO it mean io space
3. PCI_BUS_REGION_F_PREFETCH it mean prefetchable memory
2024-10-05 02:30:52 -04:00
wdfk-prog f28b84aa1f [components][i2c] 修改为debug等级打印 2024-10-04 18:02:36 -04:00
milo bad2745dd3 fix rtc alarm thread parameters issue 2024-09-29 20:49:35 -04:00
hydevcode 66d54ea8c0
[bsp][nxp][rsoc] Fix compilation issues with bsp of nxp/lxp series 2024-09-29 20:47:39 -04:00