Commit Graph

16262 Commits

Author SHA1 Message Date
Bernard Xiong 02ef02211c
Merge pull request #9236 from polarvid/shell/arm64-header
quality: include the essential only to avoid recursion
2024-07-25 14:40:47 +08:00
Bernard Xiong 660f3aa205
Merge pull request #9247 from Z8MAN8/cvitek_arm_board_init
bsp: cviteK: update board init for aarch64
2024-07-25 09:11:05 +08:00
sheltonyu d1c7712bfb
[bsp/at32] 1.add support hwi2c driver, 2.update all firmware libraries. (#9241)
* 1.add support hwi2c driver, 2.update all firmware libraries

* update some files and fixed errors

* add support a423 at hwi2c driver

* add .ignore_format.yml
2024-07-24 23:22:50 +08:00
Chen Wang c8914c7f2b bsp: cvitek: fixed stacksize issue
In the original Sconstruct script, `GetDepend('__STACKSIZE__')`
is placed before the call to `PrepareBuilding()`, which causes
the value of `GetDepend('__STACKSIZE__')` to always be False,
and the value of `__STACKSIZE__` in `link_stacksize.lds` will
not be updated.

Solution: move the call if `PrepareBuilding()` ahead.

Also sync and update the .config and rtconfig.h, plus the
link_stacksize.lds.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-24 23:18:25 +08:00
kurisaw ab11bd04bf Synchronizing sensor_v1 changes 2024-07-24 23:17:38 +08:00
kurisaw 57bca1a072 [sensor_v2] Repair an error occurs when sensor v2 probes a sensor device for the first time 2024-07-24 23:17:38 +08:00
Z8MAN8 84eea6c654 bsp: cviteK: update board init for aarch64
When compiling CV18xx_arch64, have a error:
can not find "rt_fdt_commit_memregion_early"

Analysis: b785ef9 ("[libcpu][aarch64]memory setup using memblock ")
no longer support  "rt_fdt_commit_memregion_early", become use
"rt_memblock_reserve_memory"

Solution: Refer to the bsp/qemu-virt64-aarch64/drivers/board.c
delete "rt_fdt_commit_memregion_early"

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-24 19:44:52 +08:00
Bernard Xiong 8dc166b16c
Merge pull request #9242 from heyuanjie87/hyj724
[bsp/cvitek]添加ioremap兼容定义以适应smart运行
2024-07-24 13:36:11 +08:00
Bernard Xiong e955e411b7
Merge pull request #9212 from polarvid/shell/opt-gctx
[libcpu] trimming ARM64 general context
2024-07-24 13:32:11 +08:00
heyuanjie87 5b82841748 [feat]添加ioremap兼容定义以适应smart运行 2024-07-24 12:28:50 +08:00
Shell 08b8dfb225
quality: include the essential only to avoid recursion
The rtdef.h is a big header with multiple dependency inside,
which makes it easier to introduce recursion dependency.

Signed-off-by: Shell <smokewood@qq.com>
2024-07-24 03:33:48 +00:00
Jiading Xu 79457efc49 components: net: lwip: port: add netdev callback on link status change setting
- set netdev callback on link status change in netdev_add()

Signed-off-by: Jiading Xu <Jiading.Xu@hpmicro.com>
2024-07-24 09:52:23 +08:00
Chen Wang 04cad7f9c6 bsp: cvitek: improve documentation
Currently, the documents under bsp/cvitek are a bit
messy. There are currently four readme files:

- bsp/cvitek/README.md (Chinese)
- bsp/cvitek/c906_little/README.md (Chinese/English)
- bsp/cvitek/cv18xx_aarch64/README.md (Chinese)
- bsp/cvitek/cv18xx_risc-v/README.md (Chinese/English)

Regarding the working mode of the big + small cores, it
is meaningless to describe the small core alone, or the
large core alone. This can also be seen in the existing
files. The readme of the small core will also introduce
the programming of the large core, and vice versa.

Considering that the official default mode is
C906B + C906L. ARM large core can be treataed as a
special case. So the document structure is modified as
follows:
- Remove `bsp/cvitek/c906_little/README.md` and
  `bsp/cvitek/cv18xx_risc-v/README.md`, merge them all
  into `bsp/cvitek/README.md`
- Add a link to `bsp/cvitek/cv18xx_aarch64/README.md`
  in `bsp/cvitek/README.md`

FIXME: The modified document does not provide English
version. Is it really necessary?

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-22 22:54:56 +08:00
Shell e726b93016 [utest] feat: print progress on testing
This is required so the user will not be confused on waiting for test to complete.

Changes:

- notify user that the test is not corrupted
- expand waiting tick on timed mtx test, for compatibility on different hw.

Signed-off-by: Shell <smokewood@qq.com>
2024-07-22 11:55:11 +08:00
Rbb666 79d14461bd [ci] add bsp/stm32+renesas examples files' review owner 2024-07-21 20:22:55 +08:00
Z8MAN8 78f3ebfb33 [bsp][cvitek] 修复 cv18xx_aarch64 gpio 驱动相关宏配置 2024-07-21 17:37:56 +08:00
Z8MAN8 2a3bb2bf95 [bsp][cvitek]: 将adc wdt驱动的局部函数移至源文件 2024-07-21 17:37:09 +08:00
Supper Thomas 30b605aa55 [action][runner] add the keil ci check for runner
Signed-off-by: Supper Thomas <78900636@qq.com>
2024-07-20 15:30:35 +08:00
Rbb666 6b3ef17830 删除stm32/drv_pm.c不必要的头文件 2024-07-19 11:51:39 +08:00
Rbb666 1a596607ed 删除bsp:stm32l476的pm组件依赖 2024-07-19 11:51:39 +08:00
wdfk-prog 568356cc48 [stm32][pm]lptimer is supported 2024-07-19 11:51:39 +08:00
wdfk-prog fccd98747e [stm32][lptim]lptimer is register with hwtimer, only supports pm calls,the timer function is not supported 2024-07-19 11:51:39 +08:00
wdfk-prog a837f2b8e9 [compoents][hwtimer]Add a user control interface 2024-07-19 11:51:39 +08:00
wdfk-prog bceb6635b0 [compoents][pm]The device is registered and uninstalled by linked list 2024-07-19 11:51:39 +08:00
wdfk-prog 8d3ad68caf [src][tick]rt_tick setting arbitrary value function is added to support low-power wake-up tick compensation 2024-07-19 11:51:39 +08:00
Chen Wang 7c1d205a4e bsp: cvitek: switch to device init function for some drivers
Some drivers use INIT_BOARD_EXPORT, it is not necessary,
it is enough to use INIT_DEVICE_EXPORT for genearl drivers.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-18 21:35:35 +08:00
Bernard Xiong 937f0dbf5a
Merge pull request #9208 from zmshahaha/errno
[components][lwp]fix exec and mount error code
2024-07-18 20:32:06 +08:00
Shell 7138f340b2 [libcpu/arm64] feat: Trimming General Context
This patch focuses on the ARM64 general context handling code.
The modifications are aimed at enhancing performance by simplifying
context save/restore operations.

Changes include:
- Adjusted stack alignment in `arch_set_thread_context` function.
- Updated `lwp_gcc.S` to reset frame pointer and link register.
- Refined `rt_hw_backtrace_frame_unwind` to handle user space address checks.
- Added `GET_THREAD_SELF` macro in `asm-generic.h`.
- Simplified context saving/restoring in `context_gcc.h` and related files.
- Optimized `rt_hw_context_switch_interrupt` and related assembly routines.

Signed-off-by: Shell <smokewood@qq.com>
2024-07-18 17:41:48 +08:00
MuChenger 0efc408a00 adapt to rv64ilp32 toolchain 2024-07-18 15:59:40 +08:00
zhao maosheng a6b2014214 fix exec and mount error code 2024-07-18 13:25:37 +08:00
zhao maosheng 393a61b048 Fix potential return value discrepancy when writing to urandom 2024-07-18 10:05:05 +08:00
Bernard Xiong 861e32490f
Merge pull request #9202 from polarvid/shell/arm64-setup-pvoff
[libcpu] quality: call PV_OFFSET on entry for once
2024-07-17 22:27:14 +08:00
Bernard Xiong a974cde8f9
Merge pull request #9201 from unicornx/dev-wdt-bugfix
bsp: cvitek:  accuulated bugfixes for wdt driver
2024-07-17 22:26:05 +08:00
Bernard Xiong a2f4e120c3
Merge pull request #9200 from unicornx/dev-spi-new
bsp: cvitek: re-wrote spi driver
2024-07-17 22:25:26 +08:00
Bernard Xiong 4e630fed08
Merge pull request #9199 from unicornx/dev-i2c-new
bsp: cvitek: re-wrote i2c driver
2024-07-17 22:24:24 +08:00
Chen Wang 1bcf232d12 bsp: cvitek: fix the wdt timeout unit problem
See `components/drivers/include/drivers/watchdog.h`

maco definition of
RT_DEVICE_CTRL_WDT_GET_TIMEOUT
RT_DEVICE_CTRL_WDT_SET_TIMEOUT
RT_DEVICE_CTRL_WDT_GET_TIMELEFT

The wdt timeout time unit is defined as seconds in the API, but
the code incorrectly uses ms.

Correct this and comply with the API definition.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
2024-07-17 16:56:07 +08:00
Shell 2d1eba8bf3 [libcpu] quality: call PV_OFFSET on entry for once
This patch improves the efficiency and readability of the AArch64 common setup
code by calculating the `PV_OFFSET` once at the start and reusing the value.
This change reduces redundant calculations.

Signed-off-by: Shell <smokewood@qq.com>
2024-07-17 05:23:52 +00:00
flyingcys 1ef2afbc93 bsp: cvitek: re-wrote spi driver
Rewrote the spi driver.

Reuse the driver code from https://github.com/sophgo/cvi_alios_open,
which is Apache 2.0 licenced.

Signed-off-by: flyingcys <flyingcys@163.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 11:52:27 +08:00
Bernard Xiong 019b8cd24b
Merge pull request #9164 from polarvid/shell/rv64-tick
[libcpu/rv64] feat: unify tick.c
2024-07-17 09:58:06 +08:00
Shell f6f570df74
Merge branch 'master' into shell/rv64-tick 2024-07-17 09:39:54 +08:00
zhuzhuzhu 4ad194bb47
[fix] fix cromfs read out of mem range (#9197)
Update dfs_cromfs.c
2024-07-17 09:08:10 +08:00
Chen Wang 2d5eb2669f bsp: cvitek: remove warning when building wdt driver
```
./bsp/cvitek/drivers/drv_wdt.c: In function '_wdt_control':
warning: assignment to 'void *' from 'unsigned int' makes pointer
from integer without a cast [-Wint-conversion]
  119 |         wdt_device->parent.user_data = (rt_uint32_t)(*(rt_uint32_t *)arg);
      |                                      ^
warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  122 |         *(rt_uint32_t *)arg = (rt_uint32_t)wdt_device->parent.user_data;
      |                               ^
```

Rootcasue: It's not portable to store integar in a pointer.

Solution: use global _wdt_dev to store the timeout value.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 09:05:26 +08:00
flyingcys dda79ad6bc bsp: cvitek: re-wrote i2c driver
Optimize the original i2c driver code.

Signed-off-by: flyingcys <flyingcys@163.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 08:19:03 +08:00
Shell 1d78d11567
[smart] feat: add unmap for null mapper (#9186)
Do unmap before shrink so we don't see mapped entry on page table
insertion, which is not acceptable for riscv implementation of
architecture porting.

Changes:
- add un-mapping of pte on `_null_shrink()`

Signed-off-by: Shell <smokewood@qq.com>
2024-07-16 20:38:55 +08:00
Chen Wang d8294de640 bsp:cvitek: add pinmux for adc
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 2c85bcb463 bsp:cvitek: add pinmux for spi
Board level pin available info:

duo & duo256:

NAME    SPI         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP6     SPI2_SCK    PWR_GPIO[23]    SD1_CLK__SPI2_SCK
GP7     SPI2_SDO    PWR_GPIO[22]    SD1_CMD__SPI2_SDO
GP8     SPI2_SDI    PWR_GPIO[21]    SD1_D0__SPI2_SDI
GP9     SPI2_CS_X   PWR_GPIO[18]    SD1_D3__SPI2_CS_X

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 51825a5b5c bsp:cvitek: add pinmux for pwm
Board level pin available info is summarized and list here for memo:

Duo:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP2     PWM10       PWR_GPIO[26]    SD1_GPIO1__PWM_10
GP3     PWM11       PWR_GPIO[25]    SD1_GPIO0__PWM_11

Duo256:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP3     PWM6        XGPIOA[18]      JTAG_CPU_TCK__PWM_6
GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP2     PWM7        XGPIOA[19]      JTAG_CPU_TMS__PWM_7
GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP10    PWM10       XGPIOC[14]      PAD_MIPI_TXM1__PWM_10
GP11    PWM11       XGPIOC[15]      PAD_MIPI_TXP1__PWM_11

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 114e143d56 bsp:cvitek: add pinmux for uart
Board level UART pinmux summary, following capability
should be controlled by pinname whitelist.

Duo:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

GP3     UART4_RX    PWR_GPIO[25]    SD1_GPIO0__UART4_RX
GP2     UART4_TX    PWR_GPIO[26]    SD1_GPIO1__UART4_TX

Duo 256m:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP3     UART1_RX    XGPIOA[18]      JTAG_CPU_TCK__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP2     UART1_TX    XGPIOA[19]      JTAG_CPU_TMS__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

Note: this patch also update the .config and rtconfig.h
because this patch modify some configuration items's name,
for example: RT_USIMG_UART0 -> BSP_USING_UART0.

FIXME: only handle RISC-V related, no ARM.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang e1eb3d3217 bsp:cvitek: add pinmux for i2c
Based on new pinmux framework, add configuration for uart.

Board level pin available info is summarized and should be
controlled by pin whitelist.

Duo

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo256m

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S(Note, we have not supported duo S, just list for memo)

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
zms123456 23fc7bfa4d
[libcpu][setup]fix fdt_ptr error (#9138)
fix fdt_ptr error
2024-07-16 17:04:55 +08:00