Commit Graph

765 Commits

Author SHA1 Message Date
wangxiaoyao 12f0df9279 [libcpu/aarch64] stop when no page is free 2023-02-25 20:05:59 +08:00
Shell 382e9bcac7
[rt-smart] handling kernel from accessing unmapped user stack (#6957)
[rt-smart] handling kernel from accessing unmapped user stack
2023-02-24 14:52:16 +08:00
wangxiaoyao 1c2daeafdc [fix] typo 2023-02-21 08:48:49 +08:00
wangxiaoyao 26891e9117 [fix] pipeline 2023-02-21 08:48:49 +08:00
wangxiaoyao 484a0d602e [fixup] add cache maintenance ops;
fix bugs on cache maintenance when starting user app
2023-02-21 08:48:49 +08:00
Shell 2d09749086
[rt-smart] PV_OFFSET as a variable (#6904)
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces
2023-02-14 23:08:32 +08:00
Meco Man f58d3c5200 rt_device_write/read return data type as rt_ssize_t
rt_ssize_t can give negative error code, which follows the unix style correctly
2023-02-07 21:43:57 -05:00
wdfk-prog 7296117203 [cortex-m7]rt_hw_cpu_dcache_ops函数uint32_t替换为rt_uint32_t 2023-02-07 12:05:27 -05:00
Bernard Xiong 98e0c58527
Add ADT Kconfig and fix MMU kconfig issue in Cortex-A (#6901)
* Add ADT Kconfig and fix MMU kconfig issue in Cortex-A

* [BSP] enable ADT
2023-02-06 01:11:04 +08:00
chenhy0106 9db73a47c4
为c906添加asid支持 (#6870)
* [rt-smart] asid for c906
2023-01-28 13:08:40 -05:00
Shell f0dadcb3c3
[rt-smart] porting c906 and D1s to mm (#6848)
* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error
2023-01-16 08:24:03 +08:00
Meco Man 9bc68d26a4 format Kconfig and sconscript 2023-01-08 22:52:13 -05:00
Shell 7450ef6c4d
[rt-smart] kernel virtual memory management layer (#6809)
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
2023-01-08 21:08:55 -05:00
flyingcys 98a997c57e
[bsp]add new bsp-bl808 (#6824)
* add new bsp-bl808

* support ARCH_RISCV_FPU_S && update rtconfig.py
2023-01-07 02:03:21 -05:00
Yaochenger b99769f686
[libcpu][riscv]移除ch32中的冗余文件,使用common下的文件 (#6813)
* [libcpu][riscv]移除ch32中的冗余文件,使用common下的文件

* 修正cpuport.h宏定义

* 规范宏定义格式
2023-01-04 21:06:09 -05:00
Yaochenger f2a66e122f [libcpu][riscv]移除cv32e40p中部分文件,采用common中的文件 2023-01-02 16:42:18 -05:00
Yaochenger 882a0af94e [libcpu][riscv] 添加宏用于区别是否开启FPU,更新ch32v208v-r0 ->ch32v208w-r0,更新注释 2022-12-28 18:47:39 -05:00
Yaochenger b77241935c
[bsp][ch32v208]添加ch32v208BSP,合并libcpu/riscv 中ch系列的port文件 (#6780)
【1】添加ch32v208-r0 bsp
【2】合并libcpu/riscv 下ch系列mcu的port文件
2022-12-27 13:24:02 -05:00
bernard 1f092da9e0 fix compiling warning. 2022-12-26 14:24:26 +08:00
bernard 401ad16449 [bsp][smart] fix virt64 aarch64 link script for smart. 2022-12-26 14:24:26 +08:00
linshire c930b4f623
[ch32]对接了rt_hw_context_switch_interrupt接口 (#6749)
* 对接了rt_hw_context_switch_interruptC(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread)接口

* Update libcpu/risc-v/ch32v1/cpuport.c

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
2022-12-22 09:34:36 +08:00
Shell e8504c7cf1
[smart/aarch64] code sync (#6750)
* [smart/aarch64] sync aarch64
2022-12-20 17:49:37 +08:00
guo 68ca9f07a6
[rt-smart] 弱化 RT_USING_LWP,使用 RT_USING_SMART 作为宏配置 (#6740)
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.
2022-12-16 18:38:28 +08:00
guozhanxin e2bdd8a184 [libcpu] fix cpp11 error 2022-12-14 11:04:00 +08:00
Man, Jianting (Meco) 99bdf978d7
[rtdef] use lower-case to define attributes (#6728)
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
2022-12-11 13:12:03 -05:00
linshire 8f9198eb99
对接了rthw.h的接口,修复了不能编译的问题 (#6722) 2022-12-10 23:04:26 +08:00
Shell e991be9c51
[smart][risc-v/libcpu] port rv64 cpu code (#6704)
* [risc-v/libcpu] porting Smart & RTOS
* [fix] rv64 plic
* [risc-v/rv64] remove macro in rtdef
2022-12-10 22:16:42 +08:00
Yaochenger 9d8da76543
[bsp] add core-v-mcu bsp (#6705)
* add core-v-mcu bsp

* 规范bsp格式 添加readme

* 修改readme

Co-authored-by: 1516081466@qq.com <ws051000>
2022-12-08 15:01:37 -05:00
guo ecf2d82159
sync branch rt-smart. (#6641)
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
xiaoguang_ma 16f6157b1e [bsp] faster startup for cortex-a
If the application defines dozens of global variables,
the speed of clearing the bss segment will be slower.

Because icache can be enabled before the mmu enabled.
Therefore, in order to speed up the process of clearing the BSS segment,
enable icache needs to be put ahead.
2022-11-25 18:04:35 +09:00
Yunjie Gu 8fa9fde43a
[bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts. 2022-10-19 23:41:13 -04:00
Wayne Lin ece0c6eef8 Move gtimer driver to libcpu. 2022-10-11 08:46:01 +08:00
Wayne 5d014e8d31 Revert "[libcpu] remove gtimer/pmu from cortex-a" 2022-10-11 08:46:01 +08:00
YangZhongQing 50cb4be8ce
bsp beaglebone: add IAR support (#6443)
* bsp beaglebone: add IAR template files and fix it's build error

ATTENTION:
project.* was generated by scons, so I add it to gitignore.
rtconfig.py *FLAGS located in "PLATFORM == 'iccarm'" are unverified and maybe wrong.
(我只是从STM32里面抄来,然后根据自己的理解改了一下,并没有验证这些参数的正确性,
我也不知道怎么用命令行调用这些参数来编译)

* bsp beaglebone: add beaglebone_ram.icf ROM address from uboot_cmd.txt

am335x_DDR.icf use 0x82000000, different to uboot_cmd.txt & gcc beaglebone_ram.lds,
the difference will easy cause later developer got below error:

=> go 0x80200000
## Starting application at 0x80200000 ...
undefined instruction
pc : [<8200956c>]	   lr : [<8ff62497>]
reloc pc : [<728a956c>]	   lr : [<80802497>]
sp : 8df37358  ip : 00000000	 fp : 00000002
r10: 8df4d448  r9 : 8df3feb8	 r8 : 8ffd30f8
r7 : 8ff78089  r6 : 00000002	 r5 : 80200000  r4 : 8df4d44c
r3 : 80200000  r2 : 8df4d44c	 r1 : 8df4d44c  r0 : 00000001
Flags: nzCv  IRQs off  FIQs on  Mode SVC_32
Code: 5dbffcdd bb9bdf7f abf85423 eff1f77f (7ed7daaf)
Resetting CPU ...

resetting ...

* libcpu am335x: context_iar.S rt_hw_context_switch: add thumb mode support

IAR new project defualt Processor mode is Thumb, this will cause user
easy occur the following error:
...
msh />Execption:
r00:0x8800aaa8 r01:0x802080c5 r02:0x00000000 r03:0x88009b4c
r04:0x00001000 r05:0x00000000 r06:0x00001403 r07:0x00100000
r08:0x00000000 r09:0x00000000 r10:0x0000000a
fp :0x0000000a ip :0x65687374
sp :0x00006c6c lr :0x0000008a pc :0x88008be0
cpsr:0x880001bc
software interrupt
shutdown...
(0) assertion failed at function:rt_hw_cpu_shutdown, line number:160

* bsp beaglebone: change IAR template.ewp code use Arm mode

Arm mode bin size will bigger than Thumb mode

* libcpu am335x: IAR: use rt_hw_cpu_dcache_enable instead of rt_cpu_dcache_enable

Reviewer mysterywolf say:
麻烦把rt_cpu_icache_enable 和 rt_cpu_dcache_enable, 统一改成 rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable
rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable 是其他bsp也是这么命名的 这是个命名统一的函数
2022-09-22 14:13:34 +08:00
Man, Jianting (Meco) 1249bc45f9
完善bsp beaglebone的基本使用 (#6434)
* bsp beaglebone: rerun menuconfg

* bsp beaglebone: add uart0 support

* bsp beaglebone: use uart0 as console

* bsp beaglebone: add heap init

fix rt_application_init() error:
(m != RT_NULL) assertion failed at function:rt_smem_alloc, line number:288

* bsp beaglebone: add mmu & interrupt init

must init mmu, otherwise no interrupt is generated, cause scheduler can't work.
I don't know why need mmu, just seen: bsp/rockchip/rk3568/driver/board.c

* libcpu am335x: reset interrupt controller before init vector

I think reset before init is more better

AM335X_StarterWare_02_00_01_01\system_config\armv7a\am335x\interrupt.c
IntAINTCInit()

* bsp beaglebone: full gpio driver support

* bsp beaglebone: add tftpboot way to uboot_cmd.txt

* bsp beaglebone: optimize am33xx_gpio_hdr, check irqstatus is the last one

Co-authored-by: YangZhongQing <vipox@qq.com>
2022-09-15 23:56:31 -04:00
Fan Yang c1b22ede30
Add BSP for HPM6750EVK and HPM6750EVKMINI (#6374)
* Add CANFD support and correct typos

- Added CANFD required fields to can.h
- Fixed typos in can.h and can.c
- Corrected all the projects affected by the typo
- Fixed wrong line-ending in some affected can driver files

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>

* update

* bsp: support boards from hpmicro

- Supported HPM6750EVKMINI
- Supported HPM6750EVK

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
Co-authored-by: Meco Man <920369182@qq.com>
2022-09-06 00:48:16 -04:00
Zhang WenBin e2368bf7f3 fix: 修复arm926异常时打印栈名乱码 2022-09-05 11:07:06 +08:00
YuQi b11cb41ae7
tms320f28379d fix init (#6343)
解决 tms320f28379d bsp 启动的问题。主要改动如下。

修正context.s中汇编代码错误。在旧版的代码中,操作数为32位而汇编命令却使用了针对16位数据的命令MOV,导致程序在某些情况无法正常启动线程。
由于C28x的平台下,SP只支持16bit寻址,所以用于线程空间存放的heap以及ebss段都需要放在低16位的空间,针对这个问题修改了CMD文件。此外还增加基于CMD文件基于RAM的支持,方便调试。
新增rtdef.h中RT_SECTION,RT_USED,ALIGN和RT_WEAK的定义。旧版bsp中这些定义为空,导致INIT_EXPORT注册的函数失效。
修改程序启动代码,在程序入口直接调用原生启动代码
以上改动在LAUNCHXL-F28379D 通过了测试。
2022-08-29 15:35:23 -04:00
liyangyang d887d6eb19 fix scons 2022-08-22 23:39:39 -04:00
liyangyang 9b750eba84 libcpu 支持 ch32v3系列单片机 2022-08-22 23:39:39 -04:00
Yunjie Gu b43f0e7205
[bsp][tms320f28379d] Fix compile ti (#6254)
* compile_ok

Issues fixed:
(1) update .config: select FINSH_USING_SYMTAB
(2) add rt_size_t in rtconfig_project.h
(3) fix finsh problems of using sym table
(4) update .project to include ipc source codes.
Todo list:
(1) automate the build source selection of ccs and reconcile it with scons

* change compiler

* msh can run now

the key step is to swap the order of rt_interrupt_nest -- and RT_OBJECT_HOOK_CALL(rt_interrupt_leave_hook,()) in irq.c. This is an improvised solution and an issue has been raised.

* Update 2837x_FLASH_lnk_cpu1.cmd

The original one is also fine. Just to make it more rigorous since FSymTab is in data section.

* update readme.md

Complier selection and maintainer update.

Co-authored-by: YuQi <qiyu_sjtu@163.com>
2022-08-20 13:16:41 -04:00
Martin e4d6dd88c9 [libcpu][arm] fix rt_hw_cpu_dcache_ops clean invalid bug
clean_invalid must be set at the same time, and call
clean_invalid, or call clean/invalid
2022-08-13 22:12:17 -04:00
tfx2001 21ee452661 [libcpu][arm] fix armclang error when enable LTO 2022-08-11 08:35:42 -04:00
dongly 3363586cbb
Fix some compilation warning (#5744)
* Fix some compilation warning

* 补充修正一些数据类型的使用错误

Co-authored-by: Meco Man <920369182@qq.com>
2022-08-02 12:09:49 -04:00
emuzit c802fcdcf8
WCH CH569W-R0-1v0 evt board bsp port, first version (#6167)
WCH CH569W-R0-1v0 evt board bsp port, first version

dev/test under Ubuntu 20.04
toolchain from MounRiver_Studio_Community_Linux_x64_V120

tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling)

libcpu/risc-v/SConscript :
group includes rtconfig.CPU only if folder exists

libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() :
make it RT_WEAK for customization
2022-07-30 02:10:51 -04:00
Aligagago 250b3cbc16 使用 AStyle.exe 统一代码格式 2022-07-27 11:45:29 +08:00
rewine 825b9ffbc3
[libcpu/risc-v/virt64]: fix parameter for call handle_trap (#6042) 2022-07-10 17:48:57 +08:00
Tangyuxin a47468f574
支持只运行在安全模式下 (#6115)
* [cpu][cm33] Support running in secure mode

* [bsp][lpc55sxx] Using the cortex cm33
2022-06-29 14:08:57 +08:00
Man, Jianting (Meco) 2c10d5ad01
[rtc] use gmtime_r to replace gmtime (#6012)
* [rtc] use gmtime_r to replace gmtime
2022-06-22 13:41:06 +08:00
JonasWen b010e434ed
[libcpu][arm] ArmClang 编译优化错误 (#6071) 2022-06-15 17:19:51 +08:00