rt-thread-official

Commit Graph

Author	SHA1	Message	Date
GuEe-GUI	3d503e931b	[DRIVER/PIC] Add ARM GICv2/v3 V2M, ITS support. Fix some code style and init for V2M, ITS. V2M is the PCI MSI/MSI-X for GICv2. ITS is the PCI MSI/MSI-X for GICv3/v4. Signed-off-by: GuEe-GUI <2991707448@qq.com>	2024-09-19 21:14:42 +08:00
zms123456	195f94ef1d	[components][drivers]add pic-gic (#8388 )	2024-02-29 09:39:56 +08:00
wusongjie	8aa4366cb2	Drivers: Support Open Firmware API and model of PIC We support OFW API to replace fdt old API, and add IRQ, IO, Platform-Bus, CPUs ... OFW node contorl. To support work with Device Tree or ACPI in drivers that use IRQ, we make a programmable interrupt controller driver's model. Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>	2023-07-05 16:45:16 +08:00

Author

SHA1

Message

Date

GuEe-GUI

3d503e931b

[DRIVER/PIC] Add ARM GICv2/v3 V2M, ITS support.

Fix some code style and init for V2M, ITS.

V2M is the PCI MSI/MSI-X for GICv2.
ITS is the PCI MSI/MSI-X for GICv3/v4.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

2024-09-19 21:14:42 +08:00

zms123456

195f94ef1d

[components][drivers]add pic-gic (#8388 )

2024-02-29 09:39:56 +08:00

wusongjie

8aa4366cb2

Drivers: Support Open Firmware API and model of PIC

We support OFW API to replace fdt old API, and add
IRQ, IO, Platform-Bus, CPUs ... OFW node contorl.
To support work with Device Tree or ACPI in drivers
that use IRQ, we make a programmable interrupt
controller driver's model.

Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>

2023-07-05 16:45:16 +08:00

3 Commits