Commit Graph

922 Commits

Author SHA1 Message Date
wusongjie 3b7e46de7e AArch64: support hardware atomic
Support aarch64 rt_hw_atomic_* api.
Add atomic implemente by rt_atomic api:
    rt_atomic_dec_and_test
    rt_atomic_fetch_add_unless
    rt_atomic_add_unless
    rt_atomic_inc_not_zero

Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
2023-07-05 13:38:29 +08:00
wangqinglin e0b2b8fecd
修复aarch64 smp启动失败问题 (#7760) 2023-07-01 22:46:43 +08:00
flyingcys c78f646891
[bsp]add cv1800b (#7753) 2023-06-30 00:05:55 +08:00
Shicheng Chu e2c031643c
[include][dbg]update: no longer use RT_DEBUG_LOG in rtdebug.h (#7750) 2023-06-29 11:24:25 -04:00
程蒙蒙 33f5de4411
[atomic][IAR]修复IAR编译报警 函数“__LDREX”隐式声明 (#7733) 2023-06-29 00:04:06 +08:00
wangqinglin d6f6ae56fd
修复gicv2默认邦核失败 (#7723) 2023-06-26 21:30:27 +08:00
wangqinglin 8335c5add2 更新gicv3中断亲和性设置,重构api: arm_gic_send_affinity_sgi, 增加AMP宏判断, rt_ioremap和宏RT_USING_SMART解耦
修改:中断安装默认绑定至当前核心, 修改rt_hw_interrupt_set_target_cpus函数,
2023-06-19 11:35:46 +08:00
wangqinglin 76d8416e72
修复aarch64-qemu启动失败问题 (#7661) 2023-06-12 19:49:18 +08:00
wangqinglin 0cb2a5e735 删除mmu.c对board.h的引用 2023-06-11 07:09:24 +08:00
wangqinglin 216d72ef1c 修改:启动过程和__start解耦,对于RT_AMP_SLAVE 跳过cpu 非0核等待 2023-06-11 07:09:24 +08:00
wangqinglin 09ea44a370 添加无设备树模式PSCI 2023-06-11 07:07:52 +08:00
wangqinglin 194a2efdf4
AMP-step3: 添加conifg ARCH_ARM_CORTEX_A55, rt_hw_cpu_id_set 适配A55架构, 添加aarch64 rt_… (#7628) 2023-06-11 07:06:16 +08:00
Liu,Yuan 1d8165851b
[risc-v][libcpu] 删去无用局部变量 (#7634) 2023-06-07 17:04:12 -04:00
zhkag 22972409d4 [simulator] 修复 linux simulator 编译运行失败 2023-06-07 08:52:28 -04:00
Wayne ed4b4ca9e6
[libcpu] [cortex-a] Revert RT_SMP_AUTO_BOOT. (#7549)
Co-authored-by: Wayne Lin <wclin@nuvoton.com>
2023-05-29 15:23:42 +08:00
Bernard Xiong 4b4c3c85f2
[atomic] add stdc atomic detection. (#7536) 2023-05-20 23:41:29 +08:00
huanghe 9217865c6a
[libcpu] fix arm/cortex-a/start_gcc.S (#7515) 2023-05-19 11:32:58 +08:00
guozhanxin 82ccbc40db support llvm-arm 16.0 2023-05-17 12:09:10 -04:00
Shell b7554a70d2
[libcpu][component][debug] add debug info for gdb (#7033) 2023-05-14 23:48:16 +08:00
huanghe 50a4e8c662
[bsp][phytium]适配rt-thread5.0.0 版本 (#7441)
Co-authored-by: 朱耿宇 <zhugengyu@phytium.com.cn>
2023-05-11 10:25:21 +08:00
nobody 8d526a72b4
[libcpu] 删除多余的RT_ASSERT判断条件
RT_TICK_PER_SECOND 会在Kconfig里有范围约束
2023-04-29 12:42:35 -04:00
WuxiaBai 4eeca5049e
[HUST CSE][libcpu][s3c44b0]Same expression on both sides of '|' 2023-04-28 17:58:59 -04:00
4b2a44f39e
修复 atomic_arm.c 多次指定类型限定符问题 (#7393) 2023-04-27 07:09:38 +08:00
Shell 6e7c5d9bc9
[libcpu/aarch64] fix cache invalidate operation (#7363) 2023-04-26 17:17:42 +08:00
wangqinglin fbc1d6f4fd
[fix]:修复GICv2、GICv3中断触发模式设置无效的问题 (#7358) 2023-04-24 17:06:31 +08:00
wangqinglin ac07f40670
优化设置中断模式api (#7359) 2023-04-24 14:16:21 +08:00
flyingcys cbedb6b40b
[libcpu/risc-v/c906] add ioremap && default param (#7345) 2023-04-24 09:21:15 +08:00
Shell 470454d201
[components/mm] support for scalable memory management (#7277)
* [mm/page] multi-list page manager
[mm/page] page debugger
[libcpu/aarch64] hugepage support

* [quality] remove void-arith

* [format] remove kasan codes
2023-04-22 23:59:11 +08:00
zb1tree a25d3fd301 fix:fixed variable misuse 2023-04-17 23:45:10 -04:00
7YZ7 9e680e9f86
[bsp][ls1c] fix a misoperation
attach #7291
2023-04-17 22:59:31 -04:00
7YZ7 501b22aabe
[HUST CSE] Fix many abnormal symbols in annotations and format code 2023-04-17 22:26:23 -04:00
d1zzy126 5c1b071a0c
[HUST][CSE]mips/common/exception.c/rt_set_except_vector (#7238)
* mips/common/exception.c/rt_set_except_vector

* Update exception.c

---------

Co-authored-by: Bernard Xiong <bernard.xiong@gmail.com>
2023-04-14 14:06:43 +08:00
codlearner 590e603997 逻辑错误 2023-04-13 10:00:23 +08:00
Shicheng Chu 93f3cb30e4
[kernel] 将rt_thread结构体改为显式继承rt_object (#7131) 2023-04-04 09:06:27 -04:00
Shell 897ba365ba
[fix] compilation error from rpi (#7143)
* [fix] compile error from rpi
2023-03-31 20:58:01 +08:00
xqyjlj 157dc0959c feat(components): add uname support 2023-03-31 10:56:37 +08:00
Wayne 3309ef6001
[libcpu/arm/cortex-a] Revert safety MMU initialization. (#6796)
* Revert safety MMU initialization.

Co-authored-by: Wayne Lin <wclin@nuvoton.com>
2023-03-31 10:06:28 +08:00
Yaochenger 38eb3fc40f
[utest][atomic]添加返回值测试 (#7124)
* [utest][atomic]添加返回值测试
2023-03-30 11:06:21 +08:00
Shell eec78d9f5d
[rt-smart] testcase & improvements for memory management (#7099)
* [utest/mm] add testcase for create/init
format codes of create/init in components/mm

* [libcpu/aarch64] fix user stack check routine

* [kservice] export API for utest

* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map

* [lwp/user_mm] add user_map_varea for mmap feature

* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix

* [utest/mm] testcase for synchronization

* [mm] modify unmap api to improve throughput

* [utest/mm] testcases for cache and varea map

* [format] remove extra space

* [utest/mm] fix testcase problem in header

* [lwp] extend map_user_varea with a flag

* [utest/mm] testcase for lwp_map_user_varea

* [libcpu/arm/cortex-a] fix kernel space layout

* [utest/mm] adjust for armv7 arch
2023-03-30 08:25:15 +08:00
flyingcys 0cf3bcf495
[bsp]fix esp32_c3 compile error (#7107)
* fix rt_hw_interrupt_install return value

* add __rt_rvstack
2023-03-29 19:01:26 +08:00
Yaochenger de4f237482
[atomic]添加arm与risc-v下的常用原子操作函数 (#7053)
* Update Kconfig
* Update trap_gcc.S
* Update bsp/hifive1/drivers/SConscript

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
* Update SConscript
* [atomic]提交一份arm与risc-v架构下的常用原子操作函数
* 修改变量类型
* 更新rtatomic.h与atomic_port.c
* 更新rt-thread\libcpu\arm\common\atomic_port.c
* 更新include/rtatomic.h与libcpu/arm/common/SConscript
* 更新include/rtatomic.h
* 修正格式与Kconfig
* 修正格式与文件结构

* 规范文件格式与文件重命名
* 添加测试用例与CI
* 添加函数声明
* 修改virt64/SConscript 添加atomic_riscv.c
  * 1.规范代码风格
  * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误
* 添加C11标准库原子操作测试

---------

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
2023-03-23 20:06:50 +08:00
Zxy 4ed9bc11f7
[errno code]fix that use RT_ENOSYS without - (#7084)
* [errno code]fix that use RT_ENOSYS without -

* Update bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c

---------

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
2023-03-23 01:54:42 -04:00
flyingcys a538b26858
[bsp] add bl808 lp core (#7069)
* Add riscv_32e support

* add bl808 lp core

* update README.md
2023-03-19 23:16:12 +08:00
flyingcys c11f5bb251
add bl60x/bl70x/bl61x/bl808 (#7063)
Co-authored-by: flyingcys <flyingcys!163.com>
2023-03-19 14:41:18 +08:00
Shell 18a14cc935
[rt-smart] move sys_cacheflush to lwp_syscall.c (#7048)
* [syscall] move sys_cacheflush to lwp_syscall.c

* [syscall] improve assertion

* [format] rename to rt_ctassert

* [debug] modified ct assertion on mm_page.c
2023-03-17 15:11:38 +08:00
Shell 2394e75265
[libcpu/risc-v] support noncached normal memory (#7051)
* [libcpu/risc-v] support noncached normal memory

* [mm] check before dereference in _fetch_page

* [mm] add comments on ioremap

* [ioremap] report more info on failed
2023-03-16 10:26:55 +08:00
zilong 50e1f6327d
[libcpu/riscv/virt64] fix (#5979) (#7040) 2023-03-11 12:34:14 +08:00
chenhy0106 f6847af0cd
[libcpu/riscv/c906] fix "next_asid" type error (#7031)
MAX_ASID最大为0x10000,在next_asid==MAX_ASID时进入下一个generation。因此next_asid不能只有16位,否则将不能进入下一个generation。修改rt_uint16_t为rt_uint32_t。
2023-03-09 07:25:54 -05:00
Yaochenger cfc6bf9b12 [libcpu/risc-v]更新移植readme 2023-03-07 22:04:26 -05:00
Yaochenger 922e6e40d3
[libcpu/risc-v]迁移libcpu/risc-v/e310与rv32m1文件中内容至bsp (#7015) 2023-03-05 19:43:58 -05:00
Shell 0de21341f9
[fix] mm bugs (#7010)
* [fix] implementation fault on avl

* [fix] mm may free varea allocated statically

* [test] add test and benchmark for avl
2023-03-03 11:51:21 +08:00
Yaochenger 95540854a6
[libcpu/riscv]迁移libcpu/riscv/ch32中文件至bsp (#7004) 2023-03-02 09:17:43 -05:00
Yaochenger fc2e122ee2 [libcpu/risc-v]迁移libcpu/risc-v/hpmicro中的文件至bsp 2023-03-02 09:16:59 -05:00
Yaochenger 6aa2445522 [libcpu/risc-v]移除bumblebee文件夹与nuclei文件夹中的内容至bsp 2023-03-02 09:16:12 -05:00
Yaochenger 892ef3dc5b
[libcpu/risc-v]将cv32e40p文件夹中文件移至BSP (#7002) 2023-03-01 21:34:35 -05:00
Yaochenger b9e4fcfc68
[libcpu][riscv]整合libcpu/riscv中的移植文件 提供一份公共代码于common (#6941)
整合libcpu/riscv中的移植文件 提供一份公共代码于common

在提交本pr时,除hpmicro的内核,rv32内核bsp已完成去除大部分的冗余,大部分代码采用common中的实现。本pr的作用是进一步统一common中的文件,从而提供一份公用代码,新移植的RV32内核的BSP可以全部使用common代码。

- 在common中提供一份公用文件:interrupt_gcc.S
- 修改原有的文件,将原有的中断中上下文切换代码替换为interrupt_gcc.S
- 基于上述修改,修改仓库中risc-v内核的BSP与移植相关的部分 (主要包含中断入口函数 中断栈等)
- 在common中提供一份公用文件:trap_common.c;提供统一中断入口函数,中断入口函数初始化,中断入口注册等函数,并完善异常时的信息输出

- 在common中提供一份公用文件:rt_hw_stack_frame.h;将栈帧结构体剥离,供用户使用

- 在上述工作完成后,在上述工作的基础上测试仓库中risc-v内核的BSP

- 完善函数中的命名,完善中断栈的获取

- 提供一份详细的基于现有common文件的移植指南

  #### 在什么测试环境下测试通过 

- 1.CH32V307V-R1-R0
- 2.CH32V208W-R0-1V4
- 3.HPM6750EVKMINI
- 4.GD32VF103V-EVAL
- 5.qemu(CORE-V-MCU )

> 与上述开发板使用同样芯片的BSP均测试通过

在CH32V307V-R1-R0与HPM6750EVKMINI上基于现有移植文件进行多线程复杂场景下的长时间测试,测试过程系统运行正常。
2023-03-01 01:32:43 -05:00
Bernard Xiong f295d3df78
[libcpu.aarch64] add rt_backtrace function. (#6982)
* [libcpu.aarch64] add rt_backtrace function.
2023-02-27 10:04:10 +08:00
wangxiaoyao 12f0df9279 [libcpu/aarch64] stop when no page is free 2023-02-25 20:05:59 +08:00
Shell 382e9bcac7
[rt-smart] handling kernel from accessing unmapped user stack (#6957)
[rt-smart] handling kernel from accessing unmapped user stack
2023-02-24 14:52:16 +08:00
wangxiaoyao 1c2daeafdc [fix] typo 2023-02-21 08:48:49 +08:00
wangxiaoyao 26891e9117 [fix] pipeline 2023-02-21 08:48:49 +08:00
wangxiaoyao 484a0d602e [fixup] add cache maintenance ops;
fix bugs on cache maintenance when starting user app
2023-02-21 08:48:49 +08:00
Shell 2d09749086
[rt-smart] PV_OFFSET as a variable (#6904)
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces
2023-02-14 23:08:32 +08:00
Meco Man f58d3c5200 rt_device_write/read return data type as rt_ssize_t
rt_ssize_t can give negative error code, which follows the unix style correctly
2023-02-07 21:43:57 -05:00
wdfk-prog 7296117203 [cortex-m7]rt_hw_cpu_dcache_ops函数uint32_t替换为rt_uint32_t 2023-02-07 12:05:27 -05:00
Bernard Xiong 98e0c58527
Add ADT Kconfig and fix MMU kconfig issue in Cortex-A (#6901)
* Add ADT Kconfig and fix MMU kconfig issue in Cortex-A

* [BSP] enable ADT
2023-02-06 01:11:04 +08:00
chenhy0106 9db73a47c4
为c906添加asid支持 (#6870)
* [rt-smart] asid for c906
2023-01-28 13:08:40 -05:00
Shell f0dadcb3c3
[rt-smart] porting c906 and D1s to mm (#6848)
* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error
2023-01-16 08:24:03 +08:00
Meco Man 9bc68d26a4 format Kconfig and sconscript 2023-01-08 22:52:13 -05:00
Shell 7450ef6c4d
[rt-smart] kernel virtual memory management layer (#6809)
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
2023-01-08 21:08:55 -05:00
flyingcys 98a997c57e
[bsp]add new bsp-bl808 (#6824)
* add new bsp-bl808

* support ARCH_RISCV_FPU_S && update rtconfig.py
2023-01-07 02:03:21 -05:00
Yaochenger b99769f686
[libcpu][riscv]移除ch32中的冗余文件,使用common下的文件 (#6813)
* [libcpu][riscv]移除ch32中的冗余文件,使用common下的文件

* 修正cpuport.h宏定义

* 规范宏定义格式
2023-01-04 21:06:09 -05:00
Yaochenger f2a66e122f [libcpu][riscv]移除cv32e40p中部分文件,采用common中的文件 2023-01-02 16:42:18 -05:00
Yaochenger 882a0af94e [libcpu][riscv] 添加宏用于区别是否开启FPU,更新ch32v208v-r0 ->ch32v208w-r0,更新注释 2022-12-28 18:47:39 -05:00
Yaochenger b77241935c
[bsp][ch32v208]添加ch32v208BSP,合并libcpu/riscv 中ch系列的port文件 (#6780)
【1】添加ch32v208-r0 bsp
【2】合并libcpu/riscv 下ch系列mcu的port文件
2022-12-27 13:24:02 -05:00
bernard 1f092da9e0 fix compiling warning. 2022-12-26 14:24:26 +08:00
bernard 401ad16449 [bsp][smart] fix virt64 aarch64 link script for smart. 2022-12-26 14:24:26 +08:00
linshire c930b4f623
[ch32]对接了rt_hw_context_switch_interrupt接口 (#6749)
* 对接了rt_hw_context_switch_interruptC(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread)接口

* Update libcpu/risc-v/ch32v1/cpuport.c

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
2022-12-22 09:34:36 +08:00
Shell e8504c7cf1
[smart/aarch64] code sync (#6750)
* [smart/aarch64] sync aarch64
2022-12-20 17:49:37 +08:00
guo 68ca9f07a6
[rt-smart] 弱化 RT_USING_LWP,使用 RT_USING_SMART 作为宏配置 (#6740)
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.
2022-12-16 18:38:28 +08:00
guozhanxin e2bdd8a184 [libcpu] fix cpp11 error 2022-12-14 11:04:00 +08:00
Man, Jianting (Meco) 99bdf978d7
[rtdef] use lower-case to define attributes (#6728)
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
2022-12-11 13:12:03 -05:00
linshire 8f9198eb99
对接了rthw.h的接口,修复了不能编译的问题 (#6722) 2022-12-10 23:04:26 +08:00
Shell e991be9c51
[smart][risc-v/libcpu] port rv64 cpu code (#6704)
* [risc-v/libcpu] porting Smart & RTOS
* [fix] rv64 plic
* [risc-v/rv64] remove macro in rtdef
2022-12-10 22:16:42 +08:00
Yaochenger 9d8da76543
[bsp] add core-v-mcu bsp (#6705)
* add core-v-mcu bsp

* 规范bsp格式 添加readme

* 修改readme

Co-authored-by: 1516081466@qq.com <ws051000>
2022-12-08 15:01:37 -05:00
guo ecf2d82159
sync branch rt-smart. (#6641)
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
xiaoguang_ma 16f6157b1e [bsp] faster startup for cortex-a
If the application defines dozens of global variables,
the speed of clearing the bss segment will be slower.

Because icache can be enabled before the mmu enabled.
Therefore, in order to speed up the process of clearing the BSS segment,
enable icache needs to be put ahead.
2022-11-25 18:04:35 +09:00
Yunjie Gu 8fa9fde43a
[bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts. 2022-10-19 23:41:13 -04:00
Wayne Lin ece0c6eef8 Move gtimer driver to libcpu. 2022-10-11 08:46:01 +08:00
Wayne 5d014e8d31 Revert "[libcpu] remove gtimer/pmu from cortex-a" 2022-10-11 08:46:01 +08:00
YangZhongQing 50cb4be8ce
bsp beaglebone: add IAR support (#6443)
* bsp beaglebone: add IAR template files and fix it's build error

ATTENTION:
project.* was generated by scons, so I add it to gitignore.
rtconfig.py *FLAGS located in "PLATFORM == 'iccarm'" are unverified and maybe wrong.
(我只是从STM32里面抄来,然后根据自己的理解改了一下,并没有验证这些参数的正确性,
我也不知道怎么用命令行调用这些参数来编译)

* bsp beaglebone: add beaglebone_ram.icf ROM address from uboot_cmd.txt

am335x_DDR.icf use 0x82000000, different to uboot_cmd.txt & gcc beaglebone_ram.lds,
the difference will easy cause later developer got below error:

=> go 0x80200000
## Starting application at 0x80200000 ...
undefined instruction
pc : [<8200956c>]	   lr : [<8ff62497>]
reloc pc : [<728a956c>]	   lr : [<80802497>]
sp : 8df37358  ip : 00000000	 fp : 00000002
r10: 8df4d448  r9 : 8df3feb8	 r8 : 8ffd30f8
r7 : 8ff78089  r6 : 00000002	 r5 : 80200000  r4 : 8df4d44c
r3 : 80200000  r2 : 8df4d44c	 r1 : 8df4d44c  r0 : 00000001
Flags: nzCv  IRQs off  FIQs on  Mode SVC_32
Code: 5dbffcdd bb9bdf7f abf85423 eff1f77f (7ed7daaf)
Resetting CPU ...

resetting ...

* libcpu am335x: context_iar.S rt_hw_context_switch: add thumb mode support

IAR new project defualt Processor mode is Thumb, this will cause user
easy occur the following error:
...
msh />Execption:
r00:0x8800aaa8 r01:0x802080c5 r02:0x00000000 r03:0x88009b4c
r04:0x00001000 r05:0x00000000 r06:0x00001403 r07:0x00100000
r08:0x00000000 r09:0x00000000 r10:0x0000000a
fp :0x0000000a ip :0x65687374
sp :0x00006c6c lr :0x0000008a pc :0x88008be0
cpsr:0x880001bc
software interrupt
shutdown...
(0) assertion failed at function:rt_hw_cpu_shutdown, line number:160

* bsp beaglebone: change IAR template.ewp code use Arm mode

Arm mode bin size will bigger than Thumb mode

* libcpu am335x: IAR: use rt_hw_cpu_dcache_enable instead of rt_cpu_dcache_enable

Reviewer mysterywolf say:
麻烦把rt_cpu_icache_enable 和 rt_cpu_dcache_enable, 统一改成 rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable
rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable 是其他bsp也是这么命名的 这是个命名统一的函数
2022-09-22 14:13:34 +08:00
Man, Jianting (Meco) 1249bc45f9
完善bsp beaglebone的基本使用 (#6434)
* bsp beaglebone: rerun menuconfg

* bsp beaglebone: add uart0 support

* bsp beaglebone: use uart0 as console

* bsp beaglebone: add heap init

fix rt_application_init() error:
(m != RT_NULL) assertion failed at function:rt_smem_alloc, line number:288

* bsp beaglebone: add mmu & interrupt init

must init mmu, otherwise no interrupt is generated, cause scheduler can't work.
I don't know why need mmu, just seen: bsp/rockchip/rk3568/driver/board.c

* libcpu am335x: reset interrupt controller before init vector

I think reset before init is more better

AM335X_StarterWare_02_00_01_01\system_config\armv7a\am335x\interrupt.c
IntAINTCInit()

* bsp beaglebone: full gpio driver support

* bsp beaglebone: add tftpboot way to uboot_cmd.txt

* bsp beaglebone: optimize am33xx_gpio_hdr, check irqstatus is the last one

Co-authored-by: YangZhongQing <vipox@qq.com>
2022-09-15 23:56:31 -04:00
Fan Yang c1b22ede30
Add BSP for HPM6750EVK and HPM6750EVKMINI (#6374)
* Add CANFD support and correct typos

- Added CANFD required fields to can.h
- Fixed typos in can.h and can.c
- Corrected all the projects affected by the typo
- Fixed wrong line-ending in some affected can driver files

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>

* update

* bsp: support boards from hpmicro

- Supported HPM6750EVKMINI
- Supported HPM6750EVK

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
Co-authored-by: Meco Man <920369182@qq.com>
2022-09-06 00:48:16 -04:00
Zhang WenBin e2368bf7f3 fix: 修复arm926异常时打印栈名乱码 2022-09-05 11:07:06 +08:00
YuQi b11cb41ae7
tms320f28379d fix init (#6343)
解决 tms320f28379d bsp 启动的问题。主要改动如下。

修正context.s中汇编代码错误。在旧版的代码中,操作数为32位而汇编命令却使用了针对16位数据的命令MOV,导致程序在某些情况无法正常启动线程。
由于C28x的平台下,SP只支持16bit寻址,所以用于线程空间存放的heap以及ebss段都需要放在低16位的空间,针对这个问题修改了CMD文件。此外还增加基于CMD文件基于RAM的支持,方便调试。
新增rtdef.h中RT_SECTION,RT_USED,ALIGN和RT_WEAK的定义。旧版bsp中这些定义为空,导致INIT_EXPORT注册的函数失效。
修改程序启动代码,在程序入口直接调用原生启动代码
以上改动在LAUNCHXL-F28379D 通过了测试。
2022-08-29 15:35:23 -04:00
liyangyang d887d6eb19 fix scons 2022-08-22 23:39:39 -04:00
liyangyang 9b750eba84 libcpu 支持 ch32v3系列单片机 2022-08-22 23:39:39 -04:00
Yunjie Gu b43f0e7205
[bsp][tms320f28379d] Fix compile ti (#6254)
* compile_ok

Issues fixed:
(1) update .config: select FINSH_USING_SYMTAB
(2) add rt_size_t in rtconfig_project.h
(3) fix finsh problems of using sym table
(4) update .project to include ipc source codes.
Todo list:
(1) automate the build source selection of ccs and reconcile it with scons

* change compiler

* msh can run now

the key step is to swap the order of rt_interrupt_nest -- and RT_OBJECT_HOOK_CALL(rt_interrupt_leave_hook,()) in irq.c. This is an improvised solution and an issue has been raised.

* Update 2837x_FLASH_lnk_cpu1.cmd

The original one is also fine. Just to make it more rigorous since FSymTab is in data section.

* update readme.md

Complier selection and maintainer update.

Co-authored-by: YuQi <qiyu_sjtu@163.com>
2022-08-20 13:16:41 -04:00
Martin e4d6dd88c9 [libcpu][arm] fix rt_hw_cpu_dcache_ops clean invalid bug
clean_invalid must be set at the same time, and call
clean_invalid, or call clean/invalid
2022-08-13 22:12:17 -04:00
tfx2001 21ee452661 [libcpu][arm] fix armclang error when enable LTO 2022-08-11 08:35:42 -04:00
dongly 3363586cbb
Fix some compilation warning (#5744)
* Fix some compilation warning

* 补充修正一些数据类型的使用错误

Co-authored-by: Meco Man <920369182@qq.com>
2022-08-02 12:09:49 -04:00
emuzit c802fcdcf8
WCH CH569W-R0-1v0 evt board bsp port, first version (#6167)
WCH CH569W-R0-1v0 evt board bsp port, first version

dev/test under Ubuntu 20.04
toolchain from MounRiver_Studio_Community_Linux_x64_V120

tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling)

libcpu/risc-v/SConscript :
group includes rtconfig.CPU only if folder exists

libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() :
make it RT_WEAK for customization
2022-07-30 02:10:51 -04:00
Aligagago 250b3cbc16 使用 AStyle.exe 统一代码格式 2022-07-27 11:45:29 +08:00
rewine 825b9ffbc3
[libcpu/risc-v/virt64]: fix parameter for call handle_trap (#6042) 2022-07-10 17:48:57 +08:00
Tangyuxin a47468f574
支持只运行在安全模式下 (#6115)
* [cpu][cm33] Support running in secure mode

* [bsp][lpc55sxx] Using the cortex cm33
2022-06-29 14:08:57 +08:00
Man, Jianting (Meco) 2c10d5ad01
[rtc] use gmtime_r to replace gmtime (#6012)
* [rtc] use gmtime_r to replace gmtime
2022-06-22 13:41:06 +08:00
JonasWen b010e434ed
[libcpu][arm] ArmClang 编译优化错误 (#6071) 2022-06-15 17:19:51 +08:00
Meco Man 83b3aadaa3 [Scons][iar][iccarm] IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链
此外,将判断条件改为列表方式,这样更方便后续增加其他可能的IAR编译链
2022-06-09 07:01:59 +08:00
Meco Man 50f041f5c2 [Scons] 将GCC判断条件改为列表方式,方便后续增加新的编译工具链 2022-06-09 07:01:59 +08:00
FrankTan d2909eb16b [libcpu/arm]: fix typo 2022-05-13 15:38:17 +08:00
Tangyuxin c80993f713
[libcpu][arm] Add exception install function (#5827) 2022-04-24 01:03:54 +08:00
zhouji 60c96fbc12 [update] Removed C++ global constructor initialization, this method is not used in GCC4.7 and later versions. 2022-04-20 17:32:02 +08:00
thewon86 f5b0bfd3f4 uniform code writing-disable interrupt 2022-04-20 14:22:43 +08:00
tyx a6135ebcf3 [libcpu][arm] Fix compilation warning 2022-04-20 10:37:35 +08:00
Man, Jianting (Meco) a0f8d43744
[gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM (#5802)
* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
2022-04-20 09:56:04 +08:00
tyx d6c74af535 [libcpu][arm] Fix compilation warning 2022-04-19 11:26:11 +08:00
blta b1a9c4c4ea
[libcpu/arm]: add dsb and isb instructions in the end of rt_hw_context_switch_to (#5748) 2022-04-08 12:52:22 +08:00
blta 99526cc047 [bsp/ch32v103r-evt] add ch32v103r-evt bsp
feat: move MRS demo source to bsp and libraries folder

feat: update Sconscript

feat: modify SConstruct in the bsp

feat: use the rtconfig.py of gd32vf103v-eval bsp to modify

feat: use the MRS's rtconfig.h temoporarily

feat: update Kconfig files

feat: use the MRS's .ld and rename as link.lds

feat: add ch32v1 porting folder

perf: remove board/system_ch32v10x.c

fix: define SOC_ARM_SERIES_CH32V103 in rtconfig.h

fix: add some neccessary macros in rtconfig.h

perf: use the menuconfig to generate rtconfig.h

feat: add readme.md

fix: correct the bad encode in main.c

fix: include board.h in main.c

perf: check and update README.md

perf: remove ch32f10x_port_cn.md

feat: ignore the standard libraries's CI checking

feat: add sdk_dist.py

fix: correct some style errors again

perf: simply the board/kconfig

fix: format ch32v103r-evt

fix: format drvs and libcpu
2022-04-06 11:06:55 +08:00
Man, Jianting (Meco) 6bd22f3e6f
替换RTThread旧版文件头注释版权声明 (#5774) 2022-04-05 19:34:30 +08:00
changzehai 3f7cc54449
1、解决未在rtconfig.h中定义“RT_USING_CPU_FFS”宏时,使用arm-gcc编译会出现__rt_ffs() 函数重定义,导致编译不通过的问题; (#5755)
2、解决bsp/rm48x50工程使用arm-gcc编译下载后,程序运行出现prefetch abort异常的问题。
2022-04-05 10:26:12 +08:00
Tangyuxin a5dc6c490a
[libcpu] Add CM33 (#5761) 2022-04-01 22:45:11 +08:00
blta ce602a6e4a
[libcpu/risc-v] 修复risc-v scons编译中间文件不能输出到build/kernel/libcpu目录问题 (#5736) 2022-03-29 22:18:05 +08:00
GUI f587a55bc2
[libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722)
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align

* [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568
2022-03-29 11:08:25 +08:00
ACM32_MCU 9779963c6d
[libcpu/arm/cortex-m33]fix syscall_iar.S compiler error (#5719)
* 1. 新增了i2c/spi/rtc/crypto等驱动;2. 删除了部分文件中的未使用到的头文件包含; 3. 修改keil编译时pm文件atoi的头文件stdlib未包含的警告

* 修改文件格式

* BSP

1. 修改f4系列bsp的readme文件与工程文件
2. 修改f0系列源文件的版权信息、删除目前没有的库文件。
3. 其他

* 修改IAR环境下arm cortex-m33内核的syscall_iar.S文件编译错误

* 还原.gitignore文件

Co-authored-by: aisino2200 <90822414+aisino2200@users.noreply.github.com>
2022-03-28 10:38:46 +08:00
rtthread-bot ad5eb2e086 Merge remote-tracking branch 'rtt_gitee/gitee_master' 2022-03-12 16:14:47 +00:00
张世争 7746d288d7
优化bsp/simulator自动初始化 (#5634) 2022-03-08 12:03:41 +08:00
GUI 0a8dd10b0b
[libcpu/aarch64] add gtimer frq set and stack align (#5642)
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align
2022-03-07 22:41:56 +08:00
clickcheck ed9037e376
update libcpu/mips/gs232/gs232.h:
更正了看门狗的寄存器地址
2022-02-22 09:48:12 +00:00
GUI 9b6e75f90b
[libcpu/aarch64] disable irq/fiq when switch thread (#5605)
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread
2022-02-21 23:24:51 +08:00
GUI 85dc9bd4a6
[libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2 (#5601)
* [libcpu/aarch64] add smp support
* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2
2022-02-17 01:00:29 +08:00
Man, Jianting (Meco) 71ba65e7c0 add new bsp tms320c6678
原始提交PR:https://gitee.com/rtthread/rt-thread/pulls/372
提交者:https://gitee.com/wei-handong

----------------------

在TI公司C6000 DSP处理器上成功移植rt-thread操作系统;主要在libcpu/ti-dsp/c6x添加keystone架构底层代码,在bsp/ti-c6678添加bsp工程,该工程已在本人的开发板上成功运行

* 添加TMS320C6678处理器,keystone架构底层代码

* 添加支持中断栈部分代码,修改格式

* 修改汇编rt_hw_context_switch_to处关于时间槽的使用;修改格式

* 修改使用C语言构建任务栈帧,清除fls和ffs对<c6x.h>文件的依赖

* 修改bsp tms320c6678工程,并测试

* 删除依赖TI的KeyStone_common.c文件

* 添加编译说明

* update bsp/ti-tms320c6678/README.md.

* format code

Co-authored-by: Huang bo <hb265419@126.com>
Co-authored-by: hdwei <1147479335@qq.com>
Co-authored-by: bernard <bernard.xiong@gmail.com>
Co-authored-by: rtthread-bot <48120998+rtthread-bot@users.noreply.github.com>
Co-authored-by: Meco Man <920369182@qq.com>
2022-01-29 16:11:42 +08:00
Man, Jianting (Meco) 5a0fea6987
[Kconfig][libcpu] 增加ARCH_CPU_BIG_ENDIAN (#5547)
* [cpu] 增加ARCH_CPU_BIG_ENDIAN
- 之前RT_USING_BIG_ENDIAN的命名并不合理,予以替换为ARCH_CPU_BIG_ENDIAN
- 删除一处多余的ARCH_CPU_64BIT
- 整理了libcpu/Kconfig的格式

* [libcpu][Kconfig] Cortex-M4&7 select ARCH_ARM_CORTEX_FPU

* revert last commit
2022-01-25 15:00:47 +08:00
Meco Man 563e49890c [asm] 解决tab和空格混用的问题 2022-01-20 20:57:35 +08:00
Bernard Xiong 5decbb5170
Merge pull request #5345 from jiladahe1997/master
[bugfix] libcpu/arm/cortex-m/context_gcc: 修复thumb指令集汇编语法错误
2022-01-14 22:36:14 +08:00
GuEe-GUI 353f717037 [libcpu/aarch64] add smp support 2022-01-08 18:24:02 +08:00
Meco Man 5187d75af5 [armclang] 使用__clang__代替__CLANG_ARM 2021-12-29 14:15:38 -05:00
Meco Man c8dcf7cc68 [libc]rename group name 2021-12-30 01:27:25 +08:00
Man, Jianting (Meco) ed1f8b3f64 Revert "add clang-arm support."
This reverts commit a5f6fdc780.
2021-12-22 18:57:16 -05:00
guozhanxin a5f6fdc780 add clang-arm support. 2021-12-22 13:03:05 +08:00
jiladahe1997 433e5f8147 [bugfix] libcpu/arm/cortex-m/context_gcc: 修复thumb指令集汇编语法错误
当使用thumb指令集时,要求汇编语法中的“条件执行”要跟在IT指令后面,否则会编译不通过。
报错如下:Error: thumb conditional instruction should be in IT block -- `moveq r4,#0x01'

虽然可以通过指定"-Wa,-mimplicit-it=thumb"选项来告诉编译器识别隐式的IT指令,但是能在代码里面直接加上IT指令的话更好。

thumb指令集“条件执行”arm官网文档:
    https://developer.arm.com/documentation/dui0473/m/condition-codes/conditional-execution-in-thumb-state

参考论坛帖子:
    https://club.rt-thread.org/ask/question/433887.html
    https://club.rt-thread.org/ask/question/4188.html

Signed-off-by: Mingrui Ren <jiladahe1997@gmail.com>
2021-12-09 11:22:46 +08:00
Bernard Xiong 7c012afdf8
Merge pull request #5314 from GuEe-GUI/master
fixup .bss size define in link.lds and set spsel=1 in aarch64
2021-12-01 09:18:50 +08:00
GuEe-GUI efbdbc2636 fixup .bss size define in link.lds and set spsel=1 in aarch64 2021-11-30 11:14:17 +08:00
jihongbin 7d07c61a47 [fix][libcpu][riscv][t-head] fix rt_hw_interrupt_disable/rt_hw_interrupt_enable bug
使用不同的优化等级会出现不同的效果
当使用-O0 等级时,无法正确得到关闭中断之前的状态

Using different optimization levels will have different effects
When the - o0 level is used, the state before the shutdown interrupt cannot be obtained correctly
2021-11-04 10:36:11 +08:00
BernardXiong be2dec978d [BSP] fix the compiling issue for qemu-riscv64 2021-10-19 15:00:46 +08:00
BernardXiong 6b66207048 [libcpu] fix s-mode issue 2021-10-19 14:35:22 +08:00
Huaqi Fang 45f9e9c4cb [libcpu][nuclei] Fix context switch in nuclei
previous rt_hw_context_switch might cause the
task switch handling error.

See
1a1a209e93 (diff-ba922e02206af6c52163f0c34a7e76e427b7ea22f791329b62f2069241c57778)

Signed-off-by: Huaqi Fang <578567190@qq.com>
2021-10-15 15:20:00 +08:00
mazhiyuan 99e9ea61bc 修复部分bsp编译报错 2021-10-13 11:02:01 +08:00
Bernard Xiong 63c741996b
Merge pull request #5031 from liukangcc/armclang
[update] support armclang
2021-09-28 13:51:23 +08:00
Bernard Xiong 8bf5c27406
Merge pull request #5090 from GuEe-GUI/master
Merge AArch64 libcpu and add some drivers for their bsps
2021-09-26 17:18:43 +08:00
GuEe-GUI 740cd9dfb0 Merge AArch64 libcpu and add some drivers for their bsps 2021-09-26 15:01:59 +08:00