[stm32][lptim]lptimer is register with hwtimer, only supports pm calls,the timer function is not supported
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@ -52,8 +52,10 @@ if GetDepend(['RT_USING_DAC']):
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if GetDepend(['RT_USING_CAN']):
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src += ['drv_can.c']
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if GetDepend(['RT_USING_PM', 'SOC_SERIES_STM32L4']):
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if GetDepend(['RT_USING_PM']):
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src += ['drv_pm.c']
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if GetDepend(['BSP_USING_LPTIM']):
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src += ['drv_lptim.c']
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if GetDepend('BSP_USING_SDRAM'):
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@ -0,0 +1,67 @@
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/*
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* Copyright (c) 2006-2024 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-07-11 wdfk-prog first version
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*/
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#ifndef __LPTIM_CONFIG_H__
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#define __LPTIM_CONFIG_H__
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#include <rtthread.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef LPTIM_DEV_INFO_CONFIG
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#define LPTIM_DEV_INFO_CONFIG \
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{ \
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.maxfreq = 1000000, \
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.minfreq = 3000, \
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.maxcnt = 0xFFFF, \
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.cntmode = HWTIMER_CNTMODE_UP, \
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}
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#endif /* TIM_DEV_INFO_CONFIG */
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#ifdef BSP_USING_LPTIM1
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#ifndef LPTIM1_CONFIG
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#define LPTIM1_CONFIG \
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{ \
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.tim_handle.Instance = LPTIM1, \
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.tim_irqn = LPTIM1_IRQn, \
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.name = "lptim1", \
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}
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#endif /* LPTIM1_CONFIG */
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#endif /* BSP_USING_LPTIM1 */
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#ifdef BSP_USING_LPTIM2
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#ifndef LPTIM2_CONFIG
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#define LPTIM2_CONFIG \
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{ \
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.tim_handle.Instance = LPTIM2, \
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.tim_irqn = LPTIM2_IRQn, \
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.name = "lptim2", \
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}
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#endif /* LPTIM1_CONFIG */
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#endif /* BSP_USING_LPTIM1 */
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#ifdef BSP_USING_LPTIM3
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#ifndef LPTIM3_CONFIG
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#define LPTIM3_CONFIG \
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{ \
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.tim_handle.Instance = LPTIM3, \
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.tim_irqn = LPTIM3_IRQn, \
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.name = "lptim3", \
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}
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#endif /* LPTIM3_CONFIG */
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#endif /* BSP_USING_LPTIM3 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __LPTIM_CONFIG_H__ */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -122,6 +122,7 @@ extern "C" {
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#include "h7/adc_config.h"
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#include "h7/dac_config.h"
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#include "h7/tim_config.h"
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#include "h7/lptim_config.h"
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#include "h7/sdio_config.h"
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#include "h7/pwm_config.h"
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#include "h7/usbd_config.h"
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@ -1,123 +1,320 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-05-06 Zero-Free first version
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* 2024-07-04 wdfk-prog lptimer is register with hwtimer, only supports pm calls,the timer function is not supported
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*/
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#include <board.h>
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#include <drv_lptim.h>
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#include <rtdevice.h>
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#include "drv_config.h"
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static LPTIM_HandleTypeDef LptimHandle;
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/*#define DRV_DEBUG*/
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#define LOG_TAG "drv.lptim"
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#include <drv_log.h>
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#ifdef BSP_USING_LPTIM
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#define LPTIM_REG_MAX_VALUE (0xFFFF)
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enum
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{
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#ifdef BSP_USING_LPTIM1
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LPTIM1_INDEX,
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#endif
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#ifdef BSP_USING_LPTIM2
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LPTIM2_INDEX,
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#endif
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#ifdef BSP_USING_LPTIM3
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LPTIM3_INDEX,
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#endif
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};
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struct stm32_hw_lptimer
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{
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rt_hwtimer_t time_device;
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LPTIM_HandleTypeDef tim_handle;
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IRQn_Type tim_irqn;
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char *name;
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};
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static struct stm32_hw_lptimer stm32_hw_lptimer_obj[] =
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{
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#ifdef BSP_USING_LPTIM1
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LPTIM1_CONFIG,
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#endif
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#ifdef BSP_USING_LPTIM2
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LPTIM2_CONFIG,
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#endif
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#ifdef BSP_USING_LPTIM3
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LPTIM3_CONFIG,
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#endif
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};
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static const struct rt_hwtimer_info _info = LPTIM_DEV_INFO_CONFIG;
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static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
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{
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if(timer == RT_NULL)
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{
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LOG_E("init timer is NULL");
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return;
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}
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if (state)
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{
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struct stm32_hw_lptimer *tim_device = rt_container_of(timer, struct stm32_hw_lptimer, time_device);
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LPTIM_HandleTypeDef *tim = (LPTIM_HandleTypeDef *)timer->parent.user_data;
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if(tim_device == RT_NULL)
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{
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LOG_E("start tim_device is NULL");
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return;
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}
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if(tim == RT_NULL)
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{
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LOG_E("start %s LPTIM_Handle is NULL", tim_device->name);
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return;
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}
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = {0};
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/* Enable LSI clock */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Select the LSI clock as LPTIM peripheral clock */
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
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RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
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HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct);
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tim->Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
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tim->Init.Clock.Prescaler = LPTIM_PRESCALER_DIV32;
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tim->Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
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tim->Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
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tim->Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
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tim->Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
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HAL_StatusTypeDef ret = HAL_LPTIM_Init(tim);
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if (ret != HAL_OK)
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{
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LOG_E("%s init failed %d", tim_device->name, ret);
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}
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else
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{
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NVIC_ClearPendingIRQ(LPTIM1_IRQn);
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NVIC_SetPriority(LPTIM1_IRQn, 0);
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NVIC_EnableIRQ(LPTIM1_IRQn);
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LOG_D("%s init success", tim_device->name);
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}
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}
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}
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static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
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{
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if(timer == RT_NULL)
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{
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LOG_E("start timer is NULL");
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return -RT_EINVAL;
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}
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struct stm32_hw_lptimer *tim_device = rt_container_of(timer, struct stm32_hw_lptimer, time_device);
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LPTIM_HandleTypeDef *tim = (LPTIM_HandleTypeDef *)timer->parent.user_data;
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if(tim_device == RT_NULL)
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{
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LOG_E("start tim_device is NULL");
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return -RT_EINVAL;
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}
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if(tim == RT_NULL)
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{
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LOG_E("start %s LPTIM_Handle is NULL", tim_device->name);
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return -RT_EINVAL;
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}
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HAL_StatusTypeDef ret = HAL_LPTIM_TimeOut_Start_IT(tim, LPTIM_REG_MAX_VALUE, t);
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if(ret != HAL_OK)
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{
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LOG_E("start %s failed %d", tim_device->name, ret);
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return -RT_ERROR;
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}
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else
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{
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LOG_D("start %s success", tim_device->name);
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return RT_EOK;
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}
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}
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static void timer_stop(rt_hwtimer_t *timer)
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{
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if(timer == RT_NULL)
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{
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LOG_E("stop timer is NULL");
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return;
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}
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struct stm32_hw_lptimer *tim_device = rt_container_of(timer, struct stm32_hw_lptimer, time_device);
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LPTIM_HandleTypeDef *tim = (LPTIM_HandleTypeDef *)timer->parent.user_data;
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if(tim_device == RT_NULL)
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{
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LOG_E("stop tim_device is NULL");
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return;
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}
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if(tim == RT_NULL)
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{
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LOG_E("stop %s LPTIM_Handle is NULL", tim_device->name);
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return;
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}
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HAL_StatusTypeDef ret = HAL_LPTIM_TimeOut_Stop_IT(tim);
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if(ret != HAL_OK)
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{
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LOG_E("stop %s failed %d", tim_device->name, ret);
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}
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else
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{
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LOG_D("stop %s success", tim_device->name);
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}
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}
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static rt_uint32_t timer_get_freq(LPTIM_HandleTypeDef *tim)
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{
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/*No calculation is performed. The default initial configuration is 1000hz*/
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return 1000;
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}
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static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
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{
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LPTIM_HandleTypeDef *tim = (LPTIM_HandleTypeDef *)timer->parent.user_data;
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return HAL_LPTIM_ReadCounter(tim);
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}
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static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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{
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if(timer == RT_NULL)
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{
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LOG_E("start timer is NULL");
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return -RT_EINVAL;
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}
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struct stm32_hw_lptimer *tim_device = rt_container_of(timer, struct stm32_hw_lptimer, time_device);
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LPTIM_HandleTypeDef *tim = (LPTIM_HandleTypeDef *)timer->parent.user_data;
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if(tim_device == RT_NULL)
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{
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LOG_E("start tim_device is NULL");
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return -RT_EINVAL;
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}
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if(tim == RT_NULL)
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{
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LOG_E("start %s LPTIM_Handle is NULL", tim_device->name);
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return -RT_EINVAL;
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}
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rt_err_t result = RT_EOK;
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switch (cmd)
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{
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case DRV_HW_LPTIMER_CTRL_GET_TICK_MAX:
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{
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*(rt_uint32_t *)arg = LPTIM_REG_MAX_VALUE;
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break;
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}
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case DRV_HW_LPTIMER_CTRL_GET_FREQ:
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{
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*(rt_uint32_t *)arg = timer_get_freq(tim);
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break;
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}
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case DRV_HW_LPTIMER_CTRL_START:
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{
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timer_start(timer, *(rt_uint32_t *)arg, HWTIMER_MODE_ONESHOT);
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break;
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}
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case DRV_HW_LPTIMER_CTRL_GET_COUNT:
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{
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*(rt_uint32_t *)arg = timer_counter_get(timer);
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break;
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}
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default:
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{
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result = -RT_ENOSYS;
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}
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break;
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}
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return result;
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}
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#ifdef BSP_USING_LPTIM1
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void LPTIM1_IRQHandler(void)
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{
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HAL_LPTIM_IRQHandler(&LptimHandle);
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}
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void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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/* leave interrupt */
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HAL_LPTIM_IRQHandler(&stm32_hw_lptimer_obj[LPTIM1_INDEX].tim_handle);
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rt_interrupt_leave();
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}
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#endif
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/**
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* This function get current count value of LPTIM
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*
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* @return the count vlaue
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*/
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rt_uint32_t stm32l4_lptim_get_current_tick(void)
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#ifdef BSP_USING_LPTIM2
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void LPTIM2_IRQHandler(void)
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{
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return HAL_LPTIM_ReadCounter(&LptimHandle);
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rt_interrupt_enter();
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HAL_LPTIM_IRQHandler(&stm32_hw_lptimer_obj[LPTIM2_INDEX].tim_handle);
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rt_interrupt_leave();
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}
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#endif
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/**
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* This function get the max value that LPTIM can count
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*
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* @return the max count
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*/
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rt_uint32_t stm32l4_lptim_get_tick_max(void)
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#ifdef BSP_USING_LPTIM3
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void LPTIM3_IRQHandler(void)
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{
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return (0xFFFF);
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rt_interrupt_enter();
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HAL_LPTIM_IRQHandler(&stm32_hw_lptimer_obj[LPTIM3_INDEX].tim_handle);
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rt_interrupt_leave();
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}
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#endif
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/**
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* This function start LPTIM with reload value
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*
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* @param reload The value that LPTIM count down from
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*
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* @return RT_EOK
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*/
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rt_err_t stm32l4_lptim_start(rt_uint32_t reload)
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static const struct rt_hwtimer_ops _ops =
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{
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HAL_LPTIM_TimeOut_Start_IT(&LptimHandle, 0xFFFF, reload);
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return (RT_EOK);
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}
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/**
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* This function stop LPTIM
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*/
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void stm32l4_lptim_stop(void)
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{
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rt_uint32_t _ier;
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_ier = LptimHandle.Instance->IER;
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LptimHandle.Instance->ICR = LptimHandle.Instance->ISR & _ier;
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}
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/**
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* This function get the count clock of LPTIM
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*
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* @return the count clock frequency in Hz
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*/
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rt_uint32_t stm32l4_lptim_get_countfreq(void)
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{
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return 32000 / 32;
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}
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.init = timer_init,
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.start = timer_start,
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.stop = timer_stop,
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.count_get = timer_counter_get,
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.control = timer_ctrl,
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};
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/**
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* This function initialize the lptim
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*/
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int stm32l4_hw_lptim_init(void)
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static int stm32_hw_lptim_init(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = {0};
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int i = 0;
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int result = RT_EOK;
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/* Enable LSI clock */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
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RCC_OscInitStruct.LSIState = RCC_LSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Select the LSI clock as LPTIM peripheral clock */
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RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
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RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
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HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct);
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LptimHandle.Instance = LPTIM1;
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LptimHandle.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
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LptimHandle.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV32;
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LptimHandle.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
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LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
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LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
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LptimHandle.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
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if (HAL_LPTIM_Init(&LptimHandle) != HAL_OK)
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for (i = 0; i < sizeof(stm32_hw_lptimer_obj) / sizeof(stm32_hw_lptimer_obj[0]); i++)
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{
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||||
return -1;
|
||||
stm32_hw_lptimer_obj[i].time_device.info = &_info;
|
||||
stm32_hw_lptimer_obj[i].time_device.ops = &_ops;
|
||||
if (rt_device_hwtimer_register(&stm32_hw_lptimer_obj[i].time_device, stm32_hw_lptimer_obj[i].name, &stm32_hw_lptimer_obj[i].tim_handle) == RT_EOK)
|
||||
{
|
||||
LOG_D("%s register success", stm32_hw_lptimer_obj[i].name);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("%s register failed", stm32_hw_lptimer_obj[i].name);
|
||||
result = -RT_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
NVIC_ClearPendingIRQ(LPTIM1_IRQn);
|
||||
NVIC_SetPriority(LPTIM1_IRQn, 0);
|
||||
NVIC_EnableIRQ(LPTIM1_IRQn);
|
||||
|
||||
return 0;
|
||||
return result;
|
||||
}
|
||||
|
||||
INIT_DEVICE_EXPORT(stm32l4_hw_lptim_init);
|
||||
INIT_BOARD_EXPORT(stm32_hw_lptim_init);
|
||||
#endif /* BSP_USING_LPTIM */
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
* Copyright (c) 2006-2024 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-05-06 Zero-Free first version
|
||||
* 2024-07-04 wdfk-prog lptimer is register with hwtimer, only supports pm calls,the timer function is not supported
|
||||
*/
|
||||
|
||||
#ifndef __DRV_PMTIMER_H__
|
||||
|
@ -13,11 +14,13 @@
|
|||
|
||||
#include <rtthread.h>
|
||||
|
||||
rt_uint32_t stm32l4_lptim_get_countfreq(void);
|
||||
rt_uint32_t stm32l4_lptim_get_tick_max(void);
|
||||
rt_uint32_t stm32l4_lptim_get_current_tick(void);
|
||||
|
||||
rt_err_t stm32l4_lptim_start(rt_uint32_t load);
|
||||
void stm32l4_lptim_stop(void);
|
||||
/* 0x20 - 0x3F udevice control commands*/
|
||||
typedef enum
|
||||
{
|
||||
DRV_HW_LPTIMER_CTRL_GET_TICK_MAX = 0x20, /* get the maximum tick value*/
|
||||
DRV_HW_LPTIMER_CTRL_GET_FREQ = 0X21, /* get the timer frequency*/
|
||||
DRV_HW_LPTIMER_CTRL_START = 0X22, /* set the timeout value*/
|
||||
DRV_HW_LPTIMER_CTRL_GET_COUNT = 0X23, /* get the current count value*/
|
||||
} drv_hw_lptimer_ctrl_t;
|
||||
|
||||
#endif /* __DRV_PMTIMER_H__ */
|
||||
|
|
|
@ -224,6 +224,23 @@ menu "On-chip Peripheral Drivers"
|
|||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_LPTIM
|
||||
bool "Enable lptimer"
|
||||
default n
|
||||
select RT_USING_LPTIMER
|
||||
select RT_USING_HWTIMER
|
||||
if BSP_USING_LPTIM
|
||||
config BSP_USING_LPTIM1
|
||||
bool "Enable LPTIM1"
|
||||
default n
|
||||
config BSP_USING_LPTIM2
|
||||
bool "Enable LPTIM2"
|
||||
default n
|
||||
config BSP_USING_LPTIM3
|
||||
bool "Enable LPTIM3"
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI"
|
||||
default n
|
||||
|
|
Loading…
Reference in New Issue