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format code

This commit is contained in:
Rbb666 2022-07-05 16:59:20 +08:00 committed by guo
parent b9401f5fd4
commit fc5dfaf5c4
158 changed files with 2268 additions and 2470 deletions
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4
bsp/cypress/libraries/HAL_Drivers/SConscript
View File

@ -19,11 +19,11 @@ if GetDepend(['RT_USING_SERIAL']):
src += ['drv_uart.c']
if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2'):
src += ['drv_soft_i2c.c']
if GetDepend(['RT_USING_ADC']):
src += Glob('drv_adc.c')
src += ['drv_adc.c']
path = [cwd]
path += [cwd + '/config']

2
bsp/cypress/libraries/HAL_Drivers/drv_adc.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/cypress/libraries/HAL_Drivers/drv_log.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

4
bsp/cypress/libraries/HAL_Drivers/drv_uart.h
View File

@ -5,9 +5,9 @@
*
* Change Logs:
* Date Author Notes
* 2022-06-29 Rbb666 first version
* 2022-06-29 Rbb666 first version
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__

2
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.c
View File

@ -7,7 +7,7 @@
* CapSense Configurator 4.0.0.6195
*
********************************************************************************
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* or an affiliate of Cypress Semiconductor Corporation.
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.h
View File

@ -7,7 +7,7 @@
* CapSense Configurator 4.0.0.6195
*
********************************************************************************
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* or an affiliate of Cypress Semiconductor Corporation.
* SPDX-License-Identifier: Apache-2.0
*

4
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_defines.h
View File

@ -4,14 +4,14 @@
* Description:
* CAPSENSE configuration defines.
*
* Note: This file is required for the CAPSENSE Middleware Library to build
* Note: This file is required for the CAPSENSE Middleware Library to build
* successfully.
*
* This file should not be modified. It was automatically generated by
* CapSense Configurator 4.0.0.6195
*
********************************************************************************
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* or an affiliate of Cypress Semiconductor Corporation.
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_tuner_regmap.h
View File

@ -7,7 +7,7 @@
* CapSense Configurator 4.0.0.6195
*
********************************************************************************
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company)
* or an affiliate of Cypress Semiconductor Corporation.
* SPDX-License-Identifier: Apache-2.0
*

2
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c
View File

@ -30,7 +30,7 @@
#include "cycfg_clocks.h"
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj =
const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj =
{
.type = CYHAL_RSC_CLOCK,
.block_num = CYBSP_CSD_CLK_DIV_HW,

24
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_dmas.c
View File

@ -29,7 +29,7 @@
#include "cycfg_dmas.h"
const cy_stc_dma_descriptor_config_t TxDma_Descriptor_0_config =
const cy_stc_dma_descriptor_config_t TxDma_Descriptor_0_config =
{
.retrigger = CY_DMA_RETRIG_4CYC,
.interruptType = CY_DMA_DESCR,
@ -50,7 +50,7 @@ const cy_stc_dma_descriptor_config_t TxDma_Descriptor_0_config =
.yCount = 1,
.nextDescriptor = NULL,
};
cy_stc_dma_descriptor_t TxDma_Descriptor_0 =
cy_stc_dma_descriptor_t TxDma_Descriptor_0 =
{
.ctl = 0UL,
.src = 0UL,
@ -59,7 +59,7 @@ cy_stc_dma_descriptor_t TxDma_Descriptor_0 =
.yCtl = 0UL,
.nextPtr = 0UL,
};
const cy_stc_dma_channel_config_t TxDma_channelConfig =
const cy_stc_dma_channel_config_t TxDma_channelConfig =
{
.descriptor = &TxDma_Descriptor_0,
.preemptable = false,
@ -67,7 +67,7 @@ const cy_stc_dma_channel_config_t TxDma_channelConfig =
.enable = false,
.bufferable = false,
};
const cy_stc_dma_crc_config_t TxDma_crcConfig =
const cy_stc_dma_crc_config_t TxDma_crcConfig =
{
.dataReverse = false,
.dataXor = 0,
@ -76,14 +76,14 @@ const cy_stc_dma_crc_config_t TxDma_crcConfig =
.polynomial = 79764919,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t TxDma_obj =
const cyhal_resource_inst_t TxDma_obj =
{
.type = CYHAL_RSC_DMA,
.block_num = 0U,
.channel_num = TxDma_CHANNEL,
};
#endif //defined (CY_USING_HAL)
const cy_stc_dma_descriptor_config_t RxDma_Descriptor_0_config =
const cy_stc_dma_descriptor_config_t RxDma_Descriptor_0_config =
{
.retrigger = CY_DMA_RETRIG_4CYC,
.interruptType = CY_DMA_1ELEMENT,
@ -104,7 +104,7 @@ const cy_stc_dma_descriptor_config_t RxDma_Descriptor_0_config =
.yCount = 1,
.nextDescriptor = &RxDma_Descriptor_1,
};
const cy_stc_dma_descriptor_config_t RxDma_Descriptor_1_config =
const cy_stc_dma_descriptor_config_t RxDma_Descriptor_1_config =
{
.retrigger = CY_DMA_RETRIG_4CYC,
.interruptType = CY_DMA_DESCR,
@ -125,7 +125,7 @@ const cy_stc_dma_descriptor_config_t RxDma_Descriptor_1_config =
.yCount = 1,
.nextDescriptor = &RxDma_Descriptor_0,
};
cy_stc_dma_descriptor_t RxDma_Descriptor_0 =
cy_stc_dma_descriptor_t RxDma_Descriptor_0 =
{
.ctl = 0UL,
.src = 0UL,
@ -134,7 +134,7 @@ cy_stc_dma_descriptor_t RxDma_Descriptor_0 =
.yCtl = 0UL,
.nextPtr = 0UL,
};
cy_stc_dma_descriptor_t RxDma_Descriptor_1 =
cy_stc_dma_descriptor_t RxDma_Descriptor_1 =
{
.ctl = 0UL,
.src = 0UL,
@ -143,7 +143,7 @@ cy_stc_dma_descriptor_t RxDma_Descriptor_1 =
.yCtl = 0UL,
.nextPtr = 0UL,
};
const cy_stc_dma_channel_config_t RxDma_channelConfig =
const cy_stc_dma_channel_config_t RxDma_channelConfig =
{
.descriptor = &RxDma_Descriptor_0,
.preemptable = false,
@ -151,7 +151,7 @@ const cy_stc_dma_channel_config_t RxDma_channelConfig =
.enable = false,
.bufferable = false,
};
const cy_stc_dma_crc_config_t RxDma_crcConfig =
const cy_stc_dma_crc_config_t RxDma_crcConfig =
{
.dataReverse = false,
.dataXor = 0,
@ -160,7 +160,7 @@ const cy_stc_dma_crc_config_t RxDma_crcConfig =
.polynomial = 79764919,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t RxDma_obj =
const cyhal_resource_inst_t RxDma_obj =
{
.type = CYHAL_RSC_DMA,
.block_num = 0U,

2
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c
View File

@ -29,7 +29,7 @@
#include "cycfg_peripherals.h"
cy_stc_csd_context_t cy_csd_0_context =
cy_stc_csd_context_t cy_csd_0_context =
{
.lockKey = CY_CSD_NONE_KEY,
};

64
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c
View File

@ -29,7 +29,7 @@
#include "cycfg_pins.h"
const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config =
const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -46,14 +46,14 @@ const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_WCO_IN_obj =
const cyhal_resource_inst_t CYBSP_WCO_IN_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_WCO_IN_PORT_NUM,
.channel_num = CYBSP_WCO_IN_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config =
const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -70,14 +70,14 @@ const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_WCO_OUT_obj =
const cyhal_resource_inst_t CYBSP_WCO_OUT_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_WCO_OUT_PORT_NUM,
.channel_num = CYBSP_WCO_OUT_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -94,14 +94,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_RX_obj =
const cyhal_resource_inst_t CYBSP_CSD_RX_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_RX_PORT_NUM,
.channel_num = CYBSP_CSD_RX_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_SWO_config =
const cy_stc_gpio_pin_config_t CYBSP_SWO_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_STRONG_IN_OFF,
@ -118,14 +118,14 @@ const cy_stc_gpio_pin_config_t CYBSP_SWO_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_SWO_obj =
const cyhal_resource_inst_t CYBSP_SWO_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_SWO_PORT_NUM,
.channel_num = CYBSP_SWO_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config =
const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_PULLUP,
@ -142,14 +142,14 @@ const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_SWDIO_obj =
const cyhal_resource_inst_t CYBSP_SWDIO_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_SWDIO_PORT_NUM,
.channel_num = CYBSP_SWDIO_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config =
const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_PULLDOWN,
@ -166,14 +166,14 @@ const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_SWDCK_obj =
const cyhal_resource_inst_t CYBSP_SWDCK_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_SWDCK_PORT_NUM,
.channel_num = CYBSP_SWDCK_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CINA_config =
const cy_stc_gpio_pin_config_t CYBSP_CINA_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -190,14 +190,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CINA_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CINA_obj =
const cyhal_resource_inst_t CYBSP_CINA_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CINA_PORT_NUM,
.channel_num = CYBSP_CINA_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CINB_config =
const cy_stc_gpio_pin_config_t CYBSP_CINB_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -214,14 +214,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CINB_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CINB_obj =
const cyhal_resource_inst_t CYBSP_CINB_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CINB_PORT_NUM,
.channel_num = CYBSP_CINB_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CMOD_config =
const cy_stc_gpio_pin_config_t CYBSP_CMOD_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -238,14 +238,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CMOD_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CMOD_obj =
const cyhal_resource_inst_t CYBSP_CMOD_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CMOD_PORT_NUM,
.channel_num = CYBSP_CMOD_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -262,14 +262,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_BTN0_obj =
const cyhal_resource_inst_t CYBSP_CSD_BTN0_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_BTN0_PORT_NUM,
.channel_num = CYBSP_CSD_BTN0_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -286,14 +286,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_BTN1_obj =
const cyhal_resource_inst_t CYBSP_CSD_BTN1_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_BTN1_PORT_NUM,
.channel_num = CYBSP_CSD_BTN1_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -310,14 +310,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_SLD0_obj =
const cyhal_resource_inst_t CYBSP_CSD_SLD0_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_SLD0_PORT_NUM,
.channel_num = CYBSP_CSD_SLD0_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -334,14 +334,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_SLD1_obj =
const cyhal_resource_inst_t CYBSP_CSD_SLD1_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_SLD1_PORT_NUM,
.channel_num = CYBSP_CSD_SLD1_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -358,14 +358,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_SLD2_obj =
const cyhal_resource_inst_t CYBSP_CSD_SLD2_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_SLD2_PORT_NUM,
.channel_num = CYBSP_CSD_SLD2_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -382,14 +382,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_SLD3_obj =
const cyhal_resource_inst_t CYBSP_CSD_SLD3_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_SLD3_PORT_NUM,
.channel_num = CYBSP_CSD_SLD3_PIN,
};
#endif //defined (CY_USING_HAL)
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config =
const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config =
{
.outVal = 1,
.driveMode = CY_GPIO_DM_ANALOG,
@ -406,7 +406,7 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config =
.vohSel = 0UL,
};
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t CYBSP_CSD_SLD4_obj =
const cyhal_resource_inst_t CYBSP_CSD_SLD4_obj =
{
.type = CYHAL_RSC_GPIO,
.block_num = CYBSP_CSD_SLD4_PORT_NUM,

36
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h
View File

@ -63,7 +63,7 @@ extern "C" {
#define CYBSP_WCO_IN_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_WCO_IN_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_WCO_IN_HAL_DIR CYHAL_GPIO_DIR_INPUT
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_WCO_IN_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
@ -90,7 +90,7 @@ extern "C" {
#define CYBSP_WCO_OUT_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_WCO_OUT_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_WCO_OUT_HAL_DIR CYHAL_GPIO_DIR_INPUT
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_WCO_OUT_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
@ -246,7 +246,7 @@ extern "C" {
#define CYBSP_CS_TX_RX_HAL_IRQ CYBSP_CSD_RX_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_RX_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_RX_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_RX_HAL_DIR CYBSP_CSD_RX_HAL_DIR
#define CYBSP_CS_TX_RX_HAL_DIR CYBSP_CSD_RX_HAL_DIR
#endif //defined (CY_USING_HAL)
@ -320,8 +320,8 @@ extern "C" {
#if defined (CY_USING_HAL)
#define CYBSP_DEBUG_UART_TX (P5_1)
#define CYBSP_D1 CYBSP_DEBUG_UART_TX
#define CYBSP_DEBUG_UART_TX_PORT GPIO_PRT5
#define CYBSP_DEBUG_UART_TX_PIN 1U
#define CYBSP_DEBUG_UART_TX_PORT GPIO_PRT5
#define CYBSP_DEBUG_UART_TX_PIN 1U
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_DEBUG_UART_RTS (P5_2)
@ -373,7 +373,7 @@ extern "C" {
#define CYBSP_SWO_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_SWO_HAL_DIR CYHAL_GPIO_DIR_OUTPUT
#define CYBSP_SWO_HAL_DIR CYHAL_GPIO_DIR_OUTPUT
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_SWO_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_STRONG
@ -400,7 +400,7 @@ extern "C" {
#define CYBSP_SWDIO_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_SWDIO_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
#define CYBSP_SWDIO_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_SWDIO_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLUP
@ -427,7 +427,7 @@ extern "C" {
#define CYBSP_SWDCK_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_SWDCK_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
#define CYBSP_SWDCK_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_SWDCK_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLDOWN
@ -454,7 +454,7 @@ extern "C" {
#define CYBSP_CINA_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CINA_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CINA_HAL_DIR CYHAL_GPIO_DIR_INPUT
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CINA_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
@ -481,7 +481,7 @@ extern "C" {
#define CYBSP_CINB_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CINB_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CINB_HAL_DIR CYHAL_GPIO_DIR_INPUT
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CINB_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
@ -518,7 +518,7 @@ extern "C" {
#define CYBSP_CMOD_HAL_IRQ CYHAL_GPIO_IRQ_NONE
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CMOD_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CMOD_HAL_DIR CYHAL_GPIO_DIR_INPUT
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CMOD_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
@ -557,7 +557,7 @@ extern "C" {
#define CYBSP_CS_BTN0_HAL_IRQ CYBSP_CSD_BTN0_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_BTN0_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_BTN0_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_BTN0_HAL_DIR CYBSP_CSD_BTN0_HAL_DIR
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
@ -598,7 +598,7 @@ extern "C" {
#define CYBSP_CS_BTN1_HAL_IRQ CYBSP_CSD_BTN1_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_BTN1_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_BTN1_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_BTN1_HAL_DIR CYBSP_CSD_BTN1_HAL_DIR
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
@ -639,7 +639,7 @@ extern "C" {
#define CYBSP_CS_SLD0_HAL_IRQ CYBSP_CSD_SLD0_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_SLD0_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_SLD0_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_SLD0_HAL_DIR CYBSP_CSD_SLD0_HAL_DIR
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
@ -680,7 +680,7 @@ extern "C" {
#define CYBSP_CS_SLD1_HAL_IRQ CYBSP_CSD_SLD1_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_SLD1_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_SLD1_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_SLD1_HAL_DIR CYBSP_CSD_SLD1_HAL_DIR
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
@ -721,7 +721,7 @@ extern "C" {
#define CYBSP_CS_SLD2_HAL_IRQ CYBSP_CSD_SLD2_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_SLD2_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_SLD2_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_SLD2_HAL_DIR CYBSP_CSD_SLD2_HAL_DIR
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
@ -762,7 +762,7 @@ extern "C" {
#define CYBSP_CS_SLD3_HAL_IRQ CYBSP_CSD_SLD3_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_SLD3_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_SLD3_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_SLD3_HAL_DIR CYBSP_CSD_SLD3_HAL_DIR
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
@ -803,7 +803,7 @@ extern "C" {
#define CYBSP_CS_SLD4_HAL_IRQ CYBSP_CSD_SLD4_HAL_IRQ
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
#define CYBSP_CSD_SLD4_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CSD_SLD4_HAL_DIR CYHAL_GPIO_DIR_INPUT
#define CYBSP_CS_SLD4_HAL_DIR CYBSP_CSD_SLD4_HAL_DIR
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)

322
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c
View File

@ -114,7 +114,7 @@
static cy_stc_pra_system_config_t srss_0_clock_0_secureConfig;
#endif //defined (CY_DEVICE_SECURE)
#if (!defined(CY_DEVICE_SECURE))
static const cy_stc_fll_manual_config_t srss_0_clock_0_fll_0_fllConfig =
static const cy_stc_fll_manual_config_t srss_0_clock_0_fll_0_fllConfig =
{
.fllMult = 500U,
.refDiv = 20U,
@ -129,7 +129,7 @@
};
#endif //(!defined(CY_DEVICE_SECURE))
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj =
const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj =
{
.type = CYHAL_RSC_CLKPATH,
.block_num = 0U,
@ -137,7 +137,7 @@
};
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj =
const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj =
{
.type = CYHAL_RSC_CLKPATH,
.block_num = 1U,
@ -145,7 +145,7 @@
};
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj =
const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj =
{
.type = CYHAL_RSC_CLKPATH,
.block_num = 2U,
@ -153,7 +153,7 @@
};
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t srss_0_clock_0_pathmux_3_obj =
const cyhal_resource_inst_t srss_0_clock_0_pathmux_3_obj =
{
.type = CYHAL_RSC_CLKPATH,
.block_num = 3U,
@ -161,7 +161,7 @@
};
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t srss_0_clock_0_pathmux_4_obj =
const cyhal_resource_inst_t srss_0_clock_0_pathmux_4_obj =
{
.type = CYHAL_RSC_CLKPATH,
.block_num = 4U,
@ -169,7 +169,7 @@
};
#endif //defined (CY_USING_HAL)
#if defined (CY_USING_HAL)
const cyhal_resource_inst_t srss_0_clock_0_pathmux_5_obj =
const cyhal_resource_inst_t srss_0_clock_0_pathmux_5_obj =
{
.type = CYHAL_RSC_CLKPATH,
.block_num = 5U,
@ -177,7 +177,7 @@
};
#endif //defined (CY_USING_HAL)
#if (!defined(CY_DEVICE_SECURE))
static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig =
static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig =
{
.feedbackDiv = 30,
.referenceDiv = 1,
@ -198,467 +198,467 @@ __WEAK void __NO_RETURN cycfg_ClockStartupError(uint32_t error)
#ifdef CY_CFG_PWR_ENABLED
secure_config->powerEnable = CY_CFG_PWR_ENABLED;
#endif /* CY_CFG_PWR_ENABLED */
#ifdef CY_CFG_PWR_USING_LDO
secure_config->ldoEnable = CY_CFG_PWR_USING_LDO;
#endif /* CY_CFG_PWR_USING_LDO */
#ifdef CY_CFG_PWR_USING_PMIC
secure_config->pmicEnable = CY_CFG_PWR_USING_PMIC;
#endif /* CY_CFG_PWR_USING_PMIC */
#ifdef CY_CFG_PWR_VBACKUP_USING_VDDD
secure_config->vBackupVDDDEnable = CY_CFG_PWR_VBACKUP_USING_VDDD;
#endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */
#ifdef CY_CFG_PWR_USING_ULP
secure_config->ulpEnable = CY_CFG_PWR_USING_ULP;
#endif /* CY_CFG_PWR_USING_ULP */
#ifdef CY_CFG_SYSCLK_ECO_ENABLED
secure_config->ecoEnable = CY_CFG_SYSCLK_ECO_ENABLED;
#endif /* CY_CFG_SYSCLK_ECO_ENABLED */
#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED
secure_config->extClkEnable = CY_CFG_SYSCLK_EXTCLK_ENABLED;
#endif /* CY_CFG_SYSCLK_EXTCLK_ENABLED */
#ifdef CY_CFG_SYSCLK_ILO_ENABLED
secure_config->iloEnable = CY_CFG_SYSCLK_ILO_ENABLED;
#endif /* CY_CFG_SYSCLK_ILO_ENABLED */
#ifdef CY_CFG_SYSCLK_WCO_ENABLED
secure_config->wcoEnable = CY_CFG_SYSCLK_WCO_ENABLED;
#endif /* CY_CFG_SYSCLK_WCO_ENABLED */
#ifdef CY_CFG_SYSCLK_FLL_ENABLED
secure_config->fllEnable = CY_CFG_SYSCLK_FLL_ENABLED;
#endif /* CY_CFG_SYSCLK_FLL_ENABLED */
#ifdef CY_CFG_SYSCLK_PLL0_ENABLED
secure_config->pll0Enable = CY_CFG_SYSCLK_PLL0_ENABLED;
#endif /* CY_CFG_SYSCLK_PLL0_ENABLED */
#ifdef CY_CFG_SYSCLK_PLL1_ENABLED
secure_config->pll1Enable = CY_CFG_SYSCLK_PLL1_ENABLED;
#endif /* CY_CFG_SYSCLK_PLL1_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED
secure_config->path0Enable = CY_CFG_SYSCLK_CLKPATH0_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH0_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED
secure_config->path1Enable = CY_CFG_SYSCLK_CLKPATH1_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH1_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED
secure_config->path2Enable = CY_CFG_SYSCLK_CLKPATH2_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH2_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED
secure_config->path3Enable = CY_CFG_SYSCLK_CLKPATH3_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH3_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED
secure_config->path4Enable = CY_CFG_SYSCLK_CLKPATH4_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH4_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED
secure_config->path5Enable = CY_CFG_SYSCLK_CLKPATH5_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPATH5_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED
secure_config->clkFastEnable = CY_CFG_SYSCLK_CLKFAST_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKFAST_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED
secure_config->clkPeriEnable = CY_CFG_SYSCLK_CLKPERI_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPERI_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED
secure_config->clkSlowEnable = CY_CFG_SYSCLK_CLKSLOW_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKSLOW_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF0_ENABLED
secure_config->clkHF0Enable = CY_CFG_SYSCLK_CLKHF0_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF0_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED
secure_config->clkHF1Enable = CY_CFG_SYSCLK_CLKHF1_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF1_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED
secure_config->clkHF2Enable = CY_CFG_SYSCLK_CLKHF2_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF2_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED
secure_config->clkHF3Enable = CY_CFG_SYSCLK_CLKHF3_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF3_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED
secure_config->clkHF4Enable = CY_CFG_SYSCLK_CLKHF4_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF4_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED
secure_config->clkHF5Enable = CY_CFG_SYSCLK_CLKHF5_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKHF5_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED
secure_config->clkPumpEnable = CY_CFG_SYSCLK_CLKPUMP_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKPUMP_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKLF_ENABLED
secure_config->clkLFEnable = CY_CFG_SYSCLK_CLKLF_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKLF_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED
secure_config->clkBakEnable = CY_CFG_SYSCLK_CLKBAK_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKBAK_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED
secure_config->clkTimerEnable = CY_CFG_SYSCLK_CLKTIMER_ENABLED;
#endif /* CY_CFG_SYSCLK_CLKTIMER_ENABLED */
#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED
#error Configuration Error : ALT SYSTICK cannot be enabled for Secure devices.
#error Configuration Error : ALT SYSTICK cannot be enabled for Secure devices.
#endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED */
#ifdef CY_CFG_SYSCLK_PILO_ENABLED
secure_config->piloEnable = CY_CFG_SYSCLK_PILO_ENABLED;
#endif /* CY_CFG_SYSCLK_PILO_ENABLED */
#ifdef CY_CFG_SYSCLK_ALTHF_ENABLED
secure_config->clkAltHfEnable = CY_CFG_SYSCLK_ALTHF_ENABLED;
#endif /* CY_CFG_SYSCLK_ALTHF_ENABLED */
#ifdef CY_CFG_PWR_LDO_VOLTAGE
secure_config->ldoVoltage = CY_CFG_PWR_LDO_VOLTAGE;
#endif /* CY_CFG_PWR_LDO_VOLTAGE */
#ifdef CY_CFG_PWR_REGULATOR_MODE_MIN
secure_config->pwrCurrentModeMin = CY_CFG_PWR_REGULATOR_MODE_MIN;
#endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */
#ifdef CY_CFG_PWR_BUCK_VOLTAGE
secure_config->buckVoltage = CY_CFG_PWR_BUCK_VOLTAGE;
#endif /* CY_CFG_PWR_BUCK_VOLTAGE */
#ifdef CY_CFG_SYSCLK_ECO_FREQ
secure_config->ecoFreqHz = CY_CFG_SYSCLK_ECO_FREQ;
#endif /* CY_CFG_SYSCLK_ECO_FREQ */
#ifdef CY_CFG_SYSCLK_ECO_CLOAD
secure_config->ecoLoad = CY_CFG_SYSCLK_ECO_CLOAD;
#endif /* CY_CFG_SYSCLK_ECO_CLOAD */
#ifdef CY_CFG_SYSCLK_ECO_ESR
secure_config->ecoEsr = CY_CFG_SYSCLK_ECO_ESR;
#endif /* CY_CFG_SYSCLK_ECO_ESR */
#ifdef CY_CFG_SYSCLK_ECO_DRIVE_LEVEL
secure_config->ecoDriveLevel = CY_CFG_SYSCLK_ECO_DRIVE_LEVEL;
#endif /* CY_CFG_SYSCLK_ECO_DRIVE_LEVEL */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PRT
secure_config->ecoInPort = CY_CFG_SYSCLK_ECO_GPIO_IN_PRT;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PRT */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT
secure_config->ecoOutPort = CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PIN
secure_config->ecoInPinNum = CY_CFG_SYSCLK_ECO_GPIO_IN_PIN;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PIN */
#ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN
secure_config->ecoOutPinNum = CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN;
#endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN */
#ifdef CY_CFG_SYSCLK_EXTCLK_FREQ
secure_config->extClkFreqHz = CY_CFG_SYSCLK_EXTCLK_FREQ;
#endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */
#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PRT
secure_config->extClkPort = CY_CFG_SYSCLK_EXTCLK_GPIO_PRT;
#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PRT */
#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PIN
secure_config->extClkPinNum = CY_CFG_SYSCLK_EXTCLK_GPIO_PIN;
#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PIN */
#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM
secure_config->extClkHsiom = CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM;
#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM */
#ifdef CY_CFG_SYSCLK_ILO_HIBERNATE
secure_config->iloHibernateON = CY_CFG_SYSCLK_ILO_HIBERNATE;
#endif /* CY_CFG_SYSCLK_ILO_HIBERNATE */
#ifdef CY_CFG_SYSCLK_WCO_BYPASS
secure_config->bypassEnable = CY_CFG_SYSCLK_WCO_BYPASS;
#endif /* CY_CFG_SYSCLK_WCO_BYPASS */
#ifdef CY_CFG_SYSCLK_WCO_IN_PRT
secure_config->wcoInPort = CY_CFG_SYSCLK_WCO_IN_PRT;
#endif /* CY_CFG_SYSCLK_WCO_IN_PRT */
#ifdef CY_CFG_SYSCLK_WCO_OUT_PRT
secure_config->wcoOutPort = CY_CFG_SYSCLK_WCO_OUT_PRT;
#endif /* CY_CFG_SYSCLK_WCO_OUT_PRT */
#ifdef CY_CFG_SYSCLK_WCO_IN_PIN
secure_config->wcoInPinNum = CY_CFG_SYSCLK_WCO_IN_PIN;
#endif /* CY_CFG_SYSCLK_WCO_IN_PIN */
#ifdef CY_CFG_SYSCLK_WCO_OUT_PIN
secure_config->wcoOutPinNum = CY_CFG_SYSCLK_WCO_OUT_PIN;
#endif /* CY_CFG_SYSCLK_WCO_OUT_PIN */
#ifdef CY_CFG_SYSCLK_FLL_OUT_FREQ
secure_config->fllOutFreqHz = CY_CFG_SYSCLK_FLL_OUT_FREQ;
#endif /* CY_CFG_SYSCLK_FLL_OUT_FREQ */
#ifdef CY_CFG_SYSCLK_FLL_MULT
secure_config->fllMult = CY_CFG_SYSCLK_FLL_MULT;
#endif /* CY_CFG_SYSCLK_FLL_MULT */
#ifdef CY_CFG_SYSCLK_FLL_REFDIV
secure_config->fllRefDiv = CY_CFG_SYSCLK_FLL_REFDIV;
#endif /* CY_CFG_SYSCLK_FLL_REFDIV */
#ifdef CY_CFG_SYSCLK_FLL_CCO_RANGE
secure_config->fllCcoRange = CY_CFG_SYSCLK_FLL_CCO_RANGE;
#endif /* CY_CFG_SYSCLK_FLL_CCO_RANGE */
#ifdef CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV
secure_config->enableOutputDiv = CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV;
#endif /* CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV */
#ifdef CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE
secure_config->lockTolerance = CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE;
#endif /* CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE */
#ifdef CY_CFG_SYSCLK_FLL_IGAIN
secure_config->igain = CY_CFG_SYSCLK_FLL_IGAIN;
#endif /* CY_CFG_SYSCLK_FLL_IGAIN */
#ifdef CY_CFG_SYSCLK_FLL_PGAIN
secure_config->pgain = CY_CFG_SYSCLK_FLL_PGAIN;
#endif /* CY_CFG_SYSCLK_FLL_PGAIN */
#ifdef CY_CFG_SYSCLK_FLL_SETTLING_COUNT
secure_config->settlingCount = CY_CFG_SYSCLK_FLL_SETTLING_COUNT;
#endif /* CY_CFG_SYSCLK_FLL_SETTLING_COUNT */
#ifdef CY_CFG_SYSCLK_FLL_OUTPUT_MODE
secure_config->outputMode = CY_CFG_SYSCLK_FLL_OUTPUT_MODE;
#endif /* CY_CFG_SYSCLK_FLL_OUTPUT_MODE */
#ifdef CY_CFG_SYSCLK_FLL_CCO_FREQ
secure_config->ccoFreq = CY_CFG_SYSCLK_FLL_CCO_FREQ;
#endif /* CY_CFG_SYSCLK_FLL_CCO_FREQ */
#ifdef CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV
secure_config->pll0FeedbackDiv = CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV;
#endif /* CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV */
#ifdef CY_CFG_SYSCLK_PLL0_REFERENCE_DIV
secure_config->pll0ReferenceDiv = CY_CFG_SYSCLK_PLL0_REFERENCE_DIV;
#endif /* CY_CFG_SYSCLK_PLL0_REFERENCE_DIV */
#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_DIV
secure_config->pll0OutputDiv = CY_CFG_SYSCLK_PLL0_OUTPUT_DIV;
#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_DIV */
#ifdef CY_CFG_SYSCLK_PLL0_LF_MODE
secure_config->pll0LfMode = CY_CFG_SYSCLK_PLL0_LF_MODE;
#endif /* CY_CFG_SYSCLK_PLL0_LF_MODE */
#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_MODE
secure_config->pll0OutputMode = CY_CFG_SYSCLK_PLL0_OUTPUT_MODE;
#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_MODE */
#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ
secure_config->pll0OutFreqHz = CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ;
#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ */
#ifdef CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV
secure_config->pll1FeedbackDiv = CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV;
#endif /* CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV */
#ifdef CY_CFG_SYSCLK_PLL1_REFERENCE_DIV
secure_config->pll1ReferenceDiv = CY_CFG_SYSCLK_PLL1_REFERENCE_DIV;
#endif /* CY_CFG_SYSCLK_PLL1_REFERENCE_DIV */
#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_DIV
secure_config->pll1OutputDiv = CY_CFG_SYSCLK_PLL1_OUTPUT_DIV;
#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_DIV */
#ifdef CY_CFG_SYSCLK_PLL1_LF_MODE
secure_config->pll1LfMode = CY_CFG_SYSCLK_PLL1_LF_MODE;
#endif /* CY_CFG_SYSCLK_PLL1_LF_MODE */
#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_MODE
secure_config->pll1OutputMode = CY_CFG_SYSCLK_PLL1_OUTPUT_MODE;
#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_MODE */
#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ
secure_config->pll1OutFreqHz = CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ;
#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ */
#ifdef CY_CFG_SYSCLK_CLKPATH0_SOURCE
secure_config->path0Src = CY_CFG_SYSCLK_CLKPATH0_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH0_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH1_SOURCE
secure_config->path1Src = CY_CFG_SYSCLK_CLKPATH1_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH1_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH2_SOURCE
secure_config->path2Src = CY_CFG_SYSCLK_CLKPATH2_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH2_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH3_SOURCE
secure_config->path3Src = CY_CFG_SYSCLK_CLKPATH3_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH3_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH4_SOURCE
secure_config->path4Src = CY_CFG_SYSCLK_CLKPATH4_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH4_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPATH5_SOURCE
secure_config->path5Src = CY_CFG_SYSCLK_CLKPATH5_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPATH5_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKFAST_DIVIDER
secure_config->clkFastDiv = CY_CFG_SYSCLK_CLKFAST_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKFAST_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKPERI_DIVIDER
secure_config->clkPeriDiv = CY_CFG_SYSCLK_CLKPERI_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKPERI_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKSLOW_DIVIDER
secure_config->clkSlowDiv = CY_CFG_SYSCLK_CLKSLOW_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKSLOW_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF0_CLKPATH
secure_config->hf0Source = CY_CFG_SYSCLK_CLKHF0_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF0_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF0_DIVIDER
secure_config->hf0Divider = CY_CFG_SYSCLK_CLKHF0_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF0_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ
secure_config->hf0OutFreqMHz = CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF1_CLKPATH
secure_config->hf1Source = CY_CFG_SYSCLK_CLKHF1_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF1_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF1_DIVIDER
secure_config->hf1Divider = CY_CFG_SYSCLK_CLKHF1_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF1_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ
secure_config->hf1OutFreqMHz = CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF2_CLKPATH
secure_config->hf2Source = CY_CFG_SYSCLK_CLKHF2_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF2_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF2_DIVIDER
secure_config->hf2Divider = CY_CFG_SYSCLK_CLKHF2_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF2_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ
secure_config->hf2OutFreqMHz = CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF3_CLKPATH
secure_config->hf3Source = CY_CFG_SYSCLK_CLKHF3_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF3_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF3_DIVIDER
secure_config->hf3Divider = CY_CFG_SYSCLK_CLKHF3_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF3_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ
secure_config->hf3OutFreqMHz = CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF4_CLKPATH
secure_config->hf4Source = CY_CFG_SYSCLK_CLKHF4_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF4_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF4_DIVIDER
secure_config->hf4Divider = CY_CFG_SYSCLK_CLKHF4_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF4_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ
secure_config->hf4OutFreqMHz = CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKHF5_CLKPATH
secure_config->hf5Source = CY_CFG_SYSCLK_CLKHF5_CLKPATH;
#endif /* CY_CFG_SYSCLK_CLKHF5_CLKPATH */
#ifdef CY_CFG_SYSCLK_CLKHF5_DIVIDER
secure_config->hf5Divider = CY_CFG_SYSCLK_CLKHF5_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKHF5_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ
secure_config->hf5OutFreqMHz = CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ;
#endif /* CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ */
#ifdef CY_CFG_SYSCLK_CLKPUMP_SOURCE
secure_config->pumpSource = CY_CFG_SYSCLK_CLKPUMP_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKPUMP_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKPUMP_DIVIDER
secure_config->pumpDivider = CY_CFG_SYSCLK_CLKPUMP_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKPUMP_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKLF_SOURCE
secure_config->clkLfSource = CY_CFG_SYSCLK_CLKLF_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKLF_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKBAK_SOURCE
secure_config->clkBakSource = CY_CFG_SYSCLK_CLKBAK_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKBAK_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKTIMER_SOURCE
secure_config->clkTimerSource = CY_CFG_SYSCLK_CLKTIMER_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKTIMER_SOURCE */
#ifdef CY_CFG_SYSCLK_CLKTIMER_DIVIDER
secure_config->clkTimerDivider = CY_CFG_SYSCLK_CLKTIMER_DIVIDER;
#endif /* CY_CFG_SYSCLK_CLKTIMER_DIVIDER */
#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE
secure_config->clkSrcAltSysTick = CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE;
#endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD
secure_config->altHFcLoad = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME
secure_config->altHFxtalStartUpTime = CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ
secure_config->altHFclkFreq = CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV
secure_config->altHFsysClkDiv = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV */
#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR
secure_config->altHFvoltageReg = CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR;
#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR */
@ -872,7 +872,7 @@ void init_cycfg_system(void)
#if (((CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 5UL))
#error Configuration Error : ALTHF, ILO, PILO cannot drive HF0.
#endif
configStatus = CY_PRA_FUNCTION_CALL_RETURN_PARAM(CY_PRA_MSG_TYPE_SYS_CFG_FUNC,
CY_PRA_FUNC_INIT_CYCFG_DEVICE,
&srss_0_clock_0_secureConfig);
@ -885,7 +885,7 @@ void init_cycfg_system(void)
Cy_SysClk_ExtClkSetFrequency(CY_CFG_SYSCLK_EXTCLK_FREQ);
#endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */
#else /* defined(CY_DEVICE_SECURE) */
/* Set worst case memory wait states (! ultra low power, 150 MHz), will update at the end */
Cy_SysLib_SetWaitStates(false, 150UL);
#ifdef CY_CFG_PWR_ENABLED
@ -895,7 +895,7 @@ void init_cycfg_system(void)
#warning Power system will not be configured. Update power personality to v1.20 or later.
#endif /* CY_CFG_PWR_INIT */
#endif /* CY_CFG_PWR_ENABLED */
/* Reset the core clock path to default and disable all the FLLs/PLLs */
Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE);
Cy_SysClk_ClkFastSetDivider(0U);
@ -906,61 +906,61 @@ void init_cycfg_system(void)
(void)Cy_SysClk_PllDisable(pll);
}
Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH1, CY_SYSCLK_CLKPATH_IN_IMO);
if ((CY_SYSCLK_CLKHF_IN_CLKPATH0 == Cy_SysClk_ClkHfGetSource(0UL)) &&
(CY_SYSCLK_CLKPATH_IN_WCO == Cy_SysClk_ClkPathGetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0)))
{
Cy_SysClk_ClkHfSetSource(0U, CY_SYSCLK_CLKHF_IN_CLKPATH1);
}
Cy_SysClk_FllDisable();
Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0, CY_SYSCLK_CLKPATH_IN_IMO);
Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH0);
#ifdef CY_IP_MXBLESS
(void)Cy_BLE_EcoReset();
#endif
/* Enable all source clocks */
#ifdef CY_CFG_SYSCLK_PILO_ENABLED
Cy_SysClk_PiloInit();
#endif
#ifdef CY_CFG_SYSCLK_WCO_ENABLED
Cy_SysClk_WcoInit();
#endif
#ifdef CY_CFG_SYSCLK_CLKLF_ENABLED
Cy_SysClk_ClkLfInit();
#endif
#if (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED)
Cy_SysClk_AltHfInit();
#endif /* (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED */
#ifdef CY_CFG_SYSCLK_ECO_ENABLED
Cy_SysClk_EcoInit();
#endif
#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED
Cy_SysClk_ExtClkInit();
#endif
/* Configure CPU clock dividers */
#ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED
Cy_SysClk_ClkFastInit();
#endif
#ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED
Cy_SysClk_ClkPeriInit();
#endif
#ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED
Cy_SysClk_ClkSlowInit();
#endif
#if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U))
/* Configure HFCLK0 to temporarily run from IMO to initialize other clocks */
Cy_SysClk_ClkPathSetSource(1UL, CY_SYSCLK_CLKPATH_IN_IMO);
@ -970,7 +970,7 @@ void init_cycfg_system(void)
Cy_SysClk_ClkPath1Init();
#endif
#endif
/* Configure Path Clocks */
#ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED
Cy_SysClk_ClkPath0Init();
@ -1017,21 +1017,21 @@ void init_cycfg_system(void)
#ifdef CY_CFG_SYSCLK_CLKPATH15_ENABLED
Cy_SysClk_ClkPath15Init();
#endif
/* Configure and enable FLL */
#ifdef CY_CFG_SYSCLK_FLL_ENABLED
Cy_SysClk_FllInit();
#endif
Cy_SysClk_ClkHf0Init();
#if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U))
#ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED
/* Apply the ClkPath1 user setting */
Cy_SysClk_ClkPath1Init();
#endif
#endif
/* Configure and enable PLLs */
#ifdef CY_CFG_SYSCLK_PLL0_ENABLED
Cy_SysClk_Pll0Init();
@ -1078,7 +1078,7 @@ void init_cycfg_system(void)
#ifdef CY_CFG_SYSCLK_PLL14_ENABLED
Cy_SysClk_Pll14Init();
#endif
/* Configure HF clocks */
#ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED
Cy_SysClk_ClkHf1Init();
@ -1125,53 +1125,53 @@ void init_cycfg_system(void)
#ifdef CY_CFG_SYSCLK_CLKHF15_ENABLED
Cy_SysClk_ClkHf15Init();
#endif
/* Configure miscellaneous clocks */
#ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED
Cy_SysClk_ClkTimerInit();
#endif
#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED
Cy_SysClk_ClkAltSysTickInit();
#endif
#ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED
Cy_SysClk_ClkPumpInit();
#endif
#ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED
Cy_SysClk_ClkBakInit();
#endif
/* Configure default enabled clocks */
#ifdef CY_CFG_SYSCLK_ILO_ENABLED
Cy_SysClk_IloInit();
#endif
#ifndef CY_CFG_SYSCLK_IMO_ENABLED
#error the IMO must be enabled for proper chip operation
#endif
#ifndef CY_CFG_SYSCLK_CLKHF0_ENABLED
#error the CLKHF0 must be enabled for proper chip operation
#endif
#endif /* defined(CY_DEVICE_SECURE) */
#ifdef CY_CFG_SYSCLK_MFO_ENABLED
Cy_SysClk_MfoInit();
#endif
#ifdef CY_CFG_SYSCLK_CLKMF_ENABLED
Cy_SysClk_ClkMfInit();
#endif
#if (!defined(CY_DEVICE_SECURE))
/* Set accurate flash wait states */
#if (defined (CY_CFG_PWR_ENABLED) && defined (CY_CFG_SYSCLK_CLKHF0_ENABLED))
Cy_SysLib_SetWaitStates(CY_CFG_PWR_USING_ULP != 0, CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ);
#endif
/* Update System Core Clock values for correct Cy_SysLib_Delay functioning */
SystemCoreClockUpdate();
#ifndef CY_CFG_SYSCLK_ILO_ENABLED
@ -1182,9 +1182,9 @@ void init_cycfg_system(void)
Cy_SysClk_IloDisable();
Cy_SysClk_IloHibernateOn(false);
#endif
#endif /* (!defined(CY_DEVICE_SECURE)) */
#if defined (CY_USING_HAL)
cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_0_obj);

2
bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/cybsp_doc.h
View File

@ -740,7 +740,7 @@ extern "C" {
/**
* \addtogroup group_bsp_pins_capsense Capsense
* \{
* Pins connected to CAPSENSE™ sensors on the board.
* Pins connected to CAPSENSEâ„¢ sensors on the board.
*/
#ifdef CYBSP_CSD_TX

4
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense.h
View File

@ -403,8 +403,8 @@
* </table>
*
* \note
* * To select values for the Scan mode and Sensor connection method parameters (for the fifth-generation of the CAPSENSE&trade; HW)
* navigate to the Advanced tab in the CAPSENSE&trade; Configurator tool, and then select the General settings sub-tab.
* * To select values for the Scan mode and Sensor connection method parameters (for the fifth-generation of the CAPSENSE&trade; HW)
* navigate to the Advanced tab in the CAPSENSE&trade; Configurator tool, and then select the General settings sub-tab.
*
* * For the forth-generation of the CAPSENSE&trade; HW, the IntDrv mode with the AMUX sensor connection type is available only.
*

302
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_centroid.c
View File

@ -110,13 +110,13 @@
* bigger sum of neighboring sensors is taken for further processing. Then the position
* is calculated using centroid algorithm with three sensors.
*
* At least two neighboring sensors should cross finger threshold. Then the algorithm
* At least two neighboring sensors should cross finger threshold. Then the algorithm
* is able to distinguish where real touch is located (direct part of slider or
* diplex part of slider) and corresponding position is reported. Otherwise no
* diplex part of slider) and corresponding position is reported. Otherwise no
* touch is reported.
*
* This function does not detect two or more touches.
*
*
* \param newTouch
* The pointer to the touch structure where found position is stored.
*
@ -135,7 +135,7 @@ void Cy_CapSense_DpCentroidDiplex(
const cy_stc_capsense_sensor_context_t * ptrSnsCxt;
const uint8_t * ptrDpxTable;
uint32_t snsCount = ptrWdConfig->numSns;
uint32_t maxSum = 0u;
uint32_t maxDiff = 0u;
uint32_t maxIndex = CY_CAPSENSE_NO_LOCAL_MAX;
@ -144,10 +144,10 @@ void Cy_CapSense_DpCentroidDiplex(
int32_t denominator = 0;
uint32_t multiplier;
uint32_t offset;
threshold -= ptrWdConfig->ptrWdContext->hysteresis;
ptrDpxTable = ptrWdConfig->ptrDiplexTable;
/* Find maximum signal */
ptrSnsCxt = ptrWdConfig->ptrSnsContext;
for (snsIndex = 0u; snsIndex < snsCount; snsIndex++)
@ -183,7 +183,7 @@ void Cy_CapSense_DpCentroidDiplex(
}
}
}
if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u))
{
multiplier = (uint32_t)ptrWdConfig->xResolution << 8u;
@ -198,10 +198,10 @@ void Cy_CapSense_DpCentroidDiplex(
multiplier /= (snsCount << 1u);
offset = multiplier >> 1u;
}
denominator = (int32_t)maxSum;
denominator = ((numerator * (int32_t)multiplier) / denominator) + (((int32_t)maxIndex * (int32_t)multiplier) + (int32_t)offset);
/* Round result and shift 8 bits left */
newTouch->numPosition = CY_CAPSENSE_POSITION_ONE;
newTouch->ptrPosition[0u].x = (uint16_t)(((uint32_t)denominator + CY_CAPSENSE_CENTROID_ROUND_VALUE) >> 8u);
@ -224,12 +224,12 @@ void Cy_CapSense_DpCentroidDiplex(
* Finds touch position of a Linear slider widget.
*
* In scope of position searching this function finds the local maximum with the
* highest raw count. If such maximums are more than one, then the maximum with
* highest raw count. If such maximums are more than one, then the maximum with
* bigger sum of neighboring sensors is taken for further processing. Then the position
* is calculated using centroid algorithm with three sensors.
*
* This function does not detect two or more touches.
*
*
* \param newTouch
* The pointer to the touch structure where the found position is stored.
*
@ -273,7 +273,7 @@ void Cy_CapSense_DpCentroidLinear(
}
ptrSnsCxt++;
}
/* Find index of sensor with maximum signal */
ptrSnsCxt = ptrWdConfig->ptrSnsContext;
for (snsIndex = 0u; snsIndex < snsCount; snsIndex++)
@ -295,9 +295,9 @@ void Cy_CapSense_DpCentroidLinear(
}
ptrSnsCxt++;
}
if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u))
{
{
/* Calculate position */
multiplier = (uint32_t)ptrWdConfig->xResolution << 8u;
if (0u == (ptrWdConfig->centroidConfig & CY_CAPSENSE_CALC_METHOD_MASK))
@ -310,9 +310,9 @@ void Cy_CapSense_DpCentroidLinear(
multiplier /= snsCount;
offset = multiplier >> 1u;
}
denominator = (int32_t)maxSum;
denominator = ((numerator * (int32_t)multiplier) / denominator) + (((int32_t)maxIndex * (int32_t)multiplier) + (int32_t)offset);
denominator = ((numerator * (int32_t)multiplier) / denominator) + (((int32_t)maxIndex * (int32_t)multiplier) + (int32_t)offset);
/* Round result and shift 8 bits left */
newTouch->numPosition = CY_CAPSENSE_POSITION_ONE;
@ -340,12 +340,12 @@ void Cy_CapSense_DpCentroidLinear(
* Finds touch position of a Radial slider widget.
*
* In scope of position searching this function finds the local maximum with the
* highest raw count. If such maximums are more than one, then the maximum with
* highest raw count. If such maximums are more than one, then the maximum with
* bigger sum of neighboring sensors is taken for further processing. Then the position
* is calculated using centroid algorithm with three sensors.
*
* This function does not detect two or more touches.
*
*
* \param newTouch
* The pointer to the touch structure where found position is stored.
*
@ -359,7 +359,7 @@ void Cy_CapSense_DpCentroidRadial(
{
uint32_t snsIndex = 0u;
uint32_t snsCount = ptrWdConfig->numSns;
uint32_t diffM;
uint32_t diffP;
uint32_t sum = 0u;
@ -370,7 +370,7 @@ void Cy_CapSense_DpCentroidRadial(
int32_t numerator = 0;
int32_t denominator = 0;
uint32_t multiplier;
if (1u == (ptrWdConfig->centroidConfig & CY_CAPSENSE_CENTROID_NUMBER_MASK))
{
/* Find maximum signal */
@ -383,7 +383,7 @@ void Cy_CapSense_DpCentroidRadial(
}
ptrSnsCxt++;
}
/* Find index of sensor with maximum signal */
ptrSnsCxt = ptrWdConfig->ptrSnsContext;
for (snsIndex = 0u; snsIndex < snsCount; snsIndex++)
@ -407,10 +407,10 @@ void Cy_CapSense_DpCentroidRadial(
}
if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u))
{
{
/* Calculate position */
multiplier = ((uint32_t)ptrWdConfig->xResolution << 8u) / snsCount;
denominator = (int32_t)maxSum;
denominator = ((numerator * (int32_t)multiplier) / denominator) + ((int32_t)maxIndex * (int32_t)multiplier);
@ -443,12 +443,12 @@ void Cy_CapSense_DpCentroidRadial(
* Finds touch position of a CSD Touchpad widget.
*
* In scope of position searching this function finds the local maximum with the
* highest raw count. If such maximums are more than one, then the maximum with
* highest raw count. If such maximums are more than one, then the maximum with
* bigger sum of neighboring sensors is taken for further processing. Then the position
* is calculated using centroid algorithm with three sensors.
*
* This function does not detect two or more touches.
*
*
* \param newTouch
* The pointer to the touch structure where found position is stored.
*
@ -505,7 +505,7 @@ void Cy_CapSense_DpCentroidTouchpad(
}
ptrSnsCxt++;
}
/* Find index of sensor with maximum signal */
ptrSnsCxt = ptrWdConfig->ptrSnsContext;
for (snsIndex = 0u; snsIndex < colCount; snsIndex++)
@ -528,9 +528,9 @@ void Cy_CapSense_DpCentroidTouchpad(
}
ptrSnsCxt++;
}
if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u))
{
{
/* Calculate position */
multiplier = (uint32_t)ptrWdConfig->xResolution << 8u;
if (0u == (ptrWdConfig->centroidConfig & CY_CAPSENSE_CALC_METHOD_MASK))
@ -638,11 +638,11 @@ void Cy_CapSense_DpCentroidTouchpad(
* Function Name: Cy_CapSense_DpAdvancedCentroidTouchpad
****************************************************************************//**
*
* Finds touch position of a CSD touchpad widget using an advanced centroid
* Finds touch position of a CSD touchpad widget using an advanced centroid
* algorithm.
*
* This function is able to detect two touch positions using a centroid algorithm
* with matrix 5*5 of sensors and virtual sensors on the edges.
* with matrix 5*5 of sensors and virtual sensors on the edges.
*
* \param newTouch
* The pointer to the touch structure where the found position is stored.
@ -659,7 +659,7 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad(
const cy_stc_capsense_sensor_context_t * ptrSnsIndex = ptrWdConfig->ptrSnsContext;
uint16_t * ptrDiffIndex = ptrWdConfig->ptrCsdTouchBuffer;
cy_stc_capsense_advanced_centroid_config_t advCfg;
advCfg.fingerTh = ptrWdConfig->ptrWdContext->fingerTh;
advCfg.penultimateTh = ptrWdConfig->advConfig.penultimateTh;
advCfg.virtualSnsTh = ptrWdConfig->advConfig.virtualSnsTh;
@ -670,7 +670,7 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad(
advCfg.crossCouplingTh = ptrWdConfig->advConfig.crossCouplingTh;
advCfg.edgeCorrectionEn = 0u;
advCfg.twoFingersEn = 0u;
if ((ptrWdConfig->centroidConfig & CY_CAPSENSE_CENTROID_NUMBER_MASK) > CY_CAPSENSE_POSITION_ONE)
{
advCfg.twoFingersEn = 1u;
@ -683,10 +683,10 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad(
{
ptrDiffIndex[i] = ptrSnsIndex[i].diff;
}
Cy_CapSense_AdvancedCentroidGetTouchCoordinates_Lib(
&advCfg,
ptrWdConfig->ptrCsdTouchBuffer,
&advCfg,
ptrWdConfig->ptrCsdTouchBuffer,
newTouch);
}
#endif /* (CY_CAPSENSE_DISABLE != CY_CAPSENSE_ADVANCED_CENTROID_5X5_EN) */
@ -699,11 +699,11 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad(
*
* Finds up to five local maximums for CSX Touchpad.
*
* This function takes an array of differences of the specified widget and
* This function takes an array of differences of the specified widget and
* finds up to five local maximums. The found maximums are stored in the CSX buffer
* ptrCsxTouchBuffer \ref cy_stc_capsense_csx_touch_buffer_t.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -729,13 +729,13 @@ void Cy_CapSense_DpFindLocalMaxDd(
{
ptrNewPeak[rx].id = CY_CAPSENSE_CSX_TOUCHPAD_ID_UNDEFINED;
}
ptrNewPeak = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[0u];
/* Go through all Rx electrodes */
for (rx = 0u; rx <= lastRx; rx++)
{
/*
* Go through all Tx and RX (changed above) electrodes intersections
/*
* Go through all Tx and RX (changed above) electrodes intersections
* and check whether the local maximum requirement is met.
*/
for (tx = 0u; tx <= lastTx; tx++)
@ -744,9 +744,9 @@ void Cy_CapSense_DpFindLocalMaxDd(
currDiff = ptrSnsCxt->diff;
if (thresholdOff <= (uint32_t)currDiff)
{
/*
* Check local maximum requirement: Comparing raw count
* of a local maximum candidate with raw counts of sensors
/*
* Check local maximum requirement: Comparing raw count
* of a local maximum candidate with raw counts of sensors
* from the previous row.
*/
if (rx > 0u)
@ -776,10 +776,10 @@ void Cy_CapSense_DpFindLocalMaxDd(
}
}
}
/*
* Check local maximum requirement: Comparing raw count
* of a local maximum candidate with raw counts of sensors
* from the next row.
/*
* Check local maximum requirement: Comparing raw count
* of a local maximum candidate with raw counts of sensors
* from the next row.
*/
if ((0u == proceed) && (rx < lastRx))
{
@ -808,9 +808,9 @@ void Cy_CapSense_DpFindLocalMaxDd(
}
}
}
/*
* Check local maximum requirement: Comparing raw count
* of a local maximum candidate with raw counts of sensors
/*
* Check local maximum requirement: Comparing raw count
* of a local maximum candidate with raw counts of sensors
* from the same row and the next column. */
if ((0u == proceed) && (tx < lastTx))
{
@ -867,11 +867,11 @@ void Cy_CapSense_DpFindLocalMaxDd(
*
* Calculates the position for each local maximum using the 3x3 algorithm.
*
* This function calculates position coordinates of found local maximums.
* The found positions are stored in the CSX buffer ptrCsxTouchBuffer
* This function calculates position coordinates of found local maximums.
* The found positions are stored in the CSX buffer ptrCsxTouchBuffer
* \ref cy_stc_capsense_csx_touch_buffer_t.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -906,10 +906,10 @@ void Cy_CapSense_DpCalcTouchPadCentroid(
/* Fill each row */
for (i = 0u; i < CY_CAPSENSE_CSX_TOUCHPAD_CENTROID_LENGTH; i++)
{
/*
/*
* The first condition could be valid only when local max on the first row (0 row) of Touchpad
* The second condition could be valid only when local max on the last row of Touchpad
* Then corresponding row (zero or the last) of 3x3 array is initialized to 0u
* Then corresponding row (zero or the last) of 3x3 array is initialized to 0u
*/
if (((((int32_t)ptrNewPeak->x - 1) + (int32_t)i) < 0) ||
((((int32_t)ptrNewPeak->x - 1) + (int32_t)i) > (int32_t)lastRx))
@ -923,11 +923,11 @@ void Cy_CapSense_DpCalcTouchPadCentroid(
/* Fill each column */
for (j = 0u; j < CY_CAPSENSE_CSX_TOUCHPAD_CENTROID_LENGTH; j++)
{
/*
* The first condition could be valid only when local max
* on the first column (0 row) of Touchpad. The second
* condition could be valid only when local max on the last
* column of Touchpad. Then corresponding column (zero or
/*
* The first condition could be valid only when local max
* on the first column (0 row) of Touchpad. The second
* condition could be valid only when local max on the last
* column of Touchpad. Then corresponding column (zero or
* the last) of 3x3 array is initialized to 0u.
*/
if (((((int32_t)ptrNewPeak->y - 1) + (int32_t)j) < 0) ||
@ -959,7 +959,7 @@ void Cy_CapSense_DpCalcTouchPadCentroid(
}
/* The X position is calculated.
* The weightedSumX value depends on a finger position shifted regarding
* The weightedSumX value depends on a finger position shifted regarding
* the X electrode (ptrNewTouches.x).
* The multiplier ptrWdConfig->xCentroidMultiplier is a short from:
* CY_CAPSENSE_TOUCHPAD0_X_RESOLUTION * 256u) / (CY_CAPSENSE_TOUCHPAD0_NUM_RX - CONFIG))
@ -1020,11 +1020,11 @@ void Cy_CapSense_DpCalcTouchPadCentroid(
* - applies debounce filters.
* - suppresses excessive touches.
*
* The final touch data are stored in the CSX buffer ptrCsxTouchBuffer
* \ref cy_stc_capsense_csx_touch_buffer_t. This function should be called
* The final touch data are stored in the CSX buffer ptrCsxTouchBuffer
* \ref cy_stc_capsense_csx_touch_buffer_t. This function should be called
* each scan cycle even when touch is not detected.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -1033,22 +1033,22 @@ void Cy_CapSense_DpTouchTracking(
const cy_stc_capsense_widget_config_t * ptrWdConfig)
{
uint32_t i;
const cy_stc_capsense_position_t * ptrNewPeak;
cy_stc_capsense_position_t * ptrOldPeak;
uint32_t newTouchNum = ptrWdConfig->ptrCsxTouchBuffer->newPeakNumber;
uint32_t oldTouchNum = ptrWdConfig->ptrCsxTouchHistory->oldPeakNumber;
int8_t * fingerPosIndex = &ptrWdConfig->ptrCsxTouchBuffer->fingerPosIndexMap[0u];
if ((0u != newTouchNum) || (0u != oldTouchNum))
{
/* Initialize variables */
ptrWdConfig->ptrCsxTouchBuffer->newActiveIdsMask = 0u;
/* Getting active touch IDs from previous scan */
ptrWdConfig->ptrCsxTouchHistory->oldActiveIdsMask = 0u;
ptrOldPeak = &ptrWdConfig->ptrCsxTouchHistory->oldPeak[0u];
for (i = 0u; i < oldTouchNum; i++)
{
@ -1133,7 +1133,7 @@ void Cy_CapSense_DpTouchTracking(
Cy_CapSense_TouchDownDebounce(ptrWdConfig);
}
Cy_CapSense_SortByAge(ptrWdConfig);
newTouchNum = ptrWdConfig->ptrCsxTouchBuffer->newPeakNumber;
@ -1161,23 +1161,23 @@ void Cy_CapSense_DpTouchTracking(
* Transfers a touch from history array into active current array.
*
* This function transfers touch specified by oldIndex from history touch array
* by copying its ID, increments age and decrements debounce (if debounce > 0)
* by copying its ID, increments age and decrements debounce (if debounce > 0)
* parameters into currently active touch structure
*
* \param newIndex
* \param newIndex
* The touch index of touch array in the active touch structure.
*
* \param oldIndex
* \param oldIndex
* The touch index of touch array in the history touch structure.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
*******************************************************************************/
static void Cy_CapSense_TransferTouch(
uint32_t newIndex,
uint32_t oldIndex,
uint32_t newIndex,
uint32_t oldIndex,
const cy_stc_capsense_widget_config_t * ptrWdConfig)
{
uint32_t touchId;
@ -1189,7 +1189,7 @@ static void Cy_CapSense_TransferTouch(
touchId = (uint32_t)ptrOldPeak->id & CY_CAPSENSE_CSX_TOUCHPAD_ID_MASK;
touchAge = ((uint32_t)ptrOldPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) >> CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT;
touchDebounce = ((uint32_t)ptrOldPeak->id & CY_CAPSENSE_CSX_TOUCHPAD_DEBOUNCE_MASK) >> CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT;
/* Increase AGE by 1 if possible */
if (touchAge < CY_CAPSENSE_CSX_TOUCHPAD_MAX_AGE)
{
@ -1200,7 +1200,7 @@ static void Cy_CapSense_TransferTouch(
{
touchDebounce--;
}
ptrNewPeak->id = (uint16_t)(touchId | (uint16_t)(touchDebounce << CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT));
ptrNewPeak->z &= (uint16_t)~CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK;
ptrNewPeak->z |= (uint16_t)(touchAge << CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT);
@ -1223,32 +1223,32 @@ static void Cy_CapSense_TransferTouch(
* \param newIndex
* The touch index of touch array in the active touch structure.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
*******************************************************************************/
static void Cy_CapSense_NewTouch(
uint32_t newIndex,
uint32_t newIndex,
const cy_stc_capsense_widget_config_t * ptrWdConfig)
{
uint32_t idx;
cy_stc_capsense_position_t * ptrNewPeak = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[newIndex];
/* Touch is not accepted */
if (0u == (ptrNewPeak->id & CY_CAPSENSE_CSX_TOUCHPAD_ID_ON_FAIL))
{
/* Create a bit map of ID's currently used and previously used and search for the new lowest ID */
idx = Cy_CapSense_GetLowestId(ptrWdConfig->ptrCsxTouchHistory->oldActiveIdsMask |
idx = Cy_CapSense_GetLowestId(ptrWdConfig->ptrCsxTouchHistory->oldActiveIdsMask |
ptrWdConfig->ptrCsxTouchBuffer->newActiveIdsMask);
/* Indicate that ID is now taken */
ptrWdConfig->ptrCsxTouchBuffer->newActiveIdsMask |= (uint8_t)(1u << idx);
/* Set AGE */
ptrNewPeak->z &= (uint16_t)~CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK;
ptrNewPeak->z |= CY_CAPSENSE_CSX_TOUCHPAD_AGE_START;
/* Set ID and Debounce */
ptrNewPeak->id = (uint16_t)idx | (uint16_t)(((uint16_t)ptrWdConfig->ptrWdContext->onDebounce - 1u) << CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT);
}
@ -1263,10 +1263,10 @@ static void Cy_CapSense_NewTouch(
*
* Returns the lowest available free touch ID.
*
* \param idMask
* \param idMask
* The mask of IDs used in active and history touch structures.
*
* \return
* \return
* Returns the lowest available touch ID. If no ID is available,
* CY_CAPSENSE_CSX_TOUCHPAD_ID_ABSENT is returned.
*
@ -1308,7 +1308,7 @@ __STATIC_INLINE uint8_t Cy_CapSense_GetLowestId(uint8_t idMask)
* the touchdown mask is cleared. Otherwise the age of the new finger is cleared
* (it is considered as not active).
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -1338,37 +1338,37 @@ __STATIC_INLINE void Cy_CapSense_TouchDownDebounce(
* Function Name: Cy_CapSense_CalcDistance
****************************************************************************//**
*
* Calculates squared distance between history and active touch structures
* Calculates squared distance between history and active touch structures
* pointed by the input parameters.
*
* \param newIndex
* \param newIndex
* The index of touch in the active touch structure.
*
* \param oldIndex
* \param oldIndex
* The index of touch in the history touch structure.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
* \return
* \return
* Returns the squared distance.
*
*******************************************************************************/
static uint32_t Cy_CapSense_CalcDistance(
uint32_t newIndex,
uint32_t newIndex,
uint32_t oldIndex,
const cy_stc_capsense_widget_config_t * ptrWdConfig)
{
const cy_stc_capsense_position_t * ptrNewPeak = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[newIndex];
const cy_stc_capsense_position_t * ptrOldPeak = &ptrWdConfig->ptrCsxTouchHistory->oldPeak[oldIndex];
int32_t xDistance = (int32_t)(ptrOldPeak->x) - (int32_t)(ptrNewPeak->x);
int32_t yDistance = (int32_t)(ptrOldPeak->y) - (int32_t)(ptrNewPeak->y);
xDistance *= xDistance;
yDistance *= yDistance;
return ((uint32_t)xDistance + (uint32_t)yDistance);
}
#endif /* (CY_CAPSENSE_DISABLE != CY_CAPSENSE_CSX_TOUCHPAD_EN) */
@ -1379,19 +1379,19 @@ static uint32_t Cy_CapSense_CalcDistance(
* Function Name: Cy_CapSense_Hungarian
****************************************************************************//**
*
* Executes the Hungarian method on a distance map to track motion of two
* Executes the Hungarian method on a distance map to track motion of two
* touch sets (old touches vs new touches).
*
* This function uses the Hungarian method described in specification 001-63362.
* There is no bound checking on the parameters. It is the calling function's
* responsibility to ensure parameter validity.
* The function output is a fingerPosIndexMap array stored in the CSX buffer
* The function output is a fingerPosIndexMap array stored in the CSX buffer
* where associations between the previous and current touches are returned.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
*
*******************************************************************************/
static void Cy_CapSense_Hungarian(
const cy_stc_capsense_widget_config_t * ptrWdConfig)
@ -1402,9 +1402,9 @@ static void Cy_CapSense_Hungarian(
* be greater than or equal to 1.
*/
int32_t * col = &ptrBuffer->colMap[0u];
/*
/*
* Number of elements in row of distanceMap matrix. This value must be
* greater than or equal to colCount.
* greater than or equal to colCount.
*/
int32_t * row = &ptrBuffer->rowMap[0u];
int32_t * mins = &ptrBuffer->minsMap[0u];
@ -1418,9 +1418,9 @@ static void Cy_CapSense_Hungarian(
* corresponds to the 2nd coordinate data set. Each element in
* distanceMap is the square of the distance between the
* corresponding coordinates in the 1st and 2nd data set.
*/
*/
int32_t * distance = &ptrBuffer->distanceMap[0u];
int32_t delta = 0;
int32_t colValue = 0;
int32_t markedI = 0;
@ -1432,7 +1432,7 @@ static void Cy_CapSense_Hungarian(
uint32_t rowCount = ptrBuffer->newPeakNumber;
uint32_t colCount = ptrWdConfig->ptrCsxTouchHistory->oldPeakNumber;
/* Fill distance map */
if (rowCount >= colCount)
{
@ -1466,7 +1466,7 @@ static void Cy_CapSense_Hungarian(
row[i] = 0;
markIndices[i] = -1;
}
/* Go through all columns */
for (i = (int32_t)colCount; i-- > 0;)
{
@ -1563,11 +1563,11 @@ static void Cy_CapSense_Hungarian(
****************************************************************************//**
*
* Sorts the new touch array by:
* 1. age (in decrementing order)
* and
* 1. age (in decrementing order)
* and
* 2. id (in incrementing order) fields.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -1592,7 +1592,7 @@ __STATIC_INLINE void Cy_CapSense_SortByAge(
{
for (j = (newTouchNum - 1u); j > i; j--)
{
/*
/*
* Check the touch records from the last to the current.
* If the touch record is valid, then replace the current touch record.
*/
@ -1632,7 +1632,7 @@ __STATIC_INLINE void Cy_CapSense_SortByAge(
{
ptrNewPeakJ = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[j];
/* If next touches have higher age or lower id with the same age then swap touches */
if (((ptrNewPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) < (ptrNewPeakJ->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK)) ||
if (((ptrNewPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) < (ptrNewPeakJ->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK)) ||
(((ptrNewPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) == (ptrNewPeakJ->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK)) && (ptrNewPeak->id > ptrNewPeakJ->id)))
{
/* Swap touches */
@ -1654,10 +1654,10 @@ __STATIC_INLINE void Cy_CapSense_SortByAge(
*
* Copies content from the source touch structure to the destination touch structure.
*
* \param destination
* \param destination
* The pointer to the destination touch structure \ref cy_stc_capsense_position_t.
*
* \param source
* \param source
* The pointer to the source touch structure \ref cy_stc_capsense_position_t.
*
*******************************************************************************/
@ -1675,14 +1675,14 @@ static void Cy_CapSense_CopyTouchRecord(
* Function Name: Cy_CapSense_DpFilterTouchRecord
****************************************************************************//**
*
* Filters position data of every valid touch if enabled and copies data into
* Filters position data of every valid touch if enabled and copies data into
* public touch array.
*
* This function checks every touch in the new touch structure. If the touch is
* valid (valid id and age > 0), then touch is filtered if the filter is enabled.
* This function checks every touch in the new touch structure. If the touch is
* valid (valid id and age > 0), then touch is filtered if the filter is enabled.
* At the end, the corresponding fields are updated in the public touch structure.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -1712,8 +1712,8 @@ void Cy_CapSense_DpFilterTouchRecord(
/* Define number of touches that should be reported */
for (i = 0u; i < CY_CAPSENSE_MAX_CENTROIDS; i++)
{
/*
* Age must be higher than 0 otherwise the touch does not pass
/*
* Age must be higher than 0 otherwise the touch does not pass
* debounce procedure. It exists in the array for correct
* touch tracking and debouncing.
*/
@ -1723,19 +1723,19 @@ void Cy_CapSense_DpFilterTouchRecord(
}
ptrNewPeak++;
}
maxTouch = (uint32_t)ptrWdConfig->centroidConfig & CY_CAPSENSE_CENTROID_NUMBER_MASK;
if (reportedTouchNum > maxTouch)
{
reportedTouchNum = maxTouch;
}
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_CSX_POSITION_FILTER_EN)
if (0u != (ptrWdConfig->posFilterConfig & CY_CAPSENSE_POSITION_FILTERS_MASK))
{
filterSize = (ptrWdConfig->posFilterConfig & CY_CAPSENSE_POSITION_FILTERS_SIZE_MASK) >>
CY_CAPSENSE_POSITION_FILTERS_SIZE_OFFSET;
/* Go through all new touches */
ptrNewPeak = ptrWdConfig->ptrCsxTouchBuffer->newPeak;
for (i = 0u; i < reportedTouchNum; i++)
@ -1797,7 +1797,7 @@ void Cy_CapSense_DpFilterTouchRecord(
for (i = 0u; i < maxTouch; i++)
{
ptrWdTouch->id = CY_CAPSENSE_CSX_TOUCHPAD_ID_UNDEFINED;
if (i < reportedTouchNum)
{
/* Report touch to the data structure */
@ -1809,7 +1809,7 @@ void Cy_CapSense_DpFilterTouchRecord(
ptrNewPeak++;
ptrWdTouch++;
}
ptrWdConfig->ptrWdContext->wdTouch.numPosition = (uint8_t)reportedTouchNum;
if (0u == reportedTouchNum)
{
@ -1838,7 +1838,7 @@ void Cy_CapSense_DpFilterTouchRecord(
* position values.
*
* \param ptrHistory
* The pointer to the position structure that holds previous historical
* The pointer to the position structure that holds previous historical
* position values.
*
*******************************************************************************/
@ -1848,7 +1848,7 @@ void Cy_CapSense_InitPositionFilters(
cy_stc_capsense_position_t * ptrHistory)
{
cy_stc_capsense_position_t * ptrHistoryIndex = ptrHistory;
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_POS_MEDIAN_FILTER_EN)
if (0u != (filterConfig & CY_CAPSENSE_POSITION_MED_MASK))
{
@ -1898,10 +1898,10 @@ void Cy_CapSense_InitPositionFilters(
* Function Name: Cy_CapSense_RunPositionFilters
****************************************************************************//**
*
* Applies enabled filters to position specified by ptrInput argument and stores
* Applies enabled filters to position specified by ptrInput argument and stores
* history into ptrHistory.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -1910,13 +1910,13 @@ void Cy_CapSense_InitPositionFilters(
* position values.
*
* \param ptrHistory
* The pointer to the position structure that holds previous historical
* The pointer to the position structure that holds previous historical
* position values.
*
*******************************************************************************/
void Cy_CapSense_RunPositionFilters(
const cy_stc_capsense_widget_config_t * ptrWdConfig,
cy_stc_capsense_position_t * ptrInput,
cy_stc_capsense_position_t * ptrInput,
cy_stc_capsense_position_t * ptrHistory)
{
#if (CY_CAPSENSE_POS_MEDIAN_FILTER_EN || CY_CAPSENSE_POS_AVERAGE_FILTER_EN)
@ -1996,11 +1996,11 @@ void Cy_CapSense_RunPositionFilters(
* Function Name: Cy_CapSense_RunPositionFiltersRadial
****************************************************************************//**
*
* Applies enabled filters to position specified by the ptrInput argument and stores
* history into ptrHistory. Filtering considers specific widget type where
* the next value after maximum position is zero and vise versa.
* Applies enabled filters to position specified by the ptrInput argument and stores
* history into ptrHistory. Filtering considers specific widget type where
* the next value after maximum position is zero and vise versa.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*
@ -2009,7 +2009,7 @@ void Cy_CapSense_RunPositionFilters(
* position values.
*
* \param ptrHistory
* The pointer to the position structure that holds previous historical
* The pointer to the position structure that holds previous historical
* position values.
*
*******************************************************************************/
@ -2019,15 +2019,15 @@ void Cy_CapSense_RunPositionFiltersRadial(
cy_stc_capsense_position_t * ptrHistory)
{
/*
* If new position crosses the zero point in one or another direction,
* the position variable with the smaller value is increased by the
* slider resolution. This is done for the proper filtering. For
* If new position crosses the zero point in one or another direction,
* the position variable with the smaller value is increased by the
* slider resolution. This is done for the proper filtering. For
* example, xResolution = 100, currPosition = 95, newPosition = 5.
* If no actions are taken, then the average filter will give a value of
* 50 - which is wrong. But if the position values are adjusted as
* mentioned here, we will get newPosition equal 105 and the average
* will be 100. Later this filtered value will be adjusted further
* to not cross the xResolution and it will end up with 0u - which
* If no actions are taken, then the average filter will give a value of
* 50 - which is wrong. But if the position values are adjusted as
* mentioned here, we will get newPosition equal 105 and the average
* will be 100. Later this filtered value will be adjusted further
* to not cross the xResolution and it will end up with 0u - which
* is correct average result for the provided example.
*/
@ -2050,7 +2050,7 @@ void Cy_CapSense_RunPositionFiltersRadial(
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_POS_IIR_FILTER_EN)
uint32_t coeffIIR = (uint32_t)(filterCfg & CY_CAPSENSE_POSITION_IIR_COEFF_MASK) >> CY_CAPSENSE_POSITION_IIR_COEFF_OFFSET;
#endif
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_POS_MEDIAN_FILTER_EN)
if (0u != (filterCfg & CY_CAPSENSE_POSITION_MED_MASK))
{
@ -2060,7 +2060,7 @@ void Cy_CapSense_RunPositionFiltersRadial(
/* Preserve the filter history without zero-cross correction */
ptrHistoryIndex[1u].x = ptrHistoryIndex[0u].x;
ptrHistoryIndex[0u].x = (uint16_t)xPos;
/* Perform zero-cross correction */
if (z1 > (halfResolution + xPos))
{
@ -2116,8 +2116,8 @@ void Cy_CapSense_RunPositionFiltersRadial(
/*
* IIR filter can accumulate a delay up to a full circle and even more.
* This situation is not supported by the middleware. If the difference
* between the new position and IIR filter history is bigger than
* This situation is not supported by the middleware. If the difference
* between the new position and IIR filter history is bigger than
* half of resolution, then all enabled position filters are reset.
*/
if(temp >= halfResolution)
@ -2160,11 +2160,11 @@ void Cy_CapSense_RunPositionFiltersRadial(
{
temp = xPos - ptrHistoryIndex->x;
}
/*
* IIR filter can accumulate delay up to full circle and even more.
* This situation is not supported by the middleware. If the difference
* between the new position and IIR filter history is bigger than
* This situation is not supported by the middleware. If the difference
* between the new position and IIR filter history is bigger than
* half of resolution, then all enabled position filters are reset.
*/
if(temp >= halfResolution)
@ -2248,7 +2248,7 @@ void Cy_CapSense_RunPositionFiltersRadial(
* \param newTouch
* The pointer to the touch structure.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure
* \ref cy_stc_capsense_widget_config_t.
*

2
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_common.h
View File

@ -832,7 +832,7 @@ extern "C" {
/** Return status \ref cy_capsense_status_t of CAPSENSE&trade; operation: Unable to perform calibration */
#define CY_CAPSENSE_STATUS_CALIBRATION_CHECK_FAIL (0x400u)
/** Return status \ref cy_capsense_status_t of CAPSENSE&trade; operation: Sense Clock Divider
* is out of the valid range for the specified Clock source configuration
* is out of the valid range for the specified Clock source configuration
*/
#define CY_CAPSENSE_STATUS_BAD_CLOCK_CONFIG (0x800u)
/** Return status \ref cy_capsense_status_t of CAPSENSE&trade; operation: Unknown */

16
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_control.h
View File

@ -54,21 +54,21 @@ cy_capsense_status_t Cy_CapSense_Restore(cy_stc_capsense_context_t * context);
cy_capsense_status_t Cy_CapSense_ProcessAllWidgets(
cy_stc_capsense_context_t * context);
cy_capsense_status_t Cy_CapSense_ProcessWidget(
uint32_t widgetId,
uint32_t widgetId,
cy_stc_capsense_context_t * context);
#if ((CY_CAPSENSE_DISABLE != CY_CAPSENSE_GESTURE_EN) || \
(CY_CAPSENSE_DISABLE != CY_CAPSENSE_BALLISTIC_MULTIPLIER_EN))
void Cy_CapSense_IncrementGestureTimestamp(cy_stc_capsense_context_t * context);
void Cy_CapSense_SetGestureTimestamp(
uint32_t value,
uint32_t value,
cy_stc_capsense_context_t * context);
#endif
void Cy_CapSense_Wakeup(const cy_stc_capsense_context_t * context);
cy_en_syspm_status_t Cy_CapSense_DeepSleepCallback(
cy_stc_syspm_callback_params_t * callbackParams,
cy_stc_syspm_callback_params_t * callbackParams,
cy_en_syspm_callback_mode_t mode);
cy_capsense_status_t Cy_CapSense_RegisterCallback(
@ -87,13 +87,13 @@ cy_capsense_status_t Cy_CapSense_UnRegisterCallback(
/******************************************************************************/
cy_capsense_status_t Cy_CapSense_ProcessWidgetExt(
uint32_t widgetId,
uint32_t mode,
uint32_t widgetId,
uint32_t mode,
cy_stc_capsense_context_t * context);
cy_capsense_status_t Cy_CapSense_ProcessSensorExt(
uint32_t widgetId,
uint32_t sensorId,
uint32_t mode,
uint32_t widgetId,
uint32_t sensorId,
uint32_t mode,
const cy_stc_capsense_context_t * context);
/** \} */

2
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_csx_v2.c
View File

@ -1372,7 +1372,7 @@ static void Cy_CapSense_CSXSetSnsClkFreq(uint32_t channelIndex, cy_stc_capsense_
{
snsClkDivider = 1u;
}
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN)
/* Change the divider based on the chId */
switch (channelIndex)

158
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_filter.c
View File

@ -57,21 +57,21 @@ static cy_capsense_status_t Cy_CapSense_CheckBaselineInv(
* Function Name: Cy_CapSense_UpdateAllBaselines
****************************************************************************//**
*
* Updates the baseline for all the sensors in all the widgets.
*
* Baselines must be updated after sensor scan to ignore low frequency
* changes in the sensor data caused by environment changes such as
* temperature from sensor status decision.
*
* Updates the baseline for all the sensors in all the widgets.
*
* Baselines must be updated after sensor scan to ignore low frequency
* changes in the sensor data caused by environment changes such as
* temperature from sensor status decision.
*
* This function ignores the widget enable bit in the widget status register.
* Calling this function multiple times without a new sensor scan leads to
* unexpected behavior and should be avoided.
*
* This function is called by Cy_CapSense_ProcessAllWidgets() and
* Cy_CapSense_ProcessWidget(), hence the application program need not use this
* function if any of the above functions is already used. This function can be
* Calling this function multiple times without a new sensor scan leads to
* unexpected behavior and should be avoided.
*
* This function is called by Cy_CapSense_ProcessAllWidgets() and
* Cy_CapSense_ProcessWidget(), hence the application program need not use this
* function if any of the above functions is already used. This function can be
* used for custom application implementation.
*
*
* \param context
* The pointer to the CAPSENSE&trade; context structure \ref cy_stc_capsense_context_t.
*
@ -100,20 +100,20 @@ cy_capsense_status_t Cy_CapSense_UpdateAllBaselines(
* Function Name: Cy_CapSense_UpdateWidgetBaseline
****************************************************************************//**
*
* Updates the baselines for all the sensors in a widget specified by
* the input parameter.
*
* This function performs exactly the same tasks as
* Updates the baselines for all the sensors in a widget specified by
* the input parameter.
*
* This function performs exactly the same tasks as
* Cy_CapSense_UpdateAllBaselines() but only for a specified widget.
*
* Calling this function multiple times without a new sensor scan leads to
* unexpected behavior and should be avoided. The application program need
* not use this function if the Cy_CapSense_UpdateAllBaselines(),
* Cy_CapSense_ProcessAllWidgets() or Cy_CapSense_ProcessWidget() functions
*
* Calling this function multiple times without a new sensor scan leads to
* unexpected behavior and should be avoided. The application program need
* not use this function if the Cy_CapSense_UpdateAllBaselines(),
* Cy_CapSense_ProcessAllWidgets() or Cy_CapSense_ProcessWidget() functions
* are already used.
*
* \param widgetId
* Specifies the ID number of the widget. A macro for the widget ID can be found
* Specifies the ID number of the widget. A macro for the widget ID can be found
* in the cycfg_capsense.h file defined as CY_CAPSENSE_<WIDGET_NAME>_WDGT_ID.
*
* \param context
@ -126,7 +126,7 @@ cy_capsense_status_t Cy_CapSense_UpdateAllBaselines(
*
*******************************************************************************/
cy_capsense_status_t Cy_CapSense_UpdateWidgetBaseline(
uint32_t widgetId,
uint32_t widgetId,
const cy_stc_capsense_context_t * context)
{
uint32_t snsIndex;
@ -145,26 +145,26 @@ cy_capsense_status_t Cy_CapSense_UpdateWidgetBaseline(
* Function Name: Cy_CapSense_UpdateSensorBaseline
****************************************************************************//**
*
* Updates the baseline for a sensor in a widget specified by the
* input parameters.
*
* This function performs exactly the same tasks as
* Cy_CapSense_UpdateAllBaselines() and Cy_CapSense_UpdateWidgetBaseline()
* Updates the baseline for a sensor in a widget specified by the
* input parameters.
*
* This function performs exactly the same tasks as
* Cy_CapSense_UpdateAllBaselines() and Cy_CapSense_UpdateWidgetBaseline()
* but only for a specified sensor.
*
* Calling this function multiple times without a new sensor scan leads to
* unexpected behavior and should be avoided. The application need not use
* this function if the Cy_CapSense_UpdateWidgetBaseline (),
* Cy_CapSense_UpdateAllBaselines (), Cy_CapSense_ProcessAllWidgets(),
*
* Calling this function multiple times without a new sensor scan leads to
* unexpected behavior and should be avoided. The application need not use
* this function if the Cy_CapSense_UpdateWidgetBaseline (),
* Cy_CapSense_UpdateAllBaselines (), Cy_CapSense_ProcessAllWidgets(),
* or Cy_CapSense_ProcessWidget() functions are already used.
*
* \param widgetId
* Specifies the ID number of the widget. A macro for the widget ID can be found
* Specifies the ID number of the widget. A macro for the widget ID can be found
* in the cycfg_capsense.h file defined as CY_CAPSENSE_<WIDGET_NAME>_WDGT_ID.
*
* \param sensorId
* Specifies the ID number of the sensor within the widget. A macro for the
* sensor ID within a specified widget can be found in the cycfg_capsense.h
* Specifies the ID number of the sensor within the widget. A macro for the
* sensor ID within a specified widget can be found in the cycfg_capsense.h
* file defined as CY_CAPSENSE_<WIDGET_NAME>_SNS<SENSOR_NUMBER>_ID.
*
* \param context
@ -177,8 +177,8 @@ cy_capsense_status_t Cy_CapSense_UpdateWidgetBaseline(
*
*******************************************************************************/
cy_capsense_status_t Cy_CapSense_UpdateSensorBaseline(
uint32_t widgetId,
uint32_t sensorId,
uint32_t widgetId,
uint32_t sensorId,
const cy_stc_capsense_context_t * context)
{
uint32_t result;
@ -360,19 +360,19 @@ cy_capsense_status_t Cy_CapSense_FtUpdateBaseline(
****************************************************************************//**
*
* Initializes the baselines of all the sensors of all the widgets.
*
* This function initializes baselines for all sensors and widgets in the project.
* It can also be used to re-initialize baselines at any time, however, note
* that all sensor data history information and sensor status shall be reset
*
* This function initializes baselines for all sensors and widgets in the project.
* It can also be used to re-initialize baselines at any time, however, note
* that all sensor data history information and sensor status shall be reset
* along with re-initialization of baseline.
*
* Following functions to initialize sensor and widgets and filter history
* should be called after initializing baseline for proper operation of
*
* Following functions to initialize sensor and widgets and filter history
* should be called after initializing baseline for proper operation of
* the CAPSENSE&trade; middleware:
* * Cy_CapSense_InitializeAllStatuses()
* * Cy_CapSense_InitializeAllFilters()
*
* These functions are called by the CapSense_Enable() function, hence it is
*
* These functions are called by the CapSense_Enable() function, hence it is
* not required to use this function if above function is used.
*
* \param context
@ -394,24 +394,24 @@ void Cy_CapSense_InitializeAllBaselines(cy_stc_capsense_context_t * context)
* Function Name: Cy_CapSense_InitializeWidgetBaseline
****************************************************************************//**
*
* Initializes the baselines of all the sensors in a specific widget.
*
* This function initializes baselines for all sensors in a specific widget
* in the project. It can also be used to re-initialize baselines at any time,
* however, note that all sensor data history information and sensor status
* Initializes the baselines of all the sensors in a specific widget.
*
* This function initializes baselines for all sensors in a specific widget
* in the project. It can also be used to re-initialize baselines at any time,
* however, note that all sensor data history information and sensor status
* should be reset along with re-initialization of baseline.
*
* The following functions to initialize sensor and widgets and filter history
* should be called after initializing baselines for proper operation of
*
* The following functions to initialize sensor and widgets and filter history
* should be called after initializing baselines for proper operation of
* middleware.
* * Cy_CapSense_InitializeWidgetStatus()
* * Cy_CapSense_InitializeWidgetFilter()
*
* These functions are called by CapSense_Enable() function, hence it is not
*
* These functions are called by CapSense_Enable() function, hence it is not
* required to use this function is above function is used.
*
*
* \param widgetId
* Specifies the ID number of the widget. A macro for the widget ID can be found
* Specifies the ID number of the widget. A macro for the widget ID can be found
* in the cycfg_capsense.h file defined as CY_CAPSENSE_<WIDGET_NAME>_WDGT_ID.
*
* \param context
@ -419,7 +419,7 @@ void Cy_CapSense_InitializeAllBaselines(cy_stc_capsense_context_t * context)
*
*******************************************************************************/
void Cy_CapSense_InitializeWidgetBaseline(
uint32_t widgetId,
uint32_t widgetId,
cy_stc_capsense_context_t * context)
{
uint32_t snsIndex;
@ -439,12 +439,12 @@ void Cy_CapSense_InitializeWidgetBaseline(
* by the input parameters.
*
* \param widgetId
* Specifies the ID number of the widget. A macro for the widget ID can be found
* Specifies the ID number of the widget. A macro for the widget ID can be found
* in the cycfg_capsense.h file defined as CY_CAPSENSE_<WIDGET_NAME>_WDGT_ID.
*
* \param sensorId
* Specifies the ID number of the sensor within the widget. A macro for the
* sensor ID within a specified widget can be found in the cycfg_capsense.h
* Specifies the ID number of the sensor within the widget. A macro for the
* sensor ID within a specified widget can be found in the cycfg_capsense.h
* file defined as CY_CAPSENSE_<WIDGET_NAME>_SNS<SENSOR_NUMBER>_ID.
*
* \param context
@ -452,8 +452,8 @@ void Cy_CapSense_InitializeWidgetBaseline(
*
*******************************************************************************/
void Cy_CapSense_InitializeSensorBaseline(
uint32_t widgetId,
uint32_t sensorId,
uint32_t widgetId,
uint32_t sensorId,
cy_stc_capsense_context_t * context)
{
uint32_t cxtOffset;
@ -484,7 +484,7 @@ void Cy_CapSense_InitializeSensorBaseline(
* Initializes the baseline history for a sensor indicated by an input
* parameter.
*
* \param ptrSnsContext
* \param ptrSnsContext
* The pointer to the sensor context structure.
*
*******************************************************************************/
@ -500,10 +500,10 @@ void Cy_CapSense_FtInitializeBaseline(cy_stc_capsense_sensor_context_t * ptrSnsC
* Function Name: Cy_CapSense_InitializeAllFilters
****************************************************************************//**
*
* Initializes (or re-initializes) all the firmware filter history, except
* Initializes (or re-initializes) all the firmware filter history, except
* the baseline.
*
* Calling this function is accompanied by
* Calling this function is accompanied by
* * Cy_CapSense_InitializeAllStatuses()
* * Cy_CapSense_InitializeAllBaselines()
*
@ -526,15 +526,15 @@ void Cy_CapSense_InitializeAllFilters(const cy_stc_capsense_context_t * context)
* Function Name: Cy_CapSense_InitializeWidgetFilter
****************************************************************************//**
*
* Initializes (or re-initializes) the raw count filter history of all
* Initializes (or re-initializes) the raw count filter history of all
* the sensors in a widget specified by the input parameter.
*
* Calling this function is accompanied by
* Calling this function is accompanied by
* - Cy_CapSense_InitializeWidgetStatus().
* - Cy_CapSense_InitializeWidgetBaseline().
*
* \param widgetId
* Specifies the ID number of the widget. A macro for the widget ID can be found
* Specifies the ID number of the widget. A macro for the widget ID can be found
* in the cycfg_capsense.h file defined as CY_CAPSENSE_<WIDGET_NAME>_WDGT_ID.
*
* \param context
@ -542,7 +542,7 @@ void Cy_CapSense_InitializeAllFilters(const cy_stc_capsense_context_t * context)
*
*******************************************************************************/
void Cy_CapSense_InitializeWidgetFilter(
uint32_t widgetId,
uint32_t widgetId,
const cy_stc_capsense_context_t * context)
{
uint32_t snsIndex;
@ -628,7 +628,7 @@ void Cy_CapSense_InitializeWidgetFilter(
*
* Initializes the IIR filter history.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure.
*
* \param ptrSnsContext
@ -755,8 +755,8 @@ void Cy_CapSense_RunMedianInternal(
uint16_t * ptrSnsRawHistory)
{
uint32_t temp = Cy_CapSense_FtMedian(
(uint32_t)ptrSnsContext->raw,
(uint32_t)ptrSnsRawHistory[0u],
(uint32_t)ptrSnsContext->raw,
(uint32_t)ptrSnsRawHistory[0u],
(uint32_t)ptrSnsRawHistory[1u]);
(void)ptrWdConfig;
@ -802,7 +802,7 @@ void Cy_CapSense_InitializeAverageInternal(
*
* Runs the average filter.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure.
*
* \param ptrSnsContext
@ -841,7 +841,7 @@ void Cy_CapSense_RunAverageInternal(
*
* Runs all enabled filters.
*
* \param ptrWdConfig
* \param ptrWdConfig
* The pointer to the widget configuration structure.
*
* \param ptrSnsContext
@ -870,7 +870,7 @@ void Cy_CapSense_FtRunEnabledFiltersInternal(
Cy_CapSense_RunMedianInternal(ptrWdConfig, ptrSnsContext, ptrSnsRawHistoryLocal);
ptrSnsRawHistoryLocal += CY_CAPSENSE_RC_MEDIAN_SIZE;
}
#endif
#endif
#if (CY_CAPSENSE_REGULAR_RC_IIR_FILTER_EN || CY_CAPSENSE_PROX_RC_IIR_FILTER_EN)
if(0u != (CY_CAPSENSE_RC_FILTER_IIR_EN_MASK & rawFilterCfg))

10
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_gesture_lib.h
View File

@ -172,11 +172,11 @@ typedef struct
cy_stc_capsense_gesture_position_t positionLast1; /**< Previous position of the first touch */
cy_stc_capsense_gesture_position_t position2; /**< Current position of the second touch */
cy_stc_capsense_gesture_position_t positionLast2; /**< Previous position of the second touch */
uint32_t timestamp; /**< Current timestamp */
uint16_t detected; /**< Detected gesture mask */
uint16_t direction; /**< Mask of direction of detected gesture */
cy_stc_capsense_ofrt_context_t ofrtContext; /**< One-finger rotate gesture context */
cy_stc_capsense_ofsl_context_t ofslContext; /**< One-finger scroll gesture context */
cy_stc_capsense_tfzm_context_t tfzmContext; /**< Two-finger zoom gesture context */
@ -211,7 +211,7 @@ typedef struct
* Initializes internal variables and states.
*
* \param context
* The pointer to the gesture context structure
* The pointer to the gesture context structure
* \ref cy_stc_capsense_gesture_context_t.
*
*******************************************************************************/
@ -235,11 +235,11 @@ void Cy_CapSense_Gesture_ResetState(
* The pointer to the array of positions \ref cy_stc_capsense_gesture_position_t.
*
* \param config
* The pointer to the gesture configuration structure
* The pointer to the gesture configuration structure
* \ref cy_stc_capsense_gesture_config_t.
*
* \param context
* The pointer to the gesture context structure
* The pointer to the gesture context structure
* \ref cy_stc_capsense_gesture_context_t.
*
*******************************************************************************/

62
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_lib.h
View File

@ -76,9 +76,9 @@ typedef struct
} cy_stc_capsense_advanced_centroid_config_t;
/** Declares position structure that keep information of a single touch.
* Depending on a widget type each structure field keeps the following
* Depending on a widget type each structure field keeps the following
* information:
*
*
* <table class="doxtable">
* <tr>
* <th>Structure Field</th>
@ -128,14 +128,14 @@ typedef struct
/** Declares touch structure used to store positions of Touchpad, Matrix buttons and Slider widgets */
typedef struct
{
cy_stc_capsense_position_t * ptrPosition; /**< Pointer to the array containing the position information.
cy_stc_capsense_position_t * ptrPosition; /**< Pointer to the array containing the position information.
A number of elements is defined by numPosition. */
uint8_t numPosition; /**< Total number of detected touches on a widget:
* * 0 - no touch is detected
* * 0 - no touch is detected
* * 1 - a single touch is detected
* * 2 - two touches are detected
* * 3 - three touches are detected
* * CY_CAPSENSE_POSITION_MULTIPLE - multiple touches are detected
* * CY_CAPSENSE_POSITION_MULTIPLE - multiple touches are detected
* and information in position structure should be ignored.
*/
} cy_stc_capsense_touch_t;
@ -280,7 +280,7 @@ typedef struct
*
*******************************************************************************/
void Cy_CapSense_AdaptiveFilterInitialize_Lib(
const cy_stc_capsense_adaptive_filter_config_t * config,
const cy_stc_capsense_adaptive_filter_config_t * config,
cy_stc_capsense_position_t * context);
/*******************************************************************************
@ -311,8 +311,8 @@ void Cy_CapSense_AdaptiveFilterInitialize_Lib(
*******************************************************************************/
void Cy_CapSense_AdaptiveFilterRun_Lib(
const cy_stc_capsense_adaptive_filter_config_t * config,
cy_stc_capsense_position_t * context,
uint32_t * currentX,
cy_stc_capsense_position_t * context,
uint32_t * currentX,
uint32_t * currentY);
/*******************************************************************************
@ -359,7 +359,7 @@ void Cy_CapSense_AdvancedCentroidGetTouchCoordinates_Lib(
*
*******************************************************************************/
void Cy_CapSense_BallisticMultiplier_Lib(
const cy_stc_capsense_ballistic_config_t * config,
const cy_stc_capsense_ballistic_config_t * config,
const cy_stc_capsense_touch_t * touch,
cy_stc_capsense_ballistic_delta_t * displacement,
uint32_t timestamp,
@ -385,9 +385,9 @@ void Cy_CapSense_BallisticMultiplier_Lib(
*
*******************************************************************************/
void Cy_CapSense_AlpRun_Lib(
cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj,
cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj,
const cy_stc_capsense_alp_fltr_config_t * ptrFilterConfig,
uint16_t * rawCount,
uint16_t * rawCount,
const uint16_t * baseline);
/*******************************************************************************
@ -404,7 +404,7 @@ void Cy_CapSense_AlpRun_Lib(
*
*******************************************************************************/
void Cy_CapSense_AlpInitialize_Lib(
cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj,
cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj,
const uint16_t * rawCount);
/*******************************************************************************
@ -443,18 +443,18 @@ uint32_t Cy_CapSense_AlpGetAverage_Lib(
* This internal function tunes the Sense Clock divider.
*
* Found IDAC code in Single IDAC mode is used to calculate the optimal SnsClk.
* The SnsClk divider is set to meet the requirement that the widget
* The SnsClk divider is set to meet the requirement that the widget
* clock period should be greater than or equal to:
* Period > 2*5*R*Cp,
* where:
* * Cp is the maximum sensor parasitic capacitance within the widget.
* * R is the user input value in the expression view of the customizer for a
* * R is the user input value in the expression view of the customizer for a
* series resistor.
*
* \param config
* The configuration structure.
*
* \return
* \return
* Cp in fF (10^-15)
*
*******************************************************************************/
@ -467,24 +467,24 @@ uint32_t Cy_CapSense_TunePrescalers_Lib(
*
* Configure scanning resolution to achieve the sufficient sensitivity.
*
* The function searches the lowest possible resolution that produces signal
* The function searches the lowest possible resolution that produces signal
* greater than 50 counts (Difference Counts) for user defined finger capacitance.
* In addition, function calculates 75%-value of the achieved signal, that becomes
* In addition, function calculates 75%-value of the achieved signal, that becomes
* candidate to finger threshold.
*
*
* Used equation to calculate signal at resolution 16-bit:
* sigPFCmax = (2^16-1) * vRef * snsClk * fingerCap / idacCurrent
*
* sigPFCmax contains absolute number of difference counts that user receives as
* sigPFCmax contains absolute number of difference counts that user receives as
* result of sensor scanning at corresponding resolution.
*
* This function requires non-zero Modulator IDAC code (if IDAC is equal to zero it
* This function requires non-zero Modulator IDAC code (if IDAC is equal to zero it
* is considered as non-valid use case).
*
* \param config
* The configuration structure.
*
* \return
* \return
* Scan resolution
*
*******************************************************************************/
@ -557,16 +557,16 @@ uint32_t Cy_CapSense_GetSmartSenseNumSubconversions(
* This function comprises an algorithm of thresholds auto-tune. The thresholds
* object contains updated thresholds after this API is called.
*
* \param ptrNoiseEnvelope
* \param ptrNoiseEnvelope
* The pointer to the noise-envelope object in RAM.
*
* \param ptrThresholds
* \param ptrThresholds
* The pointer to the thresholds object.
*
* \param sigPFC
* \param sigPFC
* Signal per finger capacitance.
*
* \param startFlag
* \param startFlag
* The flag indicates a first sensor in a widget.
*
*******************************************************************************/
@ -582,13 +582,13 @@ void Cy_CapSense_UpdateThresholds_Lib(
*
* Initializes the noise-envelope filter.
*
* \param rawCount
* \param rawCount
* The RawCount value for a given sensor.
*
* \param sigPFC
* \param sigPFC
* Signal per finger capacitance.
*
* \param ptrNoiseEnvelope
* \param ptrNoiseEnvelope
* The pointer to the noise-envelope RAM object of the sensor.
*
*******************************************************************************/
@ -603,13 +603,13 @@ void Cy_CapSense_InitializeNoiseEnvelope_Lib(
*
* Runs the noise-envelope filter.
*
* \param rawCount
* \param rawCount
* The RawCount value for a given sensor.
*
* \param sigPFC
* \param sigPFC
* Signal per finger capacitance.
*
* \param ptrNoiseEnvelope
* \param ptrNoiseEnvelope
* The pointer to the noise-envelope RAM object of the sensor.
*
*******************************************************************************/

4
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.c
View File

@ -709,7 +709,7 @@ uint32_t Cy_CapSense_DpProcessCsdWidgetRawCounts(
}
}
}
#if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN)
ptrSnsCxtSns = ptrWdCfg->ptrSnsContext;
for (snsIndex = ptrWdCfg->numSns; snsIndex-- > 0u;)
@ -1563,7 +1563,7 @@ void Cy_CapSense_DpProcessCsxTouchpad(
}
#endif /* (CY_CAPSENSE_DISABLE != CY_CAPSENSE_CSX_TOUCHPAD_EN) */
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN)
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN)
/*******************************************************************************
* Function Name: Cy_CapSense_RunMfsFiltering
****************************************************************************//**

2
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.h
View File

@ -166,7 +166,7 @@ void Cy_CapSense_DpUpdateThresholds(
const cy_stc_capsense_smartsense_csd_noise_envelope_t * ptrNoiseEnvelope,
uint32_t startFlag);
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN)
#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN)
void Cy_CapSense_RunMfsFiltering(
cy_stc_capsense_sensor_context_t * ptrSnsContext,
const cy_stc_capsense_context_t * context);

2
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_selftest.c
View File

@ -439,7 +439,7 @@ cy_en_capsense_bist_status_t Cy_CapSense_CheckIntegritySensorRawcount(
* function with the CY_CAPSENSE_BIST_SNS_INTEGRITY_MASK mask.
*
* To detect an electrical short or fault condition with resistance
* higher than 1500 ohm, the Cy_CapSense_MeasureCapacitanceSensor() (4th Generation)
* higher than 1500 ohm, the Cy_CapSense_MeasureCapacitanceSensor() (4th Generation)
* or Cy_CapSense_MeasureCapacitanceSensorElectrode() (5th Generation) function can
* be used as the fault condition affects the measured sensor capacitance.
*

92
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.c
View File

@ -44,73 +44,73 @@ void Cy_CapSense_TuInitialize(cy_stc_capsense_context_t * context)
* Function Name: Cy_CapSense_RunTuner
****************************************************************************//**
*
* Establishes synchronized operation between the CAPSENSE&trade; Middleware and
* Establishes synchronized operation between the CAPSENSE&trade; Middleware and
* the CAPSENSE&trade; Tuner tool.
*
* This function is called periodically in the application program. It serves
* the CAPSENSE&trade; Tuner tool requests and commands to synchronize the operation.
* Mostly, the best place to call this function is between processing and next
* the CAPSENSE&trade; Tuner tool requests and commands to synchronize the operation.
* Mostly, the best place to call this function is between processing and next
* scanning.
* If the user changes some parameters in the Tuner tool, the middleware is
* If the user changes some parameters in the Tuner tool, the middleware is
* re-started - the Tuner issues a restart command to be executed by this
* function.
*
*
* The Tuner interface supports two communication protocol: EZI2C and UART.
*
* To use an EZI2C-based tuner interface, only initialization of the EZI2C
* driver and interface is required in the application program. Refer to
* the I2C driver documentation for details of the protocol implementation
*
* To use an EZI2C-based tuner interface, only initialization of the EZI2C
* driver and interface is required in the application program. Refer to
* the I2C driver documentation for details of the protocol implementation
* and data package format by the EZI2C interface.
*
*
* To use a UART-based tuner interface, the user must:
* * Initialize the UART driver and interface
* * Use a callback function to facilitate data transmission and reception
* * Use a callback function to facilitate data transmission and reception
* using the UART driver.
*
* The application program must:
*
* The application program must:
* * Form a transmission data packet
* * Validate the data package on receiver implementation prior to passing
* * Validate the data package on receiver implementation prior to passing
* to the CAPSENSE&trade; Middleware.
*
* The transmission packet includes a CAPSENSE&trade; context structure sandwiched
* between a header (0x0D0A) and a tail (0x00FFFF), hence the package size
* is dependent on CAPSENSE&trade; context information. The receiver packet is
* 16-byte (fixed length) data explained under the
* Cy_CapSense_CheckTunerCmdIntegrity() function.
* The Cy_CapSense_CheckTunerCmdIntegrity() function is used to validate
*
* The transmission packet includes a CAPSENSE&trade; context structure sandwiched
* between a header (0x0D0A) and a tail (0x00FFFF), hence the package size
* is dependent on CAPSENSE&trade; context information. The receiver packet is
* 16-byte (fixed length) data explained under the
* Cy_CapSense_CheckTunerCmdIntegrity() function.
* The Cy_CapSense_CheckTunerCmdIntegrity() function is used to validate
* the received data package prior to passing it to the CAPSENSE&trade; middleware.
*
*
* Periodical calling the Cy_CapSense_RunTuner() function is:
* * mandatory for operation of a UART-based tuner interface. The middleware
* operation is always synchronous to the Tuner tool.
* * optional to periodically call Cy_CapSense_RunTuner() for EZI2C based
* * mandatory for operation of a UART-based tuner interface. The middleware
* operation is always synchronous to the Tuner tool.
* * optional to periodically call Cy_CapSense_RunTuner() for EZI2C based
* interface.
*
* If the Cy_CapSense_RunTuner() function is not periodically called by
* the application program, the middleware operation is asynchronous to
*
* If the Cy_CapSense_RunTuner() function is not periodically called by
* the application program, the middleware operation is asynchronous to
* the Tuner tool and the following disadvantages are applicable:
* * The raw counts displayed in the CAPSENSE&trade; Tuner tool may be filtered
* * The raw counts displayed in the CAPSENSE&trade; Tuner tool may be filtered
* and/or non-filtered. Result - noise and SNR measurements are not accurate.
* * The CAPSENSE&trade; Tuner tool can read sensor data (such as raw counts) from
* * The CAPSENSE&trade; Tuner tool can read sensor data (such as raw counts) from
* a scan multiply. Result - noise and SNR measurement are not accurate.
* * The CAPSENSE&trade; Tuner tool and Host controller should not change the
* * The CAPSENSE&trade; Tuner tool and Host controller should not change the
* parameters via the Tuner interface - in async mode this leads to
* abnormal behavior.
* * Displaying detected gestures may be missed.
*
* \warning
* This function executes received commands. Two commands
* CY_CAPSENSE_TU_CMD_ONE_SCAN_E and CY_CAPSENSE_TU_CMD_SUSPEND_E change
* the FW tuner module state to suspend. In this state, the function waits
* until CY_CAPSENSE_TU_CMD_RESUME_E is received. Use a callback mechanism
* of command receiving to avoid FW hanging. Refer to
* \warning
* This function executes received commands. Two commands
* CY_CAPSENSE_TU_CMD_ONE_SCAN_E and CY_CAPSENSE_TU_CMD_SUSPEND_E change
* the FW tuner module state to suspend. In this state, the function waits
* until CY_CAPSENSE_TU_CMD_RESUME_E is received. Use a callback mechanism
* of command receiving to avoid FW hanging. Refer to
* the Function Usage section for examples.
*
* \param context
* The pointer to the CAPSENSE&trade; context structure \ref cy_stc_capsense_context_t.
*
* \return
* The return parameter indicates whether a middleware re-start was executed
* The return parameter indicates whether a middleware re-start was executed
* by this function or not:
* - CY_CAPSENSE_STATUS_RESTART_DONE - Based on a received command, the
* CAPSENSE&trade; was re-initialized.
@ -118,22 +118,22 @@ void Cy_CapSense_TuInitialize(cy_stc_capsense_context_t * context)
* function.
*
* \funcusage
*
*
* An example of synchronization with the Tuner tool using EzI2C:
* \snippet capsense/snippet/main.c snippet_Cy_CapSense_Tuner_EzI2C
*
*
* An example of synchronization with the Tuner tool using UART.<br>
* Tuner Send callback implementation: Transmitting data through UART interface:
* \snippet capsense/snippet/main.c snippet_TunerSend
*
*
* Tuner Receive callback implementation: Receiving data from UART interface:
* \snippet capsense/snippet/main.c snippet_TunerReceive
*
*
* A part of the main.c FW flow with registering callbacks:
* \snippet capsense/snippet/main.c snippet_Cy_CapSense_Tuner_UART
*
*
* Refer to the \ref group_capsense_callbacks section for details.
*
*
*******************************************************************************/
uint32_t Cy_CapSense_RunTuner(cy_stc_capsense_context_t * context)
{
@ -155,7 +155,7 @@ uint32_t Cy_CapSense_RunTuner(cy_stc_capsense_context_t * context)
do
{
/*
/*
* ONE_SCAN command could be interpreted as two commands:
* RESUME till next call of this function and then
* SUSPEND till next command receiving.
@ -278,7 +278,7 @@ uint32_t Cy_CapSense_RunTuner(cy_stc_capsense_context_t * context)
}
} while ((uint8_t)CY_CAPSENSE_TU_FSM_SUSPENDED == tunerState);
return tunerStatus;
}

2
bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.h
View File

@ -90,7 +90,7 @@ void Cy_CapSense_TuInitialize(cy_stc_capsense_context_t * context);
* Function Name: Cy_CapSense_CheckCommandIntegrity
****************************************************************************//**
*
* \deprecated This function is obsolete and kept for backward compatibility only.
* \deprecated This function is obsolete and kept for backward compatibility only.
* The Cy_CapSense_CheckTunerCmdIntegrity() function should be used instead.
*
* \param commandPacket

34
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_01.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[15] =
{
51, 51, 43, 43, 43, 43, 43, 43, 43, 33, 33, 97, 29, 34, 38,
51, 51, 43, 43, 43, 43, 43, 43, 43, 33, 33, 97, 29, 34, 38,
};
const bool cyhal_is_mux_1to1[15] =
{
false, false, false, false, false, false, false, false, false, false, false, false, false, false, false,
false, false, false, false, false, false, false, false, false, false, false, false, false, false, false,
};
const _cyhal_trigger_source_psoc6_01_t cyhal_mux0_sources[51] =
@ -769,21 +769,21 @@ const _cyhal_trigger_source_psoc6_01_t cyhal_mux14_sources[38] =
const _cyhal_trigger_source_psoc6_01_t* cyhal_mux_to_sources[15] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
};
const uint8_t cyhal_dest_to_mux[479] =

38
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[17] =
{
87, 86, 135, 135, 223, 251, 27, 3, 127, 127, 12, 14, 1, 2, 5, 8, 8,
87, 86, 135, 135, 223, 251, 27, 3, 127, 127, 12, 14, 1, 2, 5, 8, 8,
};
const bool cyhal_is_mux_1to1[17] =
{
false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true,
false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true,
};
const _cyhal_trigger_source_psoc6_02_t cyhal_mux0_sources[87] =
@ -1361,23 +1361,23 @@ const _cyhal_trigger_source_psoc6_02_t cyhal_mux16_sources[8] =
const _cyhal_trigger_source_psoc6_02_t* cyhal_mux_to_sources[17] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
};
const uint8_t cyhal_dest_to_mux[107] =

42
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_03.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[19] =
{
87, 87, 136, 136, 227, 255, 27, 3, 139, 127, 2, 12, 14, 1, 7, 3, 8, 8, 1,
87, 87, 136, 136, 227, 255, 27, 3, 139, 127, 2, 12, 14, 1, 7, 3, 8, 8, 1,
};
const bool cyhal_is_mux_1to1[19] =
{
false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true,
false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true,
};
const _cyhal_trigger_source_psoc6_03_t cyhal_mux0_sources[87] =
@ -1398,25 +1398,25 @@ const _cyhal_trigger_source_psoc6_03_t cyhal_mux18_sources[1] =
const _cyhal_trigger_source_psoc6_03_t* cyhal_mux_to_sources[19] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
};
const uint8_t cyhal_dest_to_mux[108] =

46
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_04.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[21] =
{
87, 87, 139, 139, 229, 256, 27, 3, 139, 127, 2, 51, 12, 14, 1, 7, 3, 8, 8, 1, 1,
87, 87, 139, 139, 229, 256, 27, 3, 139, 127, 2, 51, 12, 14, 1, 7, 3, 8, 8, 1, 1,
};
const bool cyhal_is_mux_1to1[21] =
{
false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true,
false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true,
};
const _cyhal_trigger_source_psoc6_04_t cyhal_mux0_sources[87] =
@ -1467,27 +1467,27 @@ const _cyhal_trigger_source_psoc6_04_t cyhal_mux20_sources[1] =
const _cyhal_trigger_source_psoc6_04_t* cyhal_mux_to_sources[21] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
cyhal_mux19_sources,
cyhal_mux20_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
cyhal_mux19_sources,
cyhal_mux20_sources,
};
const uint8_t cyhal_dest_to_mux[112] =

34
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1B/source/triggers/cyhal_triggers_cyw20829.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[15] =
{
25, 54, 54, 46, 64, 3, 19, 2, 3, 3, 4, 5, 1, 1, 2,
25, 54, 54, 46, 64, 3, 19, 2, 3, 3, 4, 5, 1, 1, 2,
};
const bool cyhal_is_mux_1to1[15] =
{
false, false, false, false, false, false, false, false, false, false, true, true, true, true, true,
false, false, false, false, false, false, false, false, false, false, true, true, true, true, true,
};
const _cyhal_trigger_source_cyw20829_t cyhal_mux0_sources[25] =
@ -388,21 +388,21 @@ const _cyhal_trigger_source_cyw20829_t cyhal_mux14_sources[2] =
const _cyhal_trigger_source_cyw20829_t* cyhal_mux_to_sources[15] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
};
const uint8_t cyhal_dest_to_mux[59] =

52
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7100.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[24] =
{
69, 63, 82, 7, 0, 172, 94, 50, 9, 16, 188, 124, 156, 12, 72, 22, 2, 12, 6, 72, 72, 4, 4, 16,
69, 63, 82, 7, 0, 172, 94, 50, 9, 16, 188, 124, 156, 12, 72, 22, 2, 12, 6, 72, 72, 4, 4, 16,
};
const bool cyhal_is_mux_1to1[24] =
{
false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true,
false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true,
};
const _cyhal_trigger_source_xmc7100_t cyhal_mux0_sources[69] =
@ -1458,30 +1458,30 @@ const _cyhal_trigger_source_xmc7100_t cyhal_mux23_sources[16] =
const _cyhal_trigger_source_xmc7100_t* cyhal_mux_to_sources[24] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
NULL,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
cyhal_mux19_sources,
cyhal_mux20_sources,
cyhal_mux21_sources,
cyhal_mux22_sources,
cyhal_mux23_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
NULL,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
cyhal_mux19_sources,
cyhal_mux20_sources,
cyhal_mux21_sources,
cyhal_mux22_sources,
cyhal_mux23_sources,
};
const uint8_t cyhal_dest_to_mux[407] =

58
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7200.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[27] =
{
96, 77, 127, 7, 103, 168, 112, 69, 12, 16, 239, 178, 198, 15, 96, 22, 2, 15, 6, 96, 96, 5, 5, 20, 2, 2, 2,
96, 77, 127, 7, 103, 168, 112, 69, 12, 16, 239, 178, 198, 15, 96, 22, 2, 15, 6, 96, 96, 5, 5, 20, 2, 2, 2,
};
const bool cyhal_is_mux_1to1[27] =
{
false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true,
false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true,
};
const _cyhal_trigger_source_xmc7200_t cyhal_mux0_sources[96] =
@ -1936,33 +1936,33 @@ const _cyhal_trigger_source_xmc7200_t cyhal_mux26_sources[2] =
const _cyhal_trigger_source_xmc7200_t* cyhal_mux_to_sources[27] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
cyhal_mux19_sources,
cyhal_mux20_sources,
cyhal_mux21_sources,
cyhal_mux22_sources,
cyhal_mux23_sources,
cyhal_mux24_sources,
cyhal_mux25_sources,
cyhal_mux26_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux7_sources,
cyhal_mux8_sources,
cyhal_mux9_sources,
cyhal_mux10_sources,
cyhal_mux11_sources,
cyhal_mux12_sources,
cyhal_mux13_sources,
cyhal_mux14_sources,
cyhal_mux15_sources,
cyhal_mux16_sources,
cyhal_mux17_sources,
cyhal_mux18_sources,
cyhal_mux19_sources,
cyhal_mux20_sources,
cyhal_mux21_sources,
cyhal_mux22_sources,
cyhal_mux23_sources,
cyhal_mux24_sources,
cyhal_mux25_sources,
cyhal_mux26_sources,
};
const uint8_t cyhal_dest_to_mux[543] =

18
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1D/source/triggers/cyhal_triggers_explorer.c
View File

@ -32,12 +32,12 @@
const uint16_t cyhal_sources_per_mux[7] =
{
62, 3, 21, 73, 3, 65, 8,
62, 3, 21, 73, 3, 65, 8,
};
const bool cyhal_is_mux_1to1[7] =
{
false, false, false, false, false, false, true,
false, false, false, false, false, false, true,
};
const _cyhal_trigger_source_explorer_t cyhal_mux0_sources[62] =
@ -305,13 +305,13 @@ const _cyhal_trigger_source_explorer_t cyhal_mux6_sources[8] =
const _cyhal_trigger_source_explorer_t* cyhal_mux_to_sources[7] =
{
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
cyhal_mux0_sources,
cyhal_mux1_sources,
cyhal_mux2_sources,
cyhal_mux3_sources,
cyhal_mux4_sources,
cyhal_mux5_sources,
cyhal_mux6_sources,
};
const uint8_t cyhal_dest_to_mux[69] =

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal.h
View File

@ -59,7 +59,7 @@
/**
* \addtogroup group_hal HAL Drivers
* This section documents the drivers which form the stable API of the ModusToolbox™ HAL.
* This section documents the drivers which form the stable API of the ModusToolboxâ„¢ HAL.
* In order to remain portable across platforms and HAL versions, applications should
* rely only on functionality documented in this section.
*/

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_adc.h
View File

@ -273,7 +273,7 @@ cy_rslt_t cyhal_adc_init(cyhal_adc_t *obj, cyhal_gpio_t pin, const cyhal_clock_t
* @param[out] channels Array of pointers to ADC channel objects. This array must contain
* a minimum of one (non-null) entry per channel that is enabled by the configurator
* @param[in,out] num_channels Length of the `channels` array. If this value is too small for all of the channels
* enabled by the configurator an error will be returned. Will be updated with the
* enabled by the configurator an error will be returned. Will be updated with the
* number of channels that were enabled by the configurator.
* @param[in] cfg Configuration structure generated by the configurator.
* @return The status of the init request

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_quaddec.h
View File

@ -41,7 +41,7 @@
* signals. The signals are typically provided by a speed/position feedback system mounted on
* a motor or trackball. The driver allows the user to invoke a callback function when a
* particular event occurs.
* The signals, typically called A and B, are positioned 90° out-of-phase, which results in a Gray
* The signals, typically called A and B, are positioned 90° out-of-phase, which results in a Gray
* code output (a sequence where only one bit changes on each count). It also allows detection of
* direction and relative position. A third optional signal, named index, is used as a reference
* to establish an absolute position once per rotation.

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_sdhc.h
View File

@ -458,7 +458,7 @@ cy_rslt_t cyhal_sdhc_write(cyhal_sdhc_t *obj, uint32_t address, const uint8_t *d
* @param[in] start_addr Is the address of the first byte to erase
* @param[in] length Number of 512 byte blocks (starting at start_addr) to erase
* @param[in] timeout_ms Timeout value in ms for waiting/polling operations. If zero is provided
* for this parameter the default value will be used. See implementation specific
* for this parameter the default value will be used. See implementation specific
* documentation for timeout details.
* @return The status of the erase request
*

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_spi.h
View File

@ -83,7 +83,7 @@
* \section subsection_spi_moreinfor More Information
*
* * <a href="https://github.com/infineon/mtb-example-psoc6-spi-master"><b>mtb-example-psoc6-spi-master</b></a>: This example project demonstrates
* use of SPI (HAL) resource in PSoC® 6 MCU in Master mode to write data to an SPI slave.
* use of SPI (HAL) resource in PSoC® 6 MCU in Master mode to write data to an SPI slave.
*
*/

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_tdm.h
View File

@ -96,7 +96,7 @@
*
* <b>Code examples (Github)</b>
* * <a href="https://github.com/infineon/mtb-example-psoc6-tdm" ><b>
PSoC™ 6 MCU: Time Division Multiplexing (TDM)</b></a>
PSoCâ„¢ 6 MCU: Time Division Multiplexing (TDM)</b></a>
*/
#pragma once

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_usb_dev.h
View File

@ -84,7 +84,7 @@
* The following section shows how to add endpoint to the USB device and configure the endpoint using
* \ref cyhal_usb_dev_endpoint_add. The interrupts associated with the endpoints are handled by a
* callback function registered using \ref cyhal_usb_dev_register_endpoint_callback.
* The endpoint can also be configured using <a href="https://www.cypress.com/ModusToolboxUSBConfig">ModusToolbox™ USB Configurator</a>
* The endpoint can also be configured using <a href="https://www.cypress.com/ModusToolboxUSBConfig">ModusToolboxâ„¢ USB Configurator</a>
*
* \snippet hal_usb_dev.c snippet_cyhal_usb_dev_endpoint
*/

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_adc_impl.h
View File

@ -37,7 +37,7 @@ extern "C"
* \ingroup group_hal_impl_adc
* \{
* \section group_hal_impl_adc_interconnect Interconnect
* In PSoC™ each ADC has a single input trigger which, when activated, will
* In PSoCâ„¢ each ADC has a single input trigger which, when activated, will
* initiate an ADC scan. Each ADC also has an output trigger which will be
* activated when a scan is completed.
*/

8
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_clock_impl.h
View File

@ -196,7 +196,7 @@ extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_FAST[_CYHAL_SRSS_NUM_FAST];
extern const cyhal_clock_t CYHAL_CLOCK_TIMER;
/** Timer Clock: This clock is intended as a source for high-frequency timers, such as the Energy Profiler and CPU SysTick clock. This clock is stopped in the hibernate power mode. */
extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_TIMER;
#endif
#endif
#if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1C)
/** Slow Clock: This clock is used for the CM0+ CPU, Datawire and CRYPTO components and the associated CPUSS slow infrastructure. */
@ -266,9 +266,9 @@ extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_HF[SRSS_NUM_HFROOT];
#if defined(PERI_PERI_PCLK_PCLK_GROUP_NR)
#define _CYHAL_CLOCK_PERI_GROUPS PERI_PERI_PCLK_PCLK_GROUP_NR
#define _CYHAL_CLOCK_PERI_GROUPS PERI_PERI_PCLK_PCLK_GROUP_NR
#else
#define _CYHAL_CLOCK_PERI_GROUPS 1
#define _CYHAL_CLOCK_PERI_GROUPS 1
#endif
cy_rslt_t _cyhal_clock_allocate_channel(cyhal_clock_t *clock, cyhal_clock_block_t block, const void* funcs);
@ -321,7 +321,7 @@ static inline cy_rslt_t _cyhal_clock_allocate_peri(cyhal_clock_t *clock, cyhal_c
return _cyhal_clock_allocate_channel(clock, block, funcs);
}
#define cyhal_clock_allocate(clock, block) _cyhal_clock_allocate(clock, block)
#define cyhal_clock_allocate(clock, block) _cyhal_clock_allocate(clock, block)
#if defined(__cplusplus)
}

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_interconnect_impl.h
View File

@ -2,7 +2,7 @@
* \file cyhal_interconnect_impl.h
*
* \brief
* Implementation details for the PSoC™ 4/6 interconnect.
* Implementation details for the PSoCâ„¢ 4/6 interconnect.
*
********************************************************************************
* \copyright

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_pwm_impl.h
View File

@ -38,7 +38,7 @@ extern "C" {
* \ingroup group_hal_impl
* \{
* \section group_hal_impl_pwm_interconnect Interconnect
* In PSoC™ PWM channels can configure multiple input and output triggers
* In PSoCâ„¢ PWM channels can configure multiple input and output triggers
* simultaneously. 1 or more input triggers can be configured to initiate
* different PWM actions (e.g start, stop, reload, etc) with configurable edge
* detection on that incoming signal. Output triggers are based on certain

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_quaddec_impl.h
View File

@ -38,7 +38,7 @@ extern "C" {
* \ingroup group_hal_impl
* \{
* \section group_hal_impl_quaddec_interconnect Interconnect
* In PSoC™ Quadrature Decoder channels can configure multiple input and output
* In PSoCâ„¢ Quadrature Decoder channels can configure multiple input and output
* triggers simultaneously. 1 or more input triggers can be configured to
* initiate different PWM actions (e.g start, stop, reload, etc) with
* configurable edge detection on that incoming signal. Output triggers are

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_system_impl.h
View File

@ -2,7 +2,7 @@
* \file cyhal_system_impl.h
*
* \brief
* Provides a PSoC™ Specific interface for interacting with the Infineon power
* Provides a PSoCâ„¢ Specific interface for interacting with the Infineon power
* management and system clock configuration. This interface abstracts out the
* chip specific details. If any chip specific functionality is necessary, or
* performance is critical the low level functions can be used directly.

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_timer_impl.h
View File

@ -37,7 +37,7 @@
* range that is supported by \ref cyhal_timer_set_frequency is: 1526 hz -
* 100 Mhz
* \section group_hal_impl_timer_interconnect Interconnect
* In PSoC™ Timer channels can configure multiple input and output triggers
* In PSoCâ„¢ Timer channels can configure multiple input and output triggers
* simultaneously. 1 or more input triggers can be configured to initiate
* different Timer actions (e.g start, stop, reload, etc) with configurable
* edge detection on that incoming signal. Output triggers are based on certain

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_trng_impl.h
View File

@ -2,7 +2,7 @@
* \file cyhal_trng_impl.h
*
* \brief
* Provides an implementation of the ModusToolbox™ TRNG HAL API.
* Provides an implementation of the ModusToolboxâ„¢ TRNG HAL API.
*
********************************************************************************
* \copyright

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_wdt_impl.h
View File

@ -30,7 +30,7 @@
* \addtogroup group_hal_impl_wdt WDT (Watchdog Timer)
* \ingroup group_hal_impl
* \{
* The CAT1 (PSoC™ 6) WDT is only capable of supporting certain timeout ranges below its maximum timeout.
* The CAT1 (PSoCâ„¢ 6) WDT is only capable of supporting certain timeout ranges below its maximum timeout.
* As a result, any unsupported timeouts given to the HAL WDT are rounded up to the nearest supported value.
* The following table describes the unsupported ranges and the timeout values they are rounded to.
*

6
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_audio_common.c
View File

@ -206,7 +206,7 @@ static uint8_t _cyhal_audioss_get_block_from_irqn(_cyhal_system_irq_t irqn)
}
}
#if defined(COMPONENT_CAT2) /* PSoC™ 4 uses a PCLK */
#if defined(COMPONENT_CAT2) /* PSoCâ„¢ 4 uses a PCLK */
#define _CYHAL_AUDIOSS_USES_PCLK
static const en_clk_dst_t _cyhal_audioss_clock[] =
{
@ -576,8 +576,8 @@ cy_rslt_t _cyhal_audioss_init(_cyhal_audioss_t *obj, const _cyhal_audioss_pins_t
mclk_map_rx = (NULL != rx_pins) ? _CYHAL_UTILS_GET_RESOURCE(rx_pins->mclk, cyhal_pin_map_audioss_clk_i2s_if) : NULL;
mclk_map_tx = (NULL != tx_pins) /* If non-null, we know the mclk pins must be the same, so can reuse the rx value */
? ((NULL != mclk_map_rx) ? mclk_map_rx : _CYHAL_UTILS_GET_RESOURCE(tx_pins->mclk, cyhal_pin_map_audioss_clk_i2s_if))
: NULL;
? ((NULL != mclk_map_rx) ? mclk_map_rx : _CYHAL_UTILS_GET_RESOURCE(tx_pins->mclk, cyhal_pin_map_audioss_clk_i2s_if))
: NULL;
uint8_t mclk_rx_dm = CYHAL_PIN_MAP_DRIVE_MODE_AUDIOSS_CLK_I2S_IF;
#if defined(_CYHAL_AUDIOSS_RX_ENABLED)

124
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_clock.c
View File

@ -298,7 +298,7 @@ const cyhal_resource_inst_t CYHAL_CLOCK_RSC_LPECO_PRESCALER = { CYHAL_RSC_CLOCK,
#endif
/* COMPONENT_CAT1C uses a hybrid approach from what was done on CAT1A and CAT1B. Facelift CAT1C supports ClkPeri as well
as Peripheral Clock Groups. For CAT1C, ClkPeri is used to source everything in Peripheral Clock Group 0 (HF0) and other
as Peripheral Clock Groups. For CAT1C, ClkPeri is used to source everything in Peripheral Clock Group 0 (HF0) and other
Peripheral Clock Groups derive from one of the HFClks and have their own group divider. Thus we declare RSC_PERI Peri array for CAT1C */
const cyhal_resource_inst_t CYHAL_CLOCK_RSC_PERI[CY_PERI_GROUP_NR] =
@ -2236,7 +2236,7 @@ static cy_rslt_t _cyhal_clock_set_divider_pump(cyhal_clock_t *clock, uint32_t di
Cy_SysClk_ClkPumpSetDivider(divVal);
return CY_RSLT_SUCCESS;
}
#define _cyhal_clock_get_sources_pump _cyhal_clock_get_sources_hf
#define _cyhal_clock_get_sources_pump _cyhal_clock_get_sources_hf
static cy_rslt_t _cyhal_clock_set_source_pump(cyhal_clock_t *clock, const cyhal_clock_t *source)
{
CY_UNUSED_PARAMETER(clock);
@ -2984,108 +2984,108 @@ const void* _cyhal_clock_get_funcs_peripheral(void) { return &FUNCS_EMPTY/*FUNCS
static const cyhal_clock_funcs_t* _cyhal_clock_get_funcs_all(cyhal_clock_block_t block)
{
switch (block)
{
case CYHAL_CLOCK_BLOCK_IMO:
return &FUNCS_IMO;
switch (block)
{
case CYHAL_CLOCK_BLOCK_IMO:
return &FUNCS_IMO;
#if SRSS_ECO_PRESENT
case CYHAL_CLOCK_BLOCK_ECO:
return &FUNCS_ECO;
case CYHAL_CLOCK_BLOCK_ECO:
return &FUNCS_ECO;
#endif
case CYHAL_CLOCK_BLOCK_EXT:
return &FUNCS_EXT;
case CYHAL_CLOCK_BLOCK_EXT:
return &FUNCS_EXT;
#if SRSS_ALTHF_PRESENT
case CYHAL_CLOCK_BLOCK_ALTHF:
return &FUNCS_ALTHF;
case CYHAL_CLOCK_BLOCK_ALTHF:
return &FUNCS_ALTHF;
#endif
#if SRSS_ALTLF_PRESENT
case CYHAL_CLOCK_BLOCK_ALTLF:
return &FUNCS_ALTLF;
case CYHAL_CLOCK_BLOCK_ALTLF:
return &FUNCS_ALTLF;
#endif
case CYHAL_CLOCK_BLOCK_ILO:
return &FUNCS_ILO;
case CYHAL_CLOCK_BLOCK_ILO:
return &FUNCS_ILO;
#if _CYHAL_SRSS_PILO_PRESENT
case CYHAL_CLOCK_BLOCK_PILO:
return &FUNCS_PILO;
case CYHAL_CLOCK_BLOCK_PILO:
return &FUNCS_PILO;
#endif
#if SRSS_BACKUP_PRESENT
case CYHAL_CLOCK_BLOCK_WCO:
return &FUNCS_WCO;
case CYHAL_CLOCK_BLOCK_WCO:
return &FUNCS_WCO;
#endif
#if defined(COMPONENT_CAT1B) || (SRSS_MFO_PRESENT)
case CYHAL_CLOCK_BLOCK_MFO:
return &FUNCS_MFO;
case CYHAL_CLOCK_BLOCK_MFO:
return &FUNCS_MFO;
#endif
case CYHAL_CLOCK_BLOCK_PATHMUX:
return &FUNCS_PATHMUX;
case CYHAL_CLOCK_BLOCK_PATHMUX:
return &FUNCS_PATHMUX;
#if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1C) || (SRSS_FLL_PRESENT)
case CYHAL_CLOCK_BLOCK_FLL:
return &FUNCS_FLL;
case CYHAL_CLOCK_BLOCK_FLL:
return &FUNCS_FLL;
#endif
case CYHAL_CLOCK_BLOCK_LF:
return &FUNCS_LF;
case CYHAL_CLOCK_BLOCK_LF:
return &FUNCS_LF;
#if defined(COMPONENT_CAT1B) || (SRSS_MFO_PRESENT)
case CYHAL_CLOCK_BLOCK_MF:
return &FUNCS_MF;
case CYHAL_CLOCK_BLOCK_MF:
return &FUNCS_MF;
#endif
case CYHAL_CLOCK_BLOCK_HF:
return &FUNCS_HF;
case CYHAL_CLOCK_BLOCK_PUMP:
return &FUNCS_PUMP;
case CYHAL_CLOCK_BLOCK_BAK:
return &FUNCS_BAK;
case CYHAL_CLOCK_BLOCK_ALT_SYS_TICK:
return &FUNCS_ALT_SYS_TICK;
case CYHAL_CLOCK_BLOCK_PERI:
return &FUNCS_PERI;
case CYHAL_CLOCK_BLOCK_HF:
return &FUNCS_HF;
case CYHAL_CLOCK_BLOCK_PUMP:
return &FUNCS_PUMP;
case CYHAL_CLOCK_BLOCK_BAK:
return &FUNCS_BAK;
case CYHAL_CLOCK_BLOCK_ALT_SYS_TICK:
return &FUNCS_ALT_SYS_TICK;
case CYHAL_CLOCK_BLOCK_PERI:
return &FUNCS_PERI;
#if defined(COMPONENT_CAT1A)
#if (_CYHAL_SRSS_NUM_PLL > 0)
case CYHAL_CLOCK_BLOCK_PLL:
return &FUNCS_PLL;
case CYHAL_CLOCK_BLOCK_PLL:
return &FUNCS_PLL;
#endif
#endif
#if defined(COMPONENT_CAT1C)
case CYHAL_CLOCK_BLOCK_MEM:
return &FUNCS_MEM;
#endif
#endif
#if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1C)
#if defined(COMPONENT_CAT1A)
case CYHAL_CLOCK_BLOCK_TIMER:
return &FUNCS_TIMER;
case CYHAL_CLOCK_BLOCK_TIMER:
return &FUNCS_TIMER;
#endif
case CYHAL_CLOCK_BLOCK_FAST:
return &FUNCS_FAST;
case CYHAL_CLOCK_BLOCK_SLOW:
return &FUNCS_SLOW;
case CYHAL_CLOCK_BLOCK_FAST:
return &FUNCS_FAST;
case CYHAL_CLOCK_BLOCK_SLOW:
return &FUNCS_SLOW;
#endif
#if defined(COMPONENT_CAT1B) || defined(COMPONENT_CAT1C)
#if (_CYHAL_SRSS_NUM_PLL > 0)
case CYHAL_CLOCK_BLOCK_PLL200:
case CYHAL_CLOCK_BLOCK_PLL200:
return &FUNCS_PLL200;
case CYHAL_CLOCK_BLOCK_PLL400:
return &FUNCS_PLL400;
case CYHAL_CLOCK_BLOCK_PLL400:
return &FUNCS_PLL400;
#endif
#endif
#endif
#if defined(COMPONENT_CAT1B)
case CYHAL_CLOCK_BLOCK_IHO:
return &FUNCS_IHO;
case CYHAL_CLOCK_BLOCK_IHO:
return &FUNCS_IHO;
#if SRSS_ECO_PRESENT
case CYHAL_CLOCK_BLOCK_ECO_PRESCALER:
return &FUNCS_ECO_PRESCALER;
case CYHAL_CLOCK_BLOCK_ECO_PRESCALER:
return &FUNCS_ECO_PRESCALER;
#endif
#if SRSS_BACKUP_S40E_LPECO_PRESENT
case CY_SYSCLK_CLKLF_IN_LPECO_PRESCALER:
return &FUNCS_LPECO_PRESCALER;
return &FUNCS_LPECO_PRESCALER;
#endif
#endif
default:
return &FUNCS_PERIPHERAL;
}
default:
return &FUNCS_PERIPHERAL;
}
}
#define _CYHAL_CLOCK_CREATE(x,y) { .block = (CYHAL_CLOCK_BLOCK_##x), .channel = (y), .reserved = false, .funcs = &(FUNCS_##x) }
#define _CYHAL_CLOCK_CREATE(x,y) { .block = (CYHAL_CLOCK_BLOCK_##x), .channel = (y), .reserved = false, .funcs = &(FUNCS_##x) }
const cyhal_clock_t CYHAL_CLOCK_IMO = _CYHAL_CLOCK_CREATE(IMO, 0);
const cyhal_clock_t CYHAL_CLOCK_EXT = _CYHAL_CLOCK_CREATE(EXT, 0);

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_dma_dmac.c
View File

@ -534,7 +534,7 @@ cy_rslt_t _cyhal_dma_dmac_configure(cyhal_dma_t *obj, const cyhal_dma_cfg_t *cfg
return CYHAL_DMA_RSLT_ERR_INVALID_TRANSFER_SIZE;
#if defined(CY_IP_M0S8CPUSSV3_DMAC)
// PSoC™ 4 devices do not support automatically disabling the channel on completion
// PSoCâ„¢ 4 devices do not support automatically disabling the channel on completion
if ((cfg->action == CYHAL_DMA_TRANSFER_BURST_DISABLE) ||
(cfg->action == CYHAL_DMA_TRANSFER_FULL_DISABLE))
{

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_keyscan.c
View File

@ -29,7 +29,7 @@
* \addtogroup group_hal_impl_keyscan KeyScan
* \ingroup group_hal_impl
* \{
* On PSoC™ devices, the KeyScan peripheral is clocked from the shared source CLK_MF.
* On PSoCâ„¢ devices, the KeyScan peripheral is clocked from the shared source CLK_MF.
* If `NULL` is passed for the `clk` argument to \ref cyhal_keyscan_init, the KeyScan
* HAL will automatically reserve and enable CLK_MF. If the KeyScan driver needs to be
* used in combination with another driver that also requires CLK_MF, use the Clock

4
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_lptimer.c
View File

@ -259,7 +259,7 @@ static uint32_t _cyhal_lptimer_set_delay_common(cyhal_lptimer_t *obj, uint32_t d
// If neither is enabled, return Error Disabled.
// We do not check to see if Counter0 is enabled as it is not used
// for this IP implementation.
if ((Cy_MCWDT_GetEnabledStatus(obj->base, CY_MCWDT_CTR1) == 0UL)
if ((Cy_MCWDT_GetEnabledStatus(obj->base, CY_MCWDT_CTR1) == 0UL)
|| (Cy_MCWDT_GetEnabledStatus(obj->base, CY_MCWDT_CTR2) == 0UL))
{
return CYHAL_LPTIMER_RSLT_ERR_DISABLED;
@ -391,7 +391,7 @@ static uint32_t _cyhal_lptimer_set_delay_common(cyhal_lptimer_t *obj, uint32_t d
// Timeout has occurred. There could have been a clock failure while waiting for the count value to update.
cyhal_system_critical_section_exit(critical_section);
return CYHAL_LPTIMER_RSLT_ERR_DISABLED;
}
}
uint16_t c0_match = (uint16_t)(c0_current_ticks + delay);
// Changes can take up to 2 clk_lf cycles to propagate. If we set the match within this window of the current value,

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_qspi.c
View File

@ -967,7 +967,7 @@ cy_rslt_t cyhal_qspi_init(
CY_ASSERT(NULL != obj);
CY_ASSERT(NULL != pin_set);
/* mode (CPOL and CPHA) are not supported in CAT1 (PSoC™ 6) */
/* mode (CPOL and CPHA) are not supported in CAT1 (PSoCâ„¢ 6) */
CY_UNUSED_PARAMETER(mode);
#if defined(CY_DEVICE_CYW20829)

4
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_quaddec.c
View File

@ -320,7 +320,7 @@ cy_rslt_t cyhal_quaddec_init(cyhal_quaddec_t *obj, cyhal_gpio_t phi_a, cyhal_gpi
NULL, NULL, _cyhal_quaddec_get_phy_a_input_dest, &obj->tcpwm.resource);
_cyhal_quaddec_get_phy_a_input_dest_trig_idx++;
} while (CY_RSLT_SUCCESS != rslt &&
_cyhal_quaddec_get_phy_a_input_dest_trig_idx
_cyhal_quaddec_get_phy_a_input_dest_trig_idx
< _CYHAL_TCPWM_TRIGGER_INPUTS_PER_BLOCK[obj->tcpwm.resource.block_num]);
}
}
@ -354,7 +354,7 @@ cy_rslt_t cyhal_quaddec_init(cyhal_quaddec_t *obj, cyhal_gpio_t phi_a, cyhal_gpi
if (rslt == CY_RSLT_SUCCESS)
{
#if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1B) || defined(COMPONENT_CAT1C) // already initialized above
obj->tcpwm.inputs[phy_a_idx] = phy_a_src;;
obj->tcpwm.inputs[phy_a_idx] = phy_a_src;;
rslt = cyhal_quaddec_connect_digital(obj, obj->tcpwm.inputs[phy_a_idx], CYHAL_QUADDEC_INPUT_PHI_A);
#else
rslt = _cyhal_quadec_pin_init(obj, phi_a, &(obj->phi_a), CYHAL_SIGNAL_TYPE_LEVEL, CYHAL_QUADDEC_INPUT_PHI_A);

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_rtc.c
View File

@ -39,7 +39,7 @@
* \ingroup group_hal_impl
* \{
*
* Internally the CAT1 (PSoC™ 6) RTC only stores the year as a two digit BCD value
* Internally the CAT1 (PSoCâ„¢ 6) RTC only stores the year as a two digit BCD value
* (0-99); no century information is stored. On RTC initialization the HAL must,
* as a result, assume a default century. If cyhal_rtc_write has been called
* with a different century than the default, its value must be stored and that

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_sdhc.c
View File

@ -2879,7 +2879,7 @@ cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk,
const cyhal_sdio_configurator_t cfg = {
.resource = NULL,
.host_config = &host_config,
.card_config = &card_config,
.card_config = &card_config,
.clock = NULL,
.gpios = {clk, cmd, { data0, data1, data2, data3 } }
};

4
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_spi.c
View File

@ -179,7 +179,7 @@ static cy_rslt_t _cyhal_spi_int_frequency(cyhal_spi_t *obj, uint32_t hz, uint8_t
}
else
{
/* Slave requires such frequency: required_frequency = N / ((0.5 * desired_period) – 20 nsec - tDSI,
/* Slave requires such frequency: required_frequency = N / ((0.5 * desired_period) – 20 nsec - tDSI,
* N is 3 when "Enable Input Glitch Filter" is false and 4 when true.
* tDSI Is external master delay which is assumed to be 16.66 nsec */
@ -389,7 +389,7 @@ static cy_rslt_t _cyhal_spi_get_ssel_map_idx(cyhal_gpio_t ssel, const cyhal_reso
};
static const size_t ssel_s_pin_maps_sizes_bytes[] = {
#if defined(CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT0)
sizeof(cyhal_pin_map_scb_spi_s_select0),
sizeof(cyhal_pin_map_scb_spi_s_select0),
#endif
#if defined(CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT1)
sizeof(cyhal_pin_map_scb_spi_s_select1),

4
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_syspm.c
View File

@ -32,7 +32,7 @@
* \ingroup group_hal_impl
* \{
* \section section_hal_impl_syspm_set_system
*
*
* The callback mode \ref CYHAL_SYSPM_AFTER_DS_WFI_TRANSITION is only applicable
* for CAT1B devices.
*
@ -47,7 +47,7 @@
* \ingroup group_hal_impl
* \{
* \section section_hal_impl_syspm_set_system
*
*
* Setting the system state is unsupported on CAT2 devices. For CAT2 devices,
* \ref CYHAL_SYSPM_RSLT_ERR_NOT_SUPPORTED will be returned in the function \ref cyhal_syspm_set_system_state.
*

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_helium_utils.h
View File

@ -180,7 +180,7 @@ __STATIC_INLINE arm_status arm_mat_trans_32bit_generic_mve(
while (blkCnt > 0U)
{
vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs);
vstrwq(pDataDestR, vecIn);
vstrwq(pDataDestR, vecIn);
pDataDestR += 4;
pDataC = pDataC + srcCols * 4;
/*

106
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_math.h
View File

@ -29,7 +29,7 @@
* ------------
*
* This user manual describes the CMSIS DSP software library,
* a suite of common signal processing functions for use on Cortex-M and Cortex-A processor
* a suite of common signal processing functions for use on Cortex-M and Cortex-A processor
* based devices.
*
* The library is divided into a number of functions each covering a specific category:
@ -91,8 +91,8 @@
*
* The library is now tested on Fast Models building with cmake.
* Core M0, M7, A5 are tested.
*
*
*
*
*
* Building the Library
* ------------
@ -129,12 +129,12 @@
* - ARM_MATH_NEON:
*
* Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
* It is not enabled by default when Neon is available because performances are
* It is not enabled by default when Neon is available because performances are
* dependent on the compiler and target architecture.
*
* - ARM_MATH_NEON_EXPERIMENTAL:
*
* Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of
* Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of
* of some DSP functions. Experimental Neon versions currently do not have better
* performances than the scalar versions.
*
@ -309,11 +309,11 @@
* generated from the scikit-learn object. Some examples are given in
* DSP/Testing/PatternGeneration/SVM.py
*
* If more than 2 classes are needed, the functions in this folder
* If more than 2 classes are needed, the functions in this folder
* will have to be used, as building blocks, to do multi-class classification.
*
* No multi-class classification is provided in this SVM folder.
*
*
*/
@ -372,7 +372,7 @@ extern "C"
/* Included for instrinsics definitions */
#if defined (_MSC_VER )
#if defined (_MSC_VER )
#include <stdint.h>
#define __STATIC_FORCEINLINE static __forceinline
#define __STATIC_INLINE static __inline
@ -715,7 +715,7 @@ extern "C"
* @brief 16-bit float 64-bit vector data type.
*/
typedef __ALIGNED(2) float16x4_t f16x4_t;
#endif
#endif
/**
* @brief 32-bit floating-point 128-bit vector triplet data type
@ -774,7 +774,7 @@ extern "C"
* @brief 16-bit floating-point 64-bit vector quadruplet data type
*/
typedef float16x4x4_t f16x4x4_t;
#endif
#endif
/**
* @brief 32-bit fractional 64-bit vector pair data type in 1.31 format
@ -839,7 +839,7 @@ extern "C"
float16x4_t f;
int16x4_t i;
} any16x4_t;
#endif
#endif
/**
* @brief 32-bit status 64-bit vector data type.
@ -1011,7 +1011,7 @@ __STATIC_FORCEINLINE q31_t read_q7x4_ia (
memcpy (&val, *pQ7, 4);
#else
val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) | ((*pQ7)[0] & 0x0FF);
#endif
#endif
*pQ7 += 4;
@ -1031,7 +1031,7 @@ __STATIC_FORCEINLINE q31_t read_q7x4_da (
memcpy (&val, *pQ7, 4);
#else
val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) << 8) | ((*pQ7)[0] & 0x0FF);
#endif
#endif
*pQ7 -= 4;
return (val);
@ -1964,7 +1964,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
{
float32_t coeffs[8][4]; /**< Points to the array of modified coefficients. The array is of length 32. There is one per stage */
} arm_biquad_mod_coef_f32;
#endif
#endif
/**
* @brief Processing function for the Q15 Biquad cascade filter.
@ -2073,11 +2073,11 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
void arm_biquad_cascade_df1_mve_init_f32(
arm_biquad_casd_df1_inst_f32 * S,
uint8_t numStages,
const float32_t * pCoeffs,
arm_biquad_mod_coef_f32 * pCoeffsMod,
const float32_t * pCoeffs,
arm_biquad_mod_coef_f32 * pCoeffsMod,
float32_t * pState);
#endif
void arm_biquad_cascade_df1_init_f32(
arm_biquad_casd_df1_inst_f32 * S,
uint8_t numStages,
@ -2171,7 +2171,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
/**
* @brief Compute the logical bitwise NOT of a fixed-point vector.
* @param[in] pSrc points to input vector
* @param[in] pSrc points to input vector
* @param[out] pDst points to output vector
* @param[in] blockSize number of samples in each vector
* @return none
@ -2183,7 +2183,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
/**
* @brief Compute the logical bitwise NOT of a fixed-point vector.
* @param[in] pSrc points to input vector
* @param[in] pSrc points to input vector
* @param[out] pDst points to output vector
* @param[in] blockSize number of samples in each vector
* @return none
@ -2195,7 +2195,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
/**
* @brief Compute the logical bitwise NOT of a fixed-point vector.
* @param[in] pSrc points to input vector
* @param[in] pSrc points to input vector
* @param[out] pDst points to output vector
* @param[in] blockSize number of samples in each vector
* @return none
@ -2280,11 +2280,11 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
/**
* @brief Instance structure for the sorting algorithms.
*/
typedef struct
typedef struct
{
arm_sort_alg alg; /**< Sorting algorithm selected */
arm_sort_dir dir; /**< Sorting order (direction) */
} arm_sort_instance_f32;
} arm_sort_instance_f32;
/**
* @param[in] S points to an instance of the sorting structure.
@ -2293,9 +2293,9 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
* @param[in] blockSize number of samples to process.
*/
void arm_sort_f32(
const arm_sort_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
const arm_sort_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize);
/**
@ -2304,18 +2304,18 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
* @param[in] dir Sorting order.
*/
void arm_sort_init_f32(
arm_sort_instance_f32 * S,
arm_sort_alg alg,
arm_sort_dir dir);
arm_sort_instance_f32 * S,
arm_sort_alg alg,
arm_sort_dir dir);
/**
* @brief Instance structure for the sorting algorithms.
*/
typedef struct
typedef struct
{
arm_sort_dir dir; /**< Sorting order (direction) */
float32_t * buffer; /**< Working buffer */
} arm_merge_sort_instance_f32;
} arm_merge_sort_instance_f32;
/**
* @param[in] S points to an instance of the sorting structure.
@ -2368,7 +2368,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
* @param[in] blockSize number of samples of output data.
*/
void arm_spline_f32(
arm_spline_instance_f32 * S,
arm_spline_instance_f32 * S,
const float32_t * xq,
float32_t * pDst,
uint32_t blockSize);
@ -2388,7 +2388,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
arm_spline_type type,
const float32_t * x,
const float32_t * y,
uint32_t n,
uint32_t n,
float32_t * coeffs,
float32_t * tempBuffer);
@ -2401,7 +2401,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
uint16_t numCols; /**< number of columns of the matrix. */
float32_t *pData; /**< points to the data of the matrix. */
} arm_matrix_instance_f32;
/**
* @brief Instance structure for the floating-point matrix structure.
*/
@ -4765,7 +4765,7 @@ arm_status arm_fir_decimate_init_f32(
uint32_t blockSize);
#if defined(ARM_MATH_NEON)
#if defined(ARM_MATH_NEON)
void arm_biquad_cascade_df2T_compute_coefs_f32(
arm_biquad_cascade_df2T_instance_f32 * S,
uint8_t numStages,
@ -7934,7 +7934,7 @@ typedef struct
*/
void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S,
void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S,
uint32_t nbOfSupportVectors,
uint32_t vectorDimension,
float32_t intercept,
@ -7950,9 +7950,9 @@ void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S,
* @return none.
*
*/
void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S,
const float32_t * in,
void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S,
const float32_t * in,
int32_t * pResult);
@ -7973,7 +7973,7 @@ void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S,
*/
void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S,
void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S,
uint32_t nbOfSupportVectors,
uint32_t vectorDimension,
float32_t intercept,
@ -7993,8 +7993,8 @@ void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S,
* @return none.
*
*/
void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S,
const float32_t * in,
void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S,
const float32_t * in,
int32_t * pResult);
@ -8012,7 +8012,7 @@ void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S,
*
*/
void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S,
void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S,
uint32_t nbOfSupportVectors,
uint32_t vectorDimension,
float32_t intercept,
@ -8030,8 +8030,8 @@ void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S,
* @return none.
*
*/
void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S,
const float32_t * in,
void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S,
const float32_t * in,
int32_t * pResult);
/**
@ -8049,7 +8049,7 @@ void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S,
*
*/
void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S,
void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S,
uint32_t nbOfSupportVectors,
uint32_t vectorDimension,
float32_t intercept,
@ -8068,8 +8068,8 @@ void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S,
* @return none.
*
*/
void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S,
const float32_t * in,
void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S,
const float32_t * in,
int32_t * pResult);
@ -8098,8 +8098,8 @@ typedef struct
*/
uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S,
const float32_t * in,
uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S,
const float32_t * in,
float32_t *pBuffer);
/**
@ -8197,8 +8197,8 @@ float32_t arm_kullback_leibler_f32(const float32_t * pSrcA
* @return Kullback-Leibler Divergence D(A || B)
*
*/
float64_t arm_kullback_leibler_f64(const float64_t * pSrcA,
const float64_t * pSrcB,
float64_t arm_kullback_leibler_f64(const float64_t * pSrcA,
const float64_t * pSrcB,
uint32_t blockSize);
@ -8925,11 +8925,11 @@ float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t num
#define LOW_OPTIMIZATION_EXIT
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
#elif defined ( _MSC_VER ) || defined(__GNUC_PYTHON__)
#define LOW_OPTIMIZATION_ENTER
#define LOW_OPTIMIZATION_EXIT
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
#endif

10
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_mve_tables.h
View File

@ -32,10 +32,10 @@
#include "arm_math.h"
#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
@ -98,7 +98,7 @@ extern float32_t rearranged_twiddle_stride3_4096_f32[2728];
#if defined(ARM_MATH_MVEI)
#if defined(ARM_MATH_MVEI)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
@ -159,7 +159,7 @@ extern q31_t rearranged_twiddle_stride3_4096_q31[2728];
#if defined(ARM_MATH_MVEI)
#if defined(ARM_MATH_MVEI)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
@ -220,7 +220,7 @@ extern q15_t rearranged_twiddle_stride3_4096_q15[2728];
#if defined(ARM_MATH_MVEI)
#if defined(ARM_MATH_MVEI)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)

14
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cachel1_armv7.h
View File

@ -48,7 +48,7 @@
#ifndef __SCB_ICACHE_LINE_SIZE
#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
#endif
#endif
/**
\brief Enable I-Cache
@ -328,10 +328,10 @@ __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
@ -358,10 +358,10 @@ __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsiz
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
@ -388,10 +388,10 @@ __STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {

6
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armcc.h
View File

@ -63,9 +63,9 @@
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE static __forceinline
#endif
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __declspec(noreturn)
#endif
@ -461,7 +461,7 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
*/
#define __DMB() __dmb(0xF)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

6
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang.h
View File

@ -597,7 +597,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
@ -645,7 +645,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
@ -1228,7 +1228,7 @@ __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \
(defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) )
/**
\brief Load-Acquire (8 bit)
\details Executes a LDAB instruction for 8 bit value.

4
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang_ltm.h
View File

@ -595,7 +595,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
@ -641,7 +641,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/

24
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_gcc.h
View File

@ -46,9 +46,9 @@
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
#endif
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__))
#endif
@ -126,23 +126,23 @@
\details This default implementations initialized all data and additional bss
sections relying on .copy.table and .zero.table specified properly
in the used linker script.
*/
__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
{
extern void _start(void) __NO_RETURN;
typedef struct {
uint32_t const* src;
uint32_t* dest;
uint32_t wlen;
} __copy_table_t;
typedef struct {
uint32_t* dest;
uint32_t wlen;
} __zero_table_t;
extern const __copy_table_t __copy_table_start__;
extern const __copy_table_t __copy_table_end__;
extern const __zero_table_t __zero_table_start__;
@ -153,16 +153,16 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
pTable->dest[i] = pTable->src[i];
}
}
for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
for(uint32_t i=0u; i<pTable->wlen; ++i) {
pTable->dest[i] = 0u;
}
}
_start();
}
#define __PROGRAM_START __cmsis_start
#endif
@ -652,7 +652,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
@ -697,7 +697,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
@ -834,7 +834,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#if __has_builtin(__builtin_arm_get_fpscr)
#if __has_builtin(__builtin_arm_get_fpscr)
// Re-enable using built-in when GCC has been fixed
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_iccarm.h
View File

@ -8,7 +8,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2017-2019 IAR Systems
// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
//
// SPDX-License-Identifier: Apache-2.0
//

8
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv81mml.h
View File

@ -210,14 +210,14 @@
#define __FPU_PRESENT 0U
#warning "__FPU_PRESENT not defined in device header file; using default!"
#endif
#if __FPU_PRESENT != 0U
#ifndef __FPU_DP
#define __FPU_DP 0U
#warning "__FPU_DP not defined in device header file; using default!"
#endif
#endif
#ifndef __MPU_PRESENT
#define __MPU_PRESENT 0U
#warning "__MPU_PRESENT not defined in device header file; using default!"
@ -232,7 +232,7 @@
#define __DCACHE_PRESENT 0U
#warning "__DCACHE_PRESENT not defined in device header file; using default!"
#endif
#ifndef __PMU_PRESENT
#define __PMU_PRESENT 0U
#warning "__PMU_PRESENT not defined in device header file; using default!"
@ -261,7 +261,7 @@
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"

4
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mbl.h
View File

@ -2043,7 +2043,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void)
@{
*/
/**
\brief Set Debug Authentication Control Register
\details writes to Debug Authentication Control register.
@ -2110,7 +2110,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
@{
*/
/**
\brief Get Debug Authentication Status Register
\details Reads Debug Authentication Status register.

6
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mml.h
View File

@ -254,7 +254,7 @@
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
@ -2939,7 +2939,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void)
@{
*/
/**
\brief Set Debug Authentication Control Register
\details writes to Debug Authentication Control register.
@ -3006,7 +3006,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
@{
*/
/**
\brief Get Debug Authentication Status Register
\details Reads Debug Authentication Status register.

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0.h
View File

@ -61,7 +61,7 @@
*/
#include "cmsis_version.h"
/* CMSIS CM0 definitions */
#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0plus.h
View File

@ -61,7 +61,7 @@
*/
#include "cmsis_version.h"
/* CMSIS CM0+ definitions */
#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm1.h
View File

@ -61,7 +61,7 @@
*/
#include "cmsis_version.h"
/* CMSIS CM1 definitions */
#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */

6
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm23.h
View File

@ -1486,7 +1486,7 @@ typedef struct
/* Special LR values for Secure/Non-Secure call handling and exception handling */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
@ -2118,7 +2118,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void)
@{
*/
/**
\brief Set Debug Authentication Control Register
\details writes to Debug Authentication Control register.
@ -2185,7 +2185,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
@{
*/
/**
\brief Get Debug Authentication Status Register
\details Reads Debug Authentication Status register.

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm3.h
View File

@ -146,7 +146,7 @@
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"

6
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm33.h
View File

@ -254,7 +254,7 @@
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
@ -3007,7 +3007,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void)
@{
*/
/**
\brief Set Debug Authentication Control Register
\details writes to Debug Authentication Control register.
@ -3074,7 +3074,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
@{
*/
/**
\brief Get Debug Authentication Status Register
\details Reads Debug Authentication Status register.

8
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm35p.h
View File

@ -249,12 +249,12 @@
#define __DSP_PRESENT 0U
#warning "__DSP_PRESENT not defined in device header file; using default!"
#endif
#ifndef __VTOR_PRESENT
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
@ -3007,7 +3007,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void)
@{
*/
/**
\brief Set Debug Authentication Control Register
\details writes to Debug Authentication Control register.
@ -3074,7 +3074,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
@{
*/
/**
\brief Get Debug Authentication Status Register
\details Reads Debug Authentication Status register.

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm4.h
View File

@ -198,7 +198,7 @@
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"

6
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm55.h
View File

@ -210,7 +210,7 @@
#define __FPU_PRESENT 0U
#warning "__FPU_PRESENT not defined in device header file; using default!"
#endif
#if __FPU_PRESENT != 0U
#ifndef __FPU_DP
#define __FPU_DP 0U
@ -232,12 +232,12 @@
#define __DCACHE_PRESENT 0U
#warning "__DCACHE_PRESENT not defined in device header file; using default!"
#endif
#ifndef __VTOR_PRESENT
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __PMU_PRESENT
#define __PMU_PRESENT 0U
#warning "__PMU_PRESENT not defined in device header file; using default!"

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm7.h
View File

@ -213,7 +213,7 @@
#define __VTOR_PRESENT 1U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_sc000.h
View File

@ -146,7 +146,7 @@
#define __VTOR_PRESENT 0U
#warning "__VTOR_PRESENT not defined in device header file; using default!"
#endif
#ifndef __NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 2U
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"

30
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv7.h
View File

@ -21,13 +21,13 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV7_H
#define ARM_MPU_ARMV7_H
@ -79,12 +79,12 @@
/**
* MPU Memory Access Attributes
*
*
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
*/
*/
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
@ -93,7 +93,7 @@
/**
* MPU Region Attribute and Size Register Value
*
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
@ -110,7 +110,7 @@
/**
* MPU Region Attribute and Size Register Value
*
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
@ -119,7 +119,7 @@
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
*/
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
@ -129,7 +129,7 @@
* - Shareable
* - Non-cacheable
* - Non-bufferable
*/
*/
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
/**
@ -140,7 +140,7 @@
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
*
* \param IsShareable Configures the device memory as shareable or non-shareable.
*/
*/
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
/**
@ -153,7 +153,7 @@
* \param OuterCp Configures the outer cache policy.
* \param InnerCp Configures the inner cache policy.
* \param IsShareable Configures the memory as shareable or non-shareable.
*/
*/
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U))
/**
@ -184,7 +184,7 @@ typedef struct {
uint32_t RBAR; //!< The region base address register value (RBAR)
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
@ -224,7 +224,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
/** Configure an MPU region.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
{
MPU->RBAR = rbar;
@ -235,7 +235,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
{
MPU->RNR = rnr;
@ -251,7 +251,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t r
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
@ -261,7 +261,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
while (cnt > MPU_TYPE_RALIASES) {

32
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv8.h
View File

@ -102,7 +102,7 @@
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
/** \brief Region Limit Address Register with PXN value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
@ -113,7 +113,7 @@
(((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
/**
@ -123,7 +123,7 @@ typedef struct {
uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
@ -190,11 +190,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at
const uint8_t reg = idx / 4U;
const uint32_t pos = ((idx % 4U) * 8U);
const uint32_t mask = 0xFFU << pos;
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
return; // invalid index
}
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
}
@ -241,7 +241,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
{
{
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
}
#endif
@ -251,7 +251,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
mpu->RNR = rnr;
@ -263,7 +263,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
@ -274,10 +274,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
*/
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
}
#endif
@ -289,7 +289,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
@ -301,7 +301,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
if (cnt == 1U) {
@ -310,7 +310,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
} else {
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
@ -321,7 +321,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
rnrBase += MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
}
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
}
}
@ -331,7 +331,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
}
@ -342,7 +342,7 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
}

42
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/pmu_armv8.h
View File

@ -192,23 +192,23 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask);
__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask);
/**
/**
\brief Enable the PMU
*/
__STATIC_INLINE void ARM_PMU_Enable(void)
__STATIC_INLINE void ARM_PMU_Enable(void)
{
PMU->CTRL |= PMU_CTRL_ENABLE_Msk;
}
/**
/**
\brief Disable the PMU
*/
__STATIC_INLINE void ARM_PMU_Disable(void)
__STATIC_INLINE void ARM_PMU_Disable(void)
{
PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk;
}
/**
/**
\brief Set event to count for PMU eventer counter
\param [in] num Event counter (0-30) to configure
\param [in] type Event to count
@ -218,7 +218,7 @@ __STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type)
PMU->EVTYPER[num] = type;
}
/**
/**
\brief Reset cycle counter
*/
__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void)
@ -226,7 +226,7 @@ __STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void)
PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk;
}
/**
/**
\brief Reset all event counters
*/
__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void)
@ -234,8 +234,8 @@ __STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void)
PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk;
}
/**
\brief Enable counters
/**
\brief Enable counters
\param [in] mask Counters to enable
\note Enables one or more of the following:
- event counters (0-30)
@ -246,7 +246,7 @@ __STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask)
PMU->CNTENSET = mask;
}
/**
/**
\brief Disable counters
\param [in] mask Counters to enable
\note Disables one or more of the following:
@ -258,7 +258,7 @@ __STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask)
PMU->CNTENCLR = mask;
}
/**
/**
\brief Read cycle counter
\return Cycle count
*/
@ -267,7 +267,7 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void)
return PMU->CCNTR;
}
/**
/**
\brief Read event counter
\param [in] num Event counter (0-30) to read
\return Event count
@ -277,7 +277,7 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num)
return PMU->EVCNTR[num];
}
/**
/**
\brief Read counter overflow status
\return Counter overflow status bits for the following:
- event counters (0-30)
@ -285,10 +285,10 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num)
*/
__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void)
{
return PMU->OVSSET;
return PMU->OVSSET;
}
/**
/**
\brief Clear counter overflow status
\param [in] mask Counter overflow status bits to clear
\note Clears overflow status bits for one or more of the following:
@ -300,8 +300,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask)
PMU->OVSCLR = mask;
}
/**
\brief Enable counter overflow interrupt request
/**
\brief Enable counter overflow interrupt request
\param [in] mask Counter overflow interrupt request bits to set
\note Sets overflow interrupt request bits for one or more of the following:
- event counters (0-30)
@ -312,8 +312,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask)
PMU->INTENSET = mask;
}
/**
\brief Disable counter overflow interrupt request
/**
\brief Disable counter overflow interrupt request
\param [in] mask Counter overflow interrupt request bits to clear
\note Clears overflow interrupt request bits for one or more of the following:
- event counters (0-30)
@ -324,8 +324,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask)
PMU->INTENCLR = mask;
}
/**
\brief Software increment event counter
/**
\brief Software increment event counter
\param [in] mask Counters to increment
\note Software increment bits for one or more event counters (0-30)
*/

18
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/tz_context.h
View File

@ -30,41 +30,41 @@
#ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H
#include <stdint.h>
#ifndef TZ_MODULEID_T
#define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process.
typedef uint32_t TZ_ModuleId_t;
#endif
/// \details TZ Memory ID identifies an allocated memory slot.
typedef uint32_t TZ_MemoryId_t;
/// Initialize secure context memory system
/// \return execution status (1: success, 0: error)
uint32_t TZ_InitContextSystem_S (void);
/// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
/// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
/// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
#endif // TZ_CONTEXT_H

16
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_adcmic.h
View File

@ -25,10 +25,10 @@
/**
* \addtogroup group_adcmic
* \{
* ADCMic driver is used to process analog and digital microphone signal and
* DC signal with the mxs40adcmic IP. This IP interfaces with Delta-Sigma modulator part
* ADCMic driver is used to process analog and digital microphone signal and
* DC signal with the mxs40adcmic IP. This IP interfaces with Delta-Sigma modulator part
* of the s40adcmic and implements CIC, decimation (FIR) and biquad filters.
* The ADC result is read by the CPU or the DMA from the FIFO of mxs40adcmic
* The ADC result is read by the CPU or the DMA from the FIFO of mxs40adcmic
* (and from CIC register for DC measurement). Instead of taking modulator data
* from s40adcmic, mxs40adcmic can also be configured to take PDM input
* directly from an external digital microphone.
@ -61,7 +61,7 @@
* \section group_adcmic_initialization Initialization and Enabling
*
* To configure the ADCMic subsystem call \ref Cy_ADCMic_Init.
* Pass in a pointer to the \ref MXS40ADCMIC_Type structure for the base hardware register address and
* Pass in a pointer to the \ref MXS40ADCMIC_Type structure for the base hardware register address and
* pass in the configuration structure \ref cy_stc_adcmic_config_t.
*
* After initialization, call \ref Cy_ADCMic_Enable to enable the block.
@ -93,10 +93,10 @@
*
* \section group_adcmic_clock Clocks
*
* The ADCMic requires two input clocks:
* The ADCMic requires two input clocks:
* - clk_sys - recommended frequency is 96MHz, usually is routed from one of the \ref group_sysclk_clk_hf
* - clk_hf - recommended frequency is 24MHz, usually is routed from one of the \ref group_sysclk_clk_hf
*
*
* For more exact information on the ADCMic clock routing, refer to the datasheet for your device.
*
* The internal dividers are configured by \ref cy_stc_adcmic_config_t::clockDiv for general ADC functional and
@ -116,7 +116,7 @@
* The Timer can be used for two purposes:
* - generate periodic events based on ADCMic clk_sys clock.
* - count the CIC data update events.
*
*
* The timer period and input signal source are configured by the \ref cy_stc_adcmic_timer_trigger_config_t::period and
* \ref cy_stc_adcmic_timer_trigger_config_t::input fields correspondingly.
*
@ -151,7 +151,7 @@
*
* \section group_adcmic_fifo FIFO Usage
*
* The ADCMic subsystem in MIC and PDM modes stores the audio data into the FIFO
* The ADCMic subsystem in MIC and PDM modes stores the audio data into the FIFO
* It can be configured using \ref cy_stc_adcmic_fifo_config_t, and served either by ISR:
* \snippet adcmic/snippet/adcmic_snippet.c SNIPPET_ADCMIC_ISR
* Or by DMA:

162
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_csd.h
View File

@ -32,25 +32,25 @@
********************************************************************************
* \{
*
* The CSD HW block enables multiple sensing capabilities on PSoC devices,
* The CSD HW block enables multiple sensing capabilities on PSoC devices,
* including self-cap and mutual-cap capacitive touch sensing solutions,
* a 10-bit ADC, IDAC, and Comparator.
*
* The CapSense solution includes:
* * The CapSense Configurator tool, which is a configuration wizard to create
* and configure CapSense widgets. It can be launched in ModusToolbox
* from the CSD personality as well as in standalone mode.
* It contains separate documentation on how to create and
* The CapSense solution includes:
* * The CapSense Configurator tool, which is a configuration wizard to create
* and configure CapSense widgets. It can be launched in ModusToolbox
* from the CSD personality as well as in standalone mode.
* It contains separate documentation on how to create and
* configure widgets, parameters, and algorithm descriptions.
* * An API to control the design from the application program. This documentation
* * An API to control the design from the application program. This documentation
* describes the API with code snippets about how to use them.
* * The CapSense Tuner tool for real-time tuning, testing, and debugging,
* for easy and smooth design of human interfaces on customer products.
* The Tuner tool communicates with a device through a HW bridge and
* communication drivers (EzI2C, UART, etc.) and allows monitoring of
* for easy and smooth design of human interfaces on customer products.
* The Tuner tool communicates with a device through a HW bridge and
* communication drivers (EzI2C, UART, etc.) and allows monitoring of
* widget statuses, sensor signals, detected touch positions, gestures, etc.
* The application program does not need to interact with the CSD driver
* and/or other drivers such as GPIO or SysClk directly. All of that is
* The application program does not need to interact with the CSD driver
* and/or other drivers such as GPIO or SysClk directly. All of that is
* configured and managed by middleware.
*
* \image html capsense_solution.png "CapSense Solution" width=800px
@ -68,7 +68,7 @@
*
* The CSD HW block can support only one function at a time. To allow seamless
* time-multiplex implementation of functionality and to avoid conflicting access
* to hardware from the upper level, the CSD driver also implements a lock
* to hardware from the upper level, the CSD driver also implements a lock
* semaphore mechanism.
*
* The CSD driver supports re-entrance. If a device contains several
@ -76,7 +76,7 @@
* that, each function of the CSD driver contains a base address to define
* the CSD HW block to which the CSD driver communicates.
*
* For dual-core devices, the CSD driver functions can be called either by the
* For dual-core devices, the CSD driver functions can be called either by the
* CM0+ or CM4 cores. In case both cores need access to the CSD Driver, you
* should properly manage the memory access.
*
@ -87,27 +87,27 @@
********************************************************************************
*
* The CSD driver is simple wrapper driver specifically designed to be used by higher
* level middleware. Hence, is highly not recommended to use CSD driver
* directly in the application program. To incorporate CSD HW block
* functionality in the application program, an associated middleware
* level middleware. Hence, is highly not recommended to use CSD driver
* directly in the application program. To incorporate CSD HW block
* functionality in the application program, an associated middleware
* should be used.
*
* The CSD Driver can be used to implement a custom sensing solution. In such a case,
* The CSD Driver can be used to implement a custom sensing solution. In such a case,
* the application program must acquire and lock the CSD HW block prior to
* accessing it.
*
*
* Setting up and using the CSD driver can be summed up in these four stages:
* * Define configuration in the config structure.
* * Allocate context structure variable for the driver.
* * Capture the CSD HW block.
* * Capture the CSD HW block.
* * Execute the action required to perform any kind of conversion.
*
* The following code snippet demonstrates how to capture the CSD HW block for
* The following code snippet demonstrates how to capture the CSD HW block for
* custom implementation:
*
*
* \snippet csd/snippet/main.c snippet_Cy_CSD_Conversion
*
* The entire solution, either CapSense or CSDADC, in addition to
*
* The entire solution, either CapSense or CSDADC, in addition to
* the CSD HW block, incorporates the following instances:
*
* * \ref group_csd_config_clocks
@ -123,10 +123,10 @@
* \subsection group_csd_config_clocks Clocks
********************************************************************************
*
* The CSD HW block requires a peripheral clock (clk_peri) input. It can be
* The CSD HW block requires a peripheral clock (clk_peri) input. It can be
* assigned using two methods:
* * Using the Device Configurator (Peripheral-Clocks tab ).
* * Using the SysClk (System Clock) driver. Refer to \ref group_sysclk driver
* * Using the SysClk (System Clock) driver. Refer to \ref group_sysclk driver
* section for more details.
* If middleware is used, the clock is managed by middleware.
*
@ -136,18 +136,18 @@
*
* Any analog-capable GPIO pin that can be connected to an analog multiplexed bus
* (AMUXBUS) can be connected to the CSD HW block as an input.
*
*
* GPIO input can be assigned to the CSD HW block using the following methods:
* * Using the Device Configurator (Pins tab).
* * Using the GPIO (General Purpose Input Output) driver. Refer to \ref group_gpio
* driver section.
*
* If middleware is used, pin configuration is managed by middleware. When
* using the CSD driver for custom implementation, the application program must
* If middleware is used, pin configuration is managed by middleware. When
* using the CSD driver for custom implementation, the application program must
* manage pin connections.
*
* Each AMUXBUS can be split into multiple segments. Ensure the CSD HW block
* and a GPIO belong to the same bus segment or join the segments to establish
* Each AMUXBUS can be split into multiple segments. Ensure the CSD HW block
* and a GPIO belong to the same bus segment or join the segments to establish
* connection of the GPIO to the CSD HW block.
*
* For more information about pin configuration, refer to the \ref group_gpio
@ -157,8 +157,8 @@
* \subsection group_csd_config_refgen Reference Voltage Input
********************************************************************************
*
* The CSD HW block requires a reference voltage input to generate programmable
* reference voltage within the CSD HW block. There are two on-chip reference
* The CSD HW block requires a reference voltage input to generate programmable
* reference voltage within the CSD HW block. There are two on-chip reference
* sources:
* * VREF
* * AREF
@ -171,8 +171,8 @@
* \subsection group_csd_config_interrupts Interrupts
********************************************************************************
*
* The CSD HW block has one interrupt that can be assigned to either the
* Cortex M4 or Cortex M0+ core. The CSD HW block can generate interrupts
* The CSD HW block has one interrupt that can be assigned to either the
* Cortex M4 or Cortex M0+ core. The CSD HW block can generate interrupts
* on the following events:
*
* * End of sample: when scanning of a single sensor is complete.
@ -185,59 +185,59 @@
*
* If a CapSense or ADC middleware is used, the interrupt service routine is managed
* by middleware. When using the CSD driver for custom implementation or other
* middleware, the application program must manage the interrupt service routine.
* middleware, the application program must manage the interrupt service routine.
*
* Implement an interrupt routine and assign it to the CSD interrupt. Use the
* pre-defined enumeration as the interrupt source of the CSD HW block.
* The CSD interrupt to the NVIC is raised any time the intersection
* (logic AND) of the interrupt flags and the corresponding interrupt
* masks are non-zero. The peripheral interrupt status register should be
* pre-defined enumeration as the interrupt source of the CSD HW block.
* The CSD interrupt to the NVIC is raised any time the intersection
* (logic AND) of the interrupt flags and the corresponding interrupt
* masks are non-zero. The peripheral interrupt status register should be
* read in the ISR to detect which condition generated the interrupt.
* The appropriate interrupt registers should be cleared so that
* The appropriate interrupt registers should be cleared so that
* subsequent interrupts can be handled.
*
*
* The following code snippet demonstrates how to implement a routine to handle
* the interrupt. The routine is called when a CSD interrupt is triggered.
*
*
* \snippet csd/snippet/main.c snippet_Cy_CSD_IntHandler
*
* The following code snippet demonstrates how to configure and enable
* the CSD interrupt:
*
*
* \snippet csd/snippet/main.c snippet_Cy_CSD_IntEnabling
*
* For more information, refer to the \ref group_sysint driver.
*
* Alternatively, instead of handling the interrupts, the
* \ref Cy_CSD_GetConversionStatus() function allows for firmware
* Alternatively, instead of handling the interrupts, the
* \ref Cy_CSD_GetConversionStatus() function allows for firmware
* polling of the CSD block status.
*
********************************************************************************
* \section group_csd_config_power_modes Power Modes
********************************************************************************
*
* The CSD HW block can operate in Active and Sleep CPU power modes. It is also
* The CSD HW block can operate in Active and Sleep CPU power modes. It is also
* possible to switch between Low power and Ultra Low power system modes.
* In Deep Sleep and in Hibernate power modes, the CSD HW block is powered off.
* When the device wakes up from Deep Sleep, the CSD HW block resumes operation
* without the need for re-initialization. In the case of wake up from Hibernate power
* When the device wakes up from Deep Sleep, the CSD HW block resumes operation
* without the need for re-initialization. In the case of wake up from Hibernate power
* mode, the CSD HW block does not retain configuration and it requires
* re-initialization.
*
* \note
* 1. The CSD driver does not provide a callback function to facilitate the
* low-power mode transitions. The responsibility belongs to an upper
* level that uses the CSD HW block to ensure the CSD HW block is not
* low-power mode transitions. The responsibility belongs to an upper
* level that uses the CSD HW block to ensure the CSD HW block is not
* busy prior to a power mode transition.
* 2. A power mode transition is not recommended while the CSD HW block is busy.
* The CSD HW block status must be checked using the Cy_CSD_GetStatus()
* The CSD HW block status must be checked using the Cy_CSD_GetStatus()
* function prior to a power mode transition. Instead, use the same power mode
* for active operation of the CSD HW block. This restriction is not
* applicable to Sleep mode and the device can seamlessly enter and exit
* for active operation of the CSD HW block. This restriction is not
* applicable to Sleep mode and the device can seamlessly enter and exit
* Sleep mode while the CSD HW block is busy.
*
* \warning
* 1. Do not enter Deep Sleep power mode if the CSD HW block conversion is in
* 1. Do not enter Deep Sleep power mode if the CSD HW block conversion is in
* progress. Unexpected behavior may occur.
* 2. Analog start up time for the CSD HW block is 25 us. Initiate
* any kind of conversion only after 25 us from Deep Sleep / Hibernate exit.
@ -301,7 +301,7 @@
* </tr>
* <tr>
* <td rowspan="2">1.10</td>
* <td>The CSD driver sources are enclosed with the conditional compilation
* <td>The CSD driver sources are enclosed with the conditional compilation
* to ensure a successful compilation for non-CapSense-capable devices
* </td>
* <td>Compilation for non-CapSense-capable devices</td>
@ -435,14 +435,14 @@ typedef enum
} cy_en_csd_status_t;
/**
* Definitions of upper level keys that use the driver.
*
* Each middleware has a unique key assigned. When middleware successfully
* captures the CSD HW block, this key is placed into the CSD driver context
* structure. All attempts to capture the CSD HW block by other middleware
/**
* Definitions of upper level keys that use the driver.
*
* Each middleware has a unique key assigned. When middleware successfully
* captures the CSD HW block, this key is placed into the CSD driver context
* structure. All attempts to capture the CSD HW block by other middleware
* are rejected. When the first middleware releases the CSD HW block,
* CY_CSD_NONE_KEY is written to the lockKey variable of the CSD driver context
* CY_CSD_NONE_KEY is written to the lockKey variable of the CSD driver context
* structure and any other middleware can capture the CSD HW block.
*/
typedef enum
@ -450,9 +450,9 @@ typedef enum
/** The CSD HW block is unused and not captured by any middleware */
CY_CSD_NONE_KEY = 0U,
/**
* The CSD HW block is captured by the application program
* directly to implement a customer's specific case
/**
* The CSD HW block is captured by the application program
* directly to implement a customer's specific case
*/
CY_CSD_USER_DEFINED_KEY = 1U,
@ -482,11 +482,11 @@ typedef enum
* \{
*/
/**
/**
* CSD configuration structure.
*
* This structure contains all register values of the CSD HW block. This
* structure is provided by middleware through the Cy_CSD_Init() and
*
* This structure contains all register values of the CSD HW block. This
* structure is provided by middleware through the Cy_CSD_Init() and
* Cy_CSD_Configure() functions to implement the CSD HW block supported
* sensing modes like self-cap / mutual-cap scanning, ADC measurement, etc.
*/
@ -534,9 +534,9 @@ typedef struct
} cy_stc_csd_config_t;
/**
/**
* CSD driver context structure.
* This structure is an internal structure of the CSD driver and should not be
* This structure is an internal structure of the CSD driver and should not be
* accessed directly by the application program.
*/
typedef struct
@ -670,8 +670,8 @@ __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type* base, uint32_t offset, uint32_t
* \param offset
* Register offset relative to base address.
*
* \return
* Returns a value of the CSD HW block register, specified by the offset
* \return
* Returns a value of the CSD HW block register, specified by the offset
* parameter.
*
*******************************************************************************/
@ -694,7 +694,7 @@ __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset)
* Register offset relative to base address.
*
* \param value
* Value to be written to the register.
* Value to be written to the register.
*
*******************************************************************************/
__STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value)
@ -782,8 +782,8 @@ __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type * base, uint32_t offset, uint32_t
* Function Name: Cy_CSD_GetLockStatus
****************************************************************************//**
*
* Verifies whether the specified CSD HW block is acquired and locked by a
* higher-level firmware.
* Verifies whether the specified CSD HW block is acquired and locked by a
* higher-level firmware.
*
* \param base
* Pointer to a CSD HW block base address.
@ -791,7 +791,7 @@ __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type * base, uint32_t offset, uint32_t
* \param context
* The pointer to the context structure allocated by a user or middleware.
*
* \return
* \return
* Returns a key code. See \ref cy_en_csd_key_t.
*
* \funcusage
@ -810,7 +810,7 @@ __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, cons
* Function Name: Cy_CSD_GetConversionStatus
****************************************************************************//**
*
* Verifies whether the specified CSD HW block is busy
* Verifies whether the specified CSD HW block is busy
* (performing scan or conversion).
*
* \param base
@ -819,7 +819,7 @@ __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, cons
* \param context
* The pointer to the context structure allocated by a user or middleware.
*
* \return
* \return
* Returns status code. See \ref cy_en_csd_status_t.
*
* \funcusage
@ -832,7 +832,7 @@ __STATIC_INLINE cy_en_csd_status_t Cy_CSD_GetConversionStatus(const CSD_Type * b
cy_en_csd_status_t csdStatus = CY_CSD_BUSY;
(void)context;
if (((base->SEQ_START & CSD_SEQ_START_START_Msk) == 0u) &&
if (((base->SEQ_START & CSD_SEQ_START_START_Msk) == 0u) &&
((base->STAT_SEQ & (CSD_STAT_SEQ_SEQ_STATE_Msk | CSD_STAT_SEQ_ADC_STATE_Msk)) == 0u))
{
csdStatus = CY_CSD_SUCCESS;

20
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_efuse.h
View File

@ -36,8 +36,8 @@
* You can include cy_pdl.h to get access to all functions
* and declarations in the PDL.
*
* The eFuse driver enables reading the state of any bit.
* - CAT1A devices does not support writing to eFuse memory. Writing an
* The eFuse driver enables reading the state of any bit.
* - CAT1A devices does not support writing to eFuse memory. Writing an
* eFuse bit is typically done by a production programmer.
* Fuses are programmed via the PSoC Programmer tool that parses the hex file
* and extracts the necessary information; the fuse data must be located at the
@ -208,7 +208,7 @@ extern "C" {
*
* \return
* \ref cy_en_efuse_status_t
*
*
* \note
* Supported in CAT1A and CAT1C devices.
*
@ -434,7 +434,7 @@ cy_en_efuse_status_t Cy_EFUSE_WriteByte(EFUSE_Type *base, uint32_t src, uint32_t
* \param offset
* Offset from the EFUSE base address. Must be 4-byte aligned.
*
* \return
* \return
* The EFUSE API status \ref cy_en_efuse_status_t.
*
* \note
@ -469,7 +469,7 @@ cy_en_efuse_status_t Cy_EFUSE_WriteWord(EFUSE_Type *base, uint32_t src, uint32_t
* \param num
* Number of 32-bit words to be written.
*
* \return
* \return
* The EFUSE API status \ref cy_en_efuse_status_t.
*
* \note
@ -528,7 +528,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadBit(EFUSE_Type *base, uint8_t *dst, uint32_t b
* \param offset
* Byte offset from the EFUSE base address.
*
* \return
* \return
* The EFUSE API status \ref cy_en_efuse_status_t.
*
* \note
@ -556,7 +556,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadByte(EFUSE_Type *base, uint8_t *dst, uint32_t
* \param offset
* Offset from the EFUSE base address. Must be 4-byte aligned.
*
* \return
* \return
* The EFUSE API status \ref cy_en_efuse_status_t.
*
* \note
@ -587,7 +587,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadWord(EFUSE_Type *base, uint32_t *dst, uint32_t
* \param num
* Number of words to read.
*
* \return
* \return
* The EFUSE API status \ref cy_en_efuse_status_t.
*
* \note
@ -612,7 +612,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadWordArray(EFUSE_Type *base, uint32_t *dst, uin
* \param bootrow
* 32-bit value to be written into bootrow.
*
* \return
* \return
* The EFUSE API status \ref cy_en_efuse_status_t.
*
* \note
@ -636,7 +636,7 @@ cy_en_efuse_status_t Cy_EFUSE_WriteBootRow(EFUSE_Type *base, uint32_t bootrow);
* \param bootrow
* Pointer to the variable where the content of BOOTROW is read to.
*
* \return
* \return
* The EFUSE API status \ref cy_en_efuse_status_t.
*
* \note

12
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_flash.h
View File

@ -876,7 +876,7 @@ void Cy_Flashc_MainECCEnable(void);
* Function Name: Cy_Flashc_MainECCDisable
****************************************************************************//**
*
* \brief Disables ECC for main flash.
* \brief Disables ECC for main flash.
* ECC checking/reporting on FLASH main interface is disabled.
* No correctable or non-correctable faults are reported by disabling ECC.
*
@ -984,10 +984,10 @@ cy_en_flashdrv_status_t Cy_Flash_Checksum (const cy_stc_flash_checksum_config_t
* Function Name: Cy_Flash_EraseSuspend
****************************************************************************//**
*
* This function suspends an ongoing erase operation. User should not read from a
* sector which is suspended from an erase operation. Cy_Flash_ProgramRow function
* This function suspends an ongoing erase operation. User should not read from a
* sector which is suspended from an erase operation. Cy_Flash_ProgramRow function
* will return error if invoked on suspended sector.
* This function cannot be called on SFLASH. Reports success
* This function cannot be called on SFLASH. Reports success
* or a reason for failure. Does not return until the Erase operation is complete.
* Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another
* process is operating flash.
@ -1004,7 +1004,7 @@ cy_en_flashdrv_status_t Cy_Flash_EraseSuspend(void);
* Function Name: Cy_Flash_EraseResume
****************************************************************************//**
*
* This function calls to resume a suspended erase operation.
* This function calls to resume a suspended erase operation.
* Reports success or a reason for failure.
* Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another
* process is operating flash.
@ -1070,7 +1070,7 @@ cy_en_flashdrv_status_t Cy_Flash_OperationStatus(void);
* Function Name: Cy_Flashc_InjectECC
****************************************************************************//**
*
* This function enables ECC injection and sets the address where a parity will be injected
* This function enables ECC injection and sets the address where a parity will be injected
* and the parity value.
* Reports success or a reason for failure.
*

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_gpio.h
View File

@ -104,7 +104,7 @@
* <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
* <tr>
* <td rowspan="2">1.60</td>
* <td>Added \ref Cy_GPIO_SetVtripAuto and \ref Cy_GPIO_GetVtripAuto APIs for
* <td>Added \ref Cy_GPIO_SetVtripAuto and \ref Cy_GPIO_GetVtripAuto APIs for
* configuring GPIO input buffer voltage for automotive compatible or not,
* for CAT1C devices.</td>
* <td>New APIs support for CAT1C devices.</td>

14
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_ipc_drv.h
View File

@ -72,7 +72,7 @@
*
* These transactions are handled transparently by the DRV-level API. Use the
* PIPE, SEMA and BTSS layers of the API to implement communication in your application.
* The data transferred is limited to a single 32-bit value in case of PIPE and SEMA and two
* The data transferred is limited to a single 32-bit value in case of PIPE and SEMA and two
* 32-bit value incse of BTIPC. As implemented by
* the PIPE API, that value is a pointer to a data structure of arbitrary size
* and complexity.
@ -116,7 +116,7 @@
* can modify these files based on the requirements of your design.
* If you use PSoC Creator as a development environment, it will not overwrite
* your changes when you generate the application or build your code.
*
*
* BTSS provides dedicated communication channels for communication between
* MCU and the BT SS. APIs provided handle exchange of Host Controller Interface (HCI)
* and High Priority Controller (HPC) packets
@ -187,13 +187,13 @@
*
* A Bluetooth Sub-system (BTSS) layer is a communication channel between the MCU and the BT
* Sub-system. It uses 4 IPC channels and 2 interrupts. 2 UL channels (one for HCI and HPC each)
* and 2 DL channels (one for HCI and HPC each). IPC interrupt 0 is used to interrupt the
* and 2 DL channels (one for HCI and HPC each). IPC interrupt 0 is used to interrupt the
* BT SS and IPC interrupt 1 is used to interrupt the MCU.
* IPC channels 0 is used for HCI UL, channel 1 is used from HCI DL,
* IPC channels 2 is used for HPC UL, and channel 3 is used from HPC DL.
* The IPC interrupt gets triggered for both Notify and Release channel.
* Bluetooth stack interface layer registers a callback function for notification
* when BT SS sends an HCI packet. It also provides APIs to read the
* when BT SS sends an HCI packet. It also provides APIs to read the
* HCI packets from the BT SS. On the UL path, it supports APIs to send HCI packet
* from MCU to BT SS.
*
@ -201,14 +201,14 @@
* by packing them into the DATA0 and DATA1 IPC channel registers when payload
* length is less than or equal to 7 bytes. In case the where the payload length
* is greater than 7 bytes, it would use the shared memory to send/receive the packet.
*
*
* This layer support control message communication between the MCU and the BT SS
* using the HPC channels. The HPC channel is used for power management,
* IO configuration, access for TRNG, etc. APIs are provided to send HPC packets to the
* BT SS. It also supports APIs to register the callback function to get notification on receiving
* the HPC packets from the BT SS. Multiple modules running on the MCU can register
* callback functions. Maximum number of HPC callbacks supported is decided by
* the MAX_BT_IPC_HPC_CB macro. All the shared buffer management mechanism
* the MAX_BT_IPC_HPC_CB macro. All the shared buffer management mechanism
* is built into this layer.
* \note All the HCI APIs are intended to be called by the stack interface layer and
* not meant to be called by the application developers.
@ -252,7 +252,7 @@
* Application code calls Cy_BTIPC_Init() with configuration parameters to set up BTSS IPC
* functionality. By default, the BT IPC uses IPC channel 0,1,2 and 3.
* Do <b>not</b> change the IPC channel.
*
*
* To change the number of callbacks supported, modify this line of code in cy_ipc_bt.h.
*
* \code

46
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_keyscan.h
View File

@ -16,12 +16,12 @@
/**
* \addtogroup group_keyscan
* \{
* MXKEYSCAN is a DEEPSLEEP peripheral IP that performs autonomous key-matrix scan and system notification.
* Key processing detects both press and un-press actions,
* MXKEYSCAN is a DEEPSLEEP peripheral IP that performs autonomous key-matrix scan and system notification.
* Key processing detects both press and un-press actions,
* includes micro and macro de-bouncing filters and ghost key detection.
*
* Configurable key-matrix size supports up to 20x8 keys.
* Up to 20 columns are driven as the output and up to 8 rows are processed as the input.
* Configurable key-matrix size supports up to 20x8 keys.
* Up to 20 columns are driven as the output and up to 8 rows are processed as the input.
* Key actions are stored in the FIFO with interrupt notification available based on the FIFO threshold.
*
* The Scan matrix support up to 8X20 matrix, maximum of 160 keys.
@ -29,11 +29,11 @@
* Before any key is pressed, the Key Matrix Scan Logic is disabled.
* Once a key press is detected by the Key Detection Logic, it will enable the gate for clock to drive the key Matrix Scan Logic for GPIO scanning.
* GPIO scanning is done one column at a time by driving each column "low" and reading from the row GPIO pins to find out which input is low.
* After the Key Scan Logic had scanned through the matrix for a specific number for debounce times configured by firmware though the configuration register,
* keycode representing the pressed key is pushed into the key FIFO for firmware to read and an interrupt to CPU will be generated.
* There are two types of debounce mechanisms build into this scan matrix block.
* The micro-debounce logic will provide a small debounce period to debounce the break type of mechanical vibration.
* The macro debounce logic will scan through the matrix for a number of times for qualify a key as being pressed.
* After the Key Scan Logic had scanned through the matrix for a specific number for debounce times configured by firmware though the configuration register,
* keycode representing the pressed key is pushed into the key FIFO for firmware to read and an interrupt to CPU will be generated.
* There are two types of debounce mechanisms build into this scan matrix block.
* The micro-debounce logic will provide a small debounce period to debounce the break type of mechanical vibration.
* The macro debounce logic will scan through the matrix for a number of times for qualify a key as being pressed.
*
* Features:
* * Ability to turn off it's clock if no keys pressed.
@ -108,11 +108,11 @@
* \snippet keyscan/snippet/main.c snippet_Cy_Keyscan_ISR
*
* Handling DeepSleep
*
*
* Following are the points users of keyscan have to handle in their code.
* * Normal DeepSleep configuration is MFO clock disabled, LF Clock enabled and edge interrupt enabled.
* * When edge interrupt occurs, configure MFO to remain enabled in Deepsleep, disable edge interrupt, and go back to Deepsleep.
* * Whenever MFO clock is enabled in the Deepsleep and edge interrupt is disabled, user should start a timer. Every time a key event is detected, user should restart the timer. When timer expires (and/or all keys are considered up), user should go back to Deepsleep with MFO disabled and edge interrupt enabled.
* * Whenever MFO clock is enabled in the Deepsleep and edge interrupt is disabled, user should start a timer. Every time a key event is detected, user should restart the timer. When timer expires (and/or all keys are considered up), user should go back to Deepsleep with MFO disabled and edge interrupt enabled.
*
*
* \section group_keyscan_changelog Changelog
@ -193,7 +193,7 @@ typedef enum {
KEYSCAN_KEYCODE_GHOST = 0xf5, /*!< Ghost key keycode */
KEYSCAN_KEYCODE_NONE = 0xfd, /*!< Keycode value if no key is pressed.*/
KEYSCAN_KEYCODE_END_OF_SCAN_CYCLE = 0xfe, /*!< Event returned to indicate the end of a scan cycle.*/
KEYSCAN_KEYCODE_ROLLOVER = 0xff, /*!< Rollover event generated by the keyscan driver in case of an error (ghost or overflow)
KEYSCAN_KEYCODE_ROLLOVER = 0xff, /*!< Rollover event generated by the keyscan driver in case of an error (ghost or overflow)
For every key event its state has to be stored and if there is an error, then rollover event is triggered and driver restores the previous state.*/
}cy_en_ks_keycode_t;
@ -224,7 +224,7 @@ typedef enum {
#define MXKEYSCAN_KEYSCAN_CTL_RCTC_ROW_DEFAULT 7U
/** keyscan CTL register No of Columns Default value definition. */
#define MXKEYSCAN_KEYSCAN_CTL_RCTC_COLUMN_DEFAULT 19U
/** keyscan CTL register used to pull the columns high after each column scan to alleviate slow rise-time due to a large key matrix capacitance.
/** keyscan CTL register used to pull the columns high after each column scan to alleviate slow rise-time due to a large key matrix capacitance.
** Default value definition. */
#define MXKEYSCAN_KEYSCAN_CTL_PULL_HIGH_DEFAULT 1U
/** keyscan CTL register Default Value. */
@ -295,7 +295,7 @@ typedef enum {
* \addtogroup group_keyscan_data_structures
* \{
*/
/** keyscan callback function definition.
/** keyscan callback function definition.
** Application has to register for callback for receiving the key press events.
*/
typedef void (* cy_cb_keyscan_handle_events_t)(void);
@ -304,7 +304,7 @@ typedef void (* cy_cb_keyscan_handle_events_t)(void);
** \brief keyscan configuration
** These settings are per KEYSCAN instance.
*****************************************************************************/
typedef struct cy_stc_ks_config_t
typedef struct cy_stc_ks_config_t
{
uint8_t macroDownDebCnt; /**< macro down debounce count */
@ -363,12 +363,12 @@ typedef struct cy_stc_keyscan_context_t
uint8_t savedWriteIndexForRollBack; /**< Saved write index for rollback. */
uint8_t savedNumElements; /**< Saved number of elements for rollback. */
uint8_t keysPressedCount; /**< Number of key down events that are not yet matched by key up events,
which gives the number of keys currently being pressed */
bool keyscan_pollingKeyscanHw; /**< Whether HW polling is done from Keyscan */
cy_cb_keyscan_handle_events_t cbEvents; /**< callback function */
}cy_stc_keyscan_context_t;
@ -382,10 +382,10 @@ typedef struct cy_stc_keyscan_context_t
/*****************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/*****************************************************************************/
/**
*****************************************************************************
** \brief Registers for callback
** \brief Registers for callback
** Application has to register for callback for receiving the key press events.
** In the interrupt handler data from HW FIFO is copied to FW FIFO and
** application is notified to get the data using this callback function.
@ -406,7 +406,7 @@ cy_en_ks_status_t Cy_Keyscan_Register_Callback(cy_cb_keyscan_handle_events_t cbE
** \brief Register Context with the driver
** This Function registers for the event callback and FW FIFO buffer.
**
** \pre The Application must configure corresponding keyscan pins
** \pre The Application must configure corresponding keyscan pins
** according to requirements and settings of keyscan instance.
**
** \param [in] base Pointer to KeyScan instance register area
@ -490,7 +490,7 @@ cy_en_ks_status_t Cy_Keyscan_EventsPending(MXKEYSCAN_Type* base, bool *eventsPen
** Applications have to call \ref Cy_Keyscan_Interrupt_Handler from keyscan interrupt handler.
** After successfully reading from HW FIFO and writing to FW FIFO applications
** will be notified through the registered callback.
** Applications to read from the FW FIFO has to call this function in a loop till
** Applications to read from the FW FIFO has to call this function in a loop till
** the return value is CY_KEYSCAN_EVENT_NONE
**
** \param base [in] Pointer to KeyScan instance register area.
@ -585,7 +585,7 @@ cy_en_ks_status_t Cy_Keyscan_ClearInterrupt(MXKEYSCAN_Type* base, uint32_t mask)
** Applications have to call this function from keyscan interrupt handler.
** After successfully reading from HW FIFO and writing to FW FIFO this function
** will notify application to read from the FW FIFO.
** Application has to call Cy_Keyscan_getNextEvent() in a loop till
** Application has to call Cy_Keyscan_getNextEvent() in a loop till
** the return value is CY_KEYSCAN_EVENT_NONE
**
** \param base [in] Pointer to Keyscan instance register area.

26
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lin.h
View File

@ -378,18 +378,18 @@ typedef enum cy_en_lin_timeout_sel_type
*****************************************************************************/
typedef struct cy_stc_lin_config
{
bool masterMode; /**< If TRUE, corresponding channel = master mode, If FALSE, slave mode. */
bool linTransceiverAutoEnable; /**< If TRUE, corresponding LIN channel transceiver is enabled automatically,
If FALSE, firmware has to handle the transceiver enable signal manually */
uint8_t breakFieldLength; /**< Break field length. */
cy_en_lin_break_delimiter_length_t breakDelimiterLength; /**< Break delimiter length. See #cy_en_lin_break_delimiter_length_t */
cy_en_lin_stopbit_t stopBit; /**< Stop bit length. See #cy_en_lin_stopbit_t. */
bool filterEnable; /**< If TRUE, lin_rx_in filter operates.
Median 3 operates on the last three "lin_rx_in" values.
The sequences '000', '001', '010' and '100' result in a filtered value '0'.
@ -400,7 +400,7 @@ typedef struct cy_stc_lin_config
/**
*****************************************************************************
** \brief LIN Test configuration
** This testing functionality simplifies SW development,
** This testing functionality simplifies SW development,
** but may also be used in the field to verify correct channel functionality.
*****************************************************************************/
typedef struct cy_stc_lin_test_config
@ -408,7 +408,7 @@ typedef struct cy_stc_lin_test_config
uint8_t chidx; /**< Specifies the channel index of the channel to which the test applies.
The test mode allows BOTH of the two connected channels to be tested. */
bool mode; /**< When set FALSE, it is partial disconnect from IOSS. Used to observe messages outside of device.
When Set TRUE, it is full disconnect from IOSS. Used for device test without effecting
When Set TRUE, it is full disconnect from IOSS. Used for device test without effecting
operational LIN cluster. */
}cy_stc_lin_test_config_t;
@ -416,7 +416,7 @@ typedef struct cy_stc_lin_test_config
*****************************************************************************
** \brief LIN Error CTL configuration
** Used only for software testing.
** It enables HW injected channel transmitter errors.
** It enables HW injected channel transmitter errors.
** The receiver should detect these errors and report these errors through activation of corresponding interrupt causes.
*****************************************************************************/
typedef struct cy_stc_lin_test_error_config
@ -833,7 +833,7 @@ cy_en_lin_status_t Cy_LIN_EnOut_Disable(LIN_CH_Type* base);
*****************************************************************************
** \brief Enables LIN Testing mode.
**
** This testing functionality simplifies SW development,
** This testing functionality simplifies SW development,
** but may also be used in the field to verify correct channel functionality.
**
** \param base [in] Pointer to LIN instance register area.
@ -851,7 +851,7 @@ cy_en_lin_status_t Cy_LIN_TestMode_Enable(LIN_Type* base, const cy_stc_lin_test_
*****************************************************************************
** \brief Disables LIN Testing mode.
**
** This testing functionality simplifies SW development,
** This testing functionality simplifies SW development,
** but may also be used in the field to verify correct channel functionality.
**
** \param base [in] Pointer to LIN instance register area.
@ -865,7 +865,7 @@ cy_en_lin_status_t Cy_LIN_TestMode_Disable(LIN_Type* base);
*****************************************************************************
** \brief Enables LIN ERROR CTL.
**
** Enables HW injected channel transmitter errors.
** Enables HW injected channel transmitter errors.
** The receiver should detect these errors and report these errors through activation of corresponding interrupt causes.
**
** \param base [in] Pointer to LIN instance register area.
@ -880,7 +880,7 @@ cy_en_lin_status_t Cy_LIN_ErrCtl_Enable(LIN_Type* base, cy_stc_lin_test_error_co
*****************************************************************************
** \brief Disables LIN ERROR CTL.
**
** Disables HW injected channel transmitter errors.
** Disables HW injected channel transmitter errors.
**
** \param base [in] Pointer to LIN instance register area.
**

2
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lvd.h
View File

@ -570,7 +570,7 @@ __STATIC_INLINE void Cy_LVD_SetInterruptConfig(cy_en_lvd_intr_config_t lvdInterr
{
CY_ASSERT_L3(CY_LVD_CHECK_INTR_CFG(lvdInterruptConfig));
#if defined (CY_IP_MXS40SRSS)
#if defined (CY_IP_MXS40SRSS)
#if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_CFG, SRSS_SRSS_INTR_CFG_HVLVD1_EDGE_SEL, lvdInterruptConfig);
#else

12
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_mcwdt.h
View File

@ -224,13 +224,13 @@ typedef struct
* \note
* This parameter is available for CAT1B devices.
**/
uint16_t c0LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT.
uint16_t c0LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT.
Range: 0 - 65535. */
/**
* \note
* This parameter is available for CAT1B devices.
**/
uint16_t c1LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT.
uint16_t c1LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT.
Range: 0 - 65535. */
/**
* \note
@ -1251,14 +1251,14 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetInterruptStatusMasked(MCWDT_STRUCT_Type con
*
* \param lowerLimit
* The value to be written in the lower limit register
* The valid range is [0-65535] for c0
* The valid range is [0-65535] for c0
* and [1-65535] for c1.
*
* \note
* The lower limit mode is not supported by Counter 2.
*
* \param waitUs
* The function waits for some delay in microseconds before returning,
* The function waits for some delay in microseconds before returning,
* because the lower limit register write affects after two lf_clk cycles pass.
* The recommended value is 93 us.
* \note
@ -1306,7 +1306,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetLowerLimit(MCWDT_STRUCT_Type const *base, c
uint32_t countVal = 0u;
CY_ASSERT_L3(CY_MCWDT_IS_LOWER_LIMIT_VALID(counter));
switch (counter)
{
case CY_MCWDT_LOWER_LIMIT0:
@ -1342,7 +1342,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetLowerLimit(MCWDT_STRUCT_Type const *base, c
* Set 0 - Do nothing, 1 - Assert WDT_INTx, 2 - Assert WDT Reset
*
* \note
* This API must not be called while the counters are running.
* This API must not be called while the counters are running.
* Prior to calling this API, the counter must be disabled.
* This API is available for CAT1B devices.
*

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