[bsp][nxp] enable spi6

This commit is contained in:
Jisheng Zhang 2024-03-22 19:07:44 +08:00
parent f3be42a80d
commit fc1cfd6d36
3 changed files with 28 additions and 3 deletions

View File

@ -20,6 +20,9 @@ enum
#ifdef BSP_USING_SPI3
SPI3_INDEX,
#endif
#ifdef BSP_USING_SPI6
SPI6_INDEX,
#endif
};
@ -61,6 +64,20 @@ static struct lpc_spi lpc_obj[] =
.name = "spi3",
},
#endif
#ifdef BSP_USING_SPI6
{
.LPSPIx = LPSPI6,
.clock_attach_id = kFRO_HF_DIV_to_FLEXCOMM6,
.clock_div_name = kCLOCK_DivFlexcom6Clk,
.clock_name = kCLOCK_FroHf,
.tx_dma_request = kDmaRequestMuxLpFlexcomm6Tx,
.rx_dma_request = kDmaRequestMuxLpFlexcomm6Rx,
.DMAx = DMA0,
.tx_dma_chl = 4,
.rx_dma_chl = 5,
.name = "spi6",
},
#endif
};
@ -133,7 +150,7 @@ static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *m
// if(message->length < MAX_DMA_TRANSFER_SIZE)
if(0)
{
// SPI_MasterTransferBlocking(spi->SPIx, &transfer);
LPSPI_MasterTransferBlocking(spi->LPSPIx, &transfer);
}
else
{

View File

@ -64,6 +64,10 @@ menu "On-chip Peripheral Drivers"
bool "Enable Flexcomm3 as SPI"
default n
config BSP_USING_SPI6
bool "Enable Flexcomm6 as SPI"
default n
config BSP_USING_SPI8
bool "Enable Flexcomm8 as High Speed SPI"
default y

View File

@ -89,8 +89,12 @@ void BOARD_InitBootPins(void)
PORT2->PCR[6] = PORT_PCR_MUX(3) | PORT_PCR_PE(1) | PORT_PCR_PS(1) | PORT_PCR_IBE(1); /* SDHC0_D3 */
PORT2->PCR[7] = PORT_PCR_MUX(3) | PORT_PCR_PE(1) | PORT_PCR_PS(1) | PORT_PCR_IBE(1); /* SDHC0_D2 */
PORT3->PCR[20] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_IBE(1); /* FC6_P0 */
PORT3->PCR[21] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_IBE(1); /* FC6_P1 */
/* mikroBUS SPI6 */
PORT3->PCR[20] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC6_P0 SDO/D[0], FC6_SPI_MOSI */
PORT3->PCR[21] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC6_P1 SCK, FC6_SPI_CLK */
PORT3->PCR[22] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC6_P2 SDI/D[1], FC3_SPI_MISO */
PORT3->PCR[23] = PORT_PCR_MUX(0) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* CS */
// PORT1->PCR[20] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_0 */
// PORT1->PCR[21] = PORT_PCR_MUX(3) | PORT_PCR_PS(0) | PORT_PCR_PE(0) | PORT_PCR_IBE(1); /* FC4_1 */